/btstack/port/stm32-l073rz-nucleo-em9304/Drivers/CMSIS/Include/ |
H A D | core_cm0.h | 415 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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H A D | core_sc000.h | 423 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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H A D | core_cm0plus.h | 433 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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/btstack/port/stm32-wb55xx-nucleo-freertos/Drivers/CMSIS/Include/ |
H A D | core_cm0.h | 367 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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H A D | core_sc000.h | 375 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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/btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Include/ |
H A D | core_cm0.h | 367 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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H A D | core_cm1.h | 367 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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H A D | core_cm0plus.h | 385 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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H A D | core_sc000.h | 375 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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/btstack/port/stm32-l476rg-nucleo-sx1280/Drivers/CMSIS/Include/ |
H A D | core_cm0.h | 367 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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H A D | core_cm1.h | 367 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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/btstack/port/stm32-l451-miromico-sx1280/Drivers/CMSIS/Include/ |
H A D | core_cm0.h | 367 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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H A D | core_cm1.h | 367 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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H A D | core_sc000.h | 375 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Include/ |
H A D | core_cm0.h | 367 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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H A D | core_cm1.h | 367 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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H A D | core_sc000.h | 375 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Core/Include/ |
H A D | core_cm0.h | 367 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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H A D | core_cm1.h | 367 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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H A D | core_cm0plus.h | 385 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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H A D | core_sc000.h | 375 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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/btstack/port/renesas-ek-ra6m4a-da14531/e2-project/ra/arm/CMSIS_5/CMSIS/Core/Include/ |
H A D | core_cm0.h | 367 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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H A D | core_cm1.h | 367 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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H A D | core_cm0plus.h | 385 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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/btstack/port/renesas-tb-s1ja-cc256x/template/btstack_example/synergy/ssp/inc/bsp/cmsis/Include/ |
H A D | core_cm0plus.h | 385 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
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