xref: /aosp_15_r20/external/coreboot/src/include/pc80/i8259.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef PC80_I8259_H
4 #define PC80_I8259_H
5 
6 #include <stdint.h>
7 
8 /*
9  * IRQ numbers and common usage
10  * If an IRQ does not say it is 'Reserved'
11  * then it can be used by a device, though
12  * some systems may not adhere to this map.
13  */
14 /* PIC IRQs */
15 #define IRQ_DIS		0x1F	/* IRQ is disabled */
16 #define IRQ_0		0x00	/* Reserved - Timer IRQ */
17 #define IRQ_1		0x01	/* Keyboard controller */
18 #define IRQ_2		0x02	/* Reserved - Cascade to Slave PIC */
19 #define IRQ_3		0x03	/* Serial Port 2 & 4 */
20 #define IRQ_4		0x04	/* Serial Port 1 & 3 */
21 #define IRQ_5		0x05	/* Parallel Port 2 & 3 or Sound Card */
22 #define IRQ_6		0x06	/* Floppy Disk Controller */
23 #define IRQ_7		0x07	/* Parallel Port 1 */
24 #define IRQ_8		0x08	/* Reserved - RTC */
25 #define IRQ_9		0x09	/* Reserved - ACPI System Control Interrupt */
26 #define IRQ_10		0x0A	/* Free or SCSI or NIC */
27 #define IRQ_11		0x0B	/* Free or SCSI or NIC */
28 #define IRQ_12		0x0C	/* PS/2 Mouse */
29 #define IRQ_13		0x0D	/* Reserved - CPU Floating Point Unit */
30 #define IRQ_14		0x0E	/* Primary ATA */
31 #define IRQ_15		0x0F	/* Secondary ATA */
32 
33 #define MASTER_PIC_ICW1		0x20
34 #define SLAVE_PIC_ICW1		0xa0
35 #define   ICW_SELECT		(1 << 4)
36 #define   OCW_SELECT		(0 << 4)
37 #define   ADI			(1 << 2)
38 #define   SNGL			(1 << 1)
39 #define   IC4			(1 << 0)
40 
41 #define MASTER_PIC_ICW2		0x21
42 #define SLAVE_PIC_ICW2		0xa1
43 #define   INT_VECTOR_MASTER	0x20
44 #define   IRQ0			0x00
45 #define   IRQ1			0x01
46 #define   INT_VECTOR_SLAVE	0x28
47 #define   IRQ8			0x00
48 #define   IRQ9			0x01
49 
50 #define MASTER_PIC_ICW3		0x21
51 #define   CASCADED_PIC		(1 << 2)
52 
53 #define MASTER_PIC_ICW4		0x21
54 #define SLAVE_PIC_ICW4		0xa1
55 #define   MICROPROCESSOR_MODE	(1 << 0)
56 
57 #define SLAVE_PIC_ICW3		0xa1
58 #define    SLAVE_ID		0x02
59 
60 #define MASTER_PIC_OCW1		0x21
61 #define SLAVE_PIC_OCW1		0xa1
62 #define    IRQ2			(1 << 2)
63 #define    ALL_IRQS		0xff
64 
65 #define ELCR1			0x4d0
66 #define ELCR2			0x4d1
67 
68 #define IRQ_LEVEL_TRIGGERED	1
69 #define IRQ_EDGE_TRIGGERED	0
70 
71 u16 pic_read_irq_mask(void);
72 void pic_write_irq_mask(u16 mask);
73 void pic_irq_enable(u8 int_num, u8 mask);
74 void setup_i8259(void);
75 void i8259_configure_irq_trigger(int int_num, int is_level_triggered);
76 
77 #endif /* PC80_I8259_H */
78