| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| H A D | RISCVFrameLowering.cpp | 117 Register SPReg = getSPReg(STI); in emitPrologue() local
251 Register SPReg = getSPReg(STI); in emitEpilogue() local
427 Register SPReg = RISCV::X2; in eliminateCallFramePseudoInstr() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchFrameLowering.cpp | 188 Register SPReg = LoongArch::R3; in emitPrologue() local
327 Register SPReg = LoongArch::R3; in emitEpilogue() local
428 Register SPReg = LoongArch::R3; in eliminateCallFramePseudoInstr() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | SIFrameLowering.cpp | 95 unsigned ScratchRsrcReg, unsigned SPReg, int FI) { in buildPrologSpill()
143 unsigned ScratchRsrcReg, unsigned SPReg, int FI) { in buildEpilogReload()
493 unsigned SPReg = MFI->getStackPtrOffsetReg(); in emitEntryFunctionPrologue() local
1112 unsigned SPReg = MFI->getStackPtrOffsetReg(); in eliminateCallFramePseudoInstr() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/CSKY/ |
| H A D | CSKYFrameLowering.cpp | 89 Register SPReg = CSKY::R14; in emitPrologue() local
229 Register SPReg = CSKY::R14; in emitEpilogue() local
513 Register SPReg = CSKY::R14; in eliminateCallFramePseudoInstr() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/RISCV/ |
| H A D | RISCVFrameLowering.cpp | 322 const Register SPReg = getSPReg(STI); in adjustStackForRVV() local
403 Register SPReg = getSPReg(STI); in emitPrologue() local
615 Register SPReg = getSPReg(STI); in emitEpilogue() local
1153 Register SPReg = RISCV::X2; in eliminateCallFramePseudoInstr() local
|
| /aosp_15_r20/external/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFrameLowering.cpp | 141 unsigned SPReg = MRI.createVirtualRegister(PtrRC); in emitPrologue() local
195 unsigned SPReg = 0; in emitEpilogue() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFrameLowering.cpp | 174 unsigned SPReg = WebAssembly::SP32; in emitPrologue() local
240 unsigned SPReg = 0; in emitEpilogue() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFrameLowering.cpp | 276 unsigned SPReg = getSPReg(MF); in emitPrologue() local
339 unsigned SPReg = 0; in emitEpilogue() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| H A D | X86RetpolineThunks.cpp | 232 const unsigned SPReg = Is64Bit ? X86::RSP : X86::ESP; in insertRegReturnAddrClobber() local
|
| H A D | X86CallLowering.cpp | 111 Register SPReg = MRI.createGenericVirtualRegister(p0); in getStackAddress() local
|
| H A D | X86FrameLowering.cpp | 1544 unsigned SPReg; in getPSPSlotOffsetFromSP() local
2666 unsigned ScratchReg, SPReg, PReg, SPLimitOffset; in adjustForHiPEPrologue() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/ |
| H A D | X86IndirectThunks.cpp | 253 const Register SPReg = Is64Bit ? X86::RSP : X86::ESP; in populateThunk() local
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| H A D | X86CallLowering.cpp | 97 auto SPReg = in getStackAddress() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsNaClELFStreamer.cpp | 136 unsigned SPReg = MI.getOperand(0).getReg(); in sandboxLoadStoreStackChange() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsNaClELFStreamer.cpp | 136 unsigned SPReg = MI.getOperand(0).getReg(); in sandboxLoadStoreStackChange() local
|
| /aosp_15_r20/external/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsNaClELFStreamer.cpp | 128 unsigned SPReg = MI.getOperand(0).getReg(); in sandboxLoadStoreStackChange() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 650 Register SPReg = isPPC64 ? PPC::X1 : PPC::R1; in emitPrologue() local
1265 Register SPReg = isPPC64 ? PPC::X1 : PPC::R1; in inlineStackProbe() local
1578 Register SPReg = isPPC64 ? PPC::X1 : PPC::R1; in emitEpilogue() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/M68k/GISel/ |
| H A D | M68kCallLowering.cpp | 61 auto SPReg = MIRBuilder.buildCopy(p0, StackReg).getReg(0); in getStackAddress() local
|
| /aosp_15_r20/external/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 747 unsigned SPReg = isPPC64 ? PPC::X1 : PPC::R1; in emitPrologue() local
1129 unsigned SPReg = isPPC64 ? PPC::X1 : PPC::R1; in emitEpilogue() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.cpp | 102 auto SPReg = MIRBuilder.buildCopy(p0, Register(ARM::SP)); in getStackAddress() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 831 unsigned SPReg = isPPC64 ? PPC::X1 : PPC::R1; in emitPrologue() local
1402 unsigned SPReg = isPPC64 ? PPC::X1 : PPC::R1; in emitEpilogue() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/ |
| H A D | SIFrameLowering.cpp | 676 Register SPReg = MFI->getStackPtrOffsetReg(); in emitEntryFunctionPrologue() local
1679 Register SPReg = MFI->getStackPtrOffsetReg(); in eliminateCallFramePseudoInstr() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.cpp | 102 Register SPReg = MRI.createGenericVirtualRegister(p0); in getStackAddress() local
|
| /aosp_15_r20/external/llvm/lib/Target/X86/ |
| H A D | X86FrameLowering.cpp | 1437 unsigned SPReg; in getPSPSlotOffsetFromSP() local
2448 unsigned ScratchReg, SPReg, PReg, SPLimitOffset; in adjustForHiPEPrologue() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 236 auto SPReg = MIRBuilder.buildCopy(p0, Register(Mips::SP)); in getStackAddress() local
|