| /aosp_15_r20/external/linux-kselftest/tools/testing/selftests/powerpc/nx-gzip/include/ |
| H A D | nxu.h | 428 #define getnn(ST, REG) ((be32toh(ST.REG) >> (31-REG##_offset)) \ argument
430 #define getpnn(ST, REG) ((be32toh((ST)->REG) >> (31-REG##_offset)) \ argument
432 #define get32(ST, REG) (be32toh(ST.REG)) argument
433 #define getp32(ST, REG) (be32toh((ST)->REG)) argument
434 #define get64(ST, REG) (be64toh(ST.REG)) argument
435 #define getp64(ST, REG) (be64toh((ST)->REG)) argument
437 #define unget32(ST, REG) (get32(ST, REG) & ~((REG##_mask) \ argument
441 #define ungetp32(ST, REG) (getp32(ST, REG) & ~((REG##_mask) \ argument
445 #define clear_regs(ST) memset((void *)(&(ST)), 0, sizeof(ST)) argument
446 #define clear_dde(ST) do { ST.dde_count = ST.ddebc = 0; ST.ddead = 0; \ argument
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| /aosp_15_r20/external/clang/test/OpenMP/ |
| H A D | target_data_codegen.cpp | 16 struct ST { struct
21 ST<int> gb; argument
163 struct ST { struct
180 ST<int> A; in bar() argument
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| H A D | target_exit_data_codegen.cpp | 16 struct ST { struct
21 ST<int> gb; argument
146 struct ST { struct
163 ST<int> A; in bar() argument
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| H A D | target_enter_data_codegen.cpp | 16 struct ST { struct
21 ST<int> gb; argument
146 struct ST { struct
163 ST<int> A; in bar() argument
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| H A D | target_update_codegen.cpp | 16 struct ST { struct
21 ST<int> gb; argument
144 struct ST { struct
161 ST<int> A; in bar() argument
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| H A D | target_codegen_registration.cpp | 272 struct ST { struct
280 ST() { in ST() argument
286 ~ST() { in ~ST() argument
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/ |
| H A D | SIFrameLowering.cpp | 73 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in getVGPRSpillLaneOrTempRegister() local
124 static void buildPrologSpill(const GCNSubtarget &ST, const SIRegisterInfo &TRI, in buildPrologSpill()
147 static void buildEpilogRestore(const GCNSubtarget &ST, in buildEpilogRestore()
218 const GCNSubtarget &ST; member in llvm::PrologEpilogSGPRSpillBuilder
373 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitEntryFunctionFlatScratchInit() local
529 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in getEntryFunctionReservedScratchRsrcReg() local
578 static unsigned getScratchScaleFactor(const GCNSubtarget &ST) { in getScratchScaleFactor()
598 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitEntryFunctionPrologue() local
716 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitEntryFunctionScratchRsrcRegSetup() local
878 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in buildScratchExecCopy() local
[all …]
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| H A D | GCNIterativeScheduler.cpp | 92 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in printRegions() local
115 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in printSchedRP() local
399 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in scheduleRegion() local
413 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in sortRegionsByPressure() local
430 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in tryMaximizeOccupancy() local
467 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in scheduleLegacyMaxOccupancy() local
521 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in scheduleMinReg() local
555 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in scheduleILP() local
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| H A D | SIMachineFunctionInfo.cpp | 61 const GCNSubtarget &ST = *static_cast<const GCNSubtarget *>(STI); in SIMachineFunctionInfo() local
215 const GCNSubtarget& ST = MF.getSubtarget<GCNSubtarget>(); in limitOccupancy() local
315 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in allocateVGPRForSGPRSpills() local
344 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in allocateVGPRForPrologEpilogSGPRSpills() local
378 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in allocateSGPRSpillToVGPRLane() local
419 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in allocateVGPRSpillToAGPR() local
542 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in getGITPtrLoReg() local
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| H A D | AMDGPUPromoteAlloca.cpp | 174 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(TM, F); in run() local
179 const GCNSubtarget &ST = TM.getSubtarget<GCNSubtarget>(F); in run() local
210 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(TM, F); in getLocalSizeYZ() local
299 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(TM, *F); in getWorkitemID() local
786 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(TM, F); in hasSufficientLocalMem() local
968 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(TM, ContainingFunction); in handleAlloca() local
1174 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(TM, F); in promoteAllocasToVector() local
1180 const GCNSubtarget &ST = TM.getSubtarget<GCNSubtarget>(F); in promoteAllocasToVector() local
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| H A D | SIMemoryLegalizer.cpp | 264 const GCNSubtarget &ST; member in __anonc50d78070111::SICacheControl
373 SIGfx6CacheControl(const GCNSubtarget &ST) : SICacheControl(ST) {} in SIGfx6CacheControl()
414 SIGfx7CacheControl(const GCNSubtarget &ST) : SIGfx6CacheControl(ST) {} in SIGfx7CacheControl()
426 SIGfx90ACacheControl(const GCNSubtarget &ST) : SIGfx7CacheControl(ST) {} in SIGfx90ACacheControl()
487 SIGfx940CacheControl(const GCNSubtarget &ST) : SIGfx90ACacheControl(ST) {}; in SIGfx940CacheControl()
525 SIGfx10CacheControl(const GCNSubtarget &ST) : SIGfx7CacheControl(ST) {} in SIGfx10CacheControl()
551 SIGfx11CacheControl(const GCNSubtarget &ST) : SIGfx10CacheControl(ST) {} in SIGfx11CacheControl()
813 SICacheControl::SICacheControl(const GCNSubtarget &ST) : ST(ST) { in SICacheControl()
830 std::unique_ptr<SICacheControl> SICacheControl::create(const GCNSubtarget &ST) { in create()
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| H A D | AMDGPUTargetMachine.cpp | 424 const GCNSubtarget &ST = C->MF->getSubtarget<GCNSubtarget>(); in createGCNMaxOccupancyMachineScheduler() local
446 const GCNSubtarget &ST = C->MF->getSubtarget<GCNSubtarget>(); in createIterativeGCNMaxOccupancyMachineScheduler() local
462 const GCNSubtarget &ST = C->MF->getSubtarget<GCNSubtarget>(); in createIterativeILPMachineScheduler() local
875 const GCNSubtarget &ST = C->MF->getSubtarget<GCNSubtarget>(); in createPostMachineScheduler() local
1083 const GCNSubtarget &ST = C->MF->getSubtarget<GCNSubtarget>(); in createMachineScheduler() local
1104 const GCNSubtarget &ST = C->MF->getSubtarget<GCNSubtarget>(); in createMachineScheduler() local
1445 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in parseMachineFunctionInfo() local
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| H A D | SILowerSGPRSpills.cpp | 84 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in insertCSRSaves() local
127 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in insertCSRRestores() local
203 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in spillCalleeSavedRegs() local
252 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in runOnMachineFunction() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | SIFrameLowering.cpp | 27 static ArrayRef<MCPhysReg> getAllSGPR128(const GCNSubtarget &ST, in getAllSGPR128()
33 static ArrayRef<MCPhysReg> getAllSGPRs(const GCNSubtarget &ST, in getAllSGPRs()
187 void SIFrameLowering::emitFlatScratchInit(const GCNSubtarget &ST, in emitFlatScratchInit()
270 const GCNSubtarget &ST, in getReservedPrivateSegmentBufferReg()
320 const GCNSubtarget &ST, const SIInstrInfo *TII, const SIRegisterInfo *TRI, in getReservedPrivateSegmentWaveByteOffsetReg()
404 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitEntryFunctionPrologue() local
533 void SIFrameLowering::emitEntryFunctionScratchSetup(const GCNSubtarget &ST, in emitEntryFunctionScratchSetup()
686 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitPrologue() local
828 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in emitEpilogue() local
950 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in processFunctionBeforeFrameFinalized() local
[all …]
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| H A D | GCNIterativeScheduler.cpp | 110 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in printRegions() local
134 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in printSchedRP() local
420 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in scheduleRegion() local
435 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in sortRegionsByPressure() local
452 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in tryMaximizeOccupancy() local
489 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in scheduleLegacyMaxOccupancy() local
543 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in scheduleMinReg() local
577 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in scheduleILP() local
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| H A D | SIOptimizeExecMaskingPreRA.cpp | 87 const GCNSubtarget &ST) { in isEndCF()
97 static bool isFullExecCopy(const MachineInstr& MI, const GCNSubtarget& ST) { in isFullExecCopy()
110 const GCNSubtarget& ST) { in getOrNonExecReg()
124 const GCNSubtarget& ST) { in getOrExecSource()
190 const GCNSubtarget &ST, in optimizeVcndVcmpPair()
298 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in runOnMachineFunction() local
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| H A D | SIMachineFunctionInfo.cpp | 50 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in SIMachineFunctionInfo() local
182 const GCNSubtarget& ST = MF.getSubtarget<GCNSubtarget>(); in limitOccupancy() local
254 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in haveFreeLanesForSGPRSpill() local
268 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in allocateSGPRSpillToVGPR() local
328 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in allocateVGPRSpillToAGPR() local
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| H A D | SIOptimizeExecMasking.cpp | 60 static Register isCopyFromExec(const MachineInstr &MI, const GCNSubtarget &ST) { in isCopyFromExec()
78 static Register isCopyToExec(const MachineInstr &MI, const GCNSubtarget &ST) { in isCopyToExec()
240 const GCNSubtarget &ST, in findExecCopy()
272 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in runOnMachineFunction() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVModuleAnalysis.cpp | 57 unsigned i, const SPIRVSubtarget &ST, in getSymbolicOperandRequirements()
433 const SPIRVSubtarget &ST) { in getAndAddRequirements()
559 void RequirementHandler::initAvailableCapabilities(const SPIRVSubtarget &ST) { in initAvailableCapabilities()
605 const SPIRVSubtarget &ST) { in addOpDecorateReqs()
622 const SPIRVSubtarget &ST) { in addOpTypeImageReqs()
675 const SPIRVSubtarget &ST) { in addInstrRequirements()
896 MachineModuleInfo *MMI, const SPIRVSubtarget &ST) { in collectReqs()
960 static void handleMIFlagDecoration(MachineInstr &I, const SPIRVSubtarget &ST, in handleMIFlagDecoration()
989 MachineModuleInfo *MMI, const SPIRVSubtarget &ST, in addDecorations()
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| /aosp_15_r20/prebuilts/go/linux-x86/src/cmd/vet/testdata/assign/ |
| D | assign.go | 11 type ST struct { struct
12 x int
13 l []int
16 func (s *ST) SetX(x int, ch chan int) {
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| H A D | MipsLegalizerInfo.cpp | 53 MipsLegalizerInfo::MipsLegalizerInfo(const MipsSubtarget &ST) { in MipsLegalizerInfo()
319 const MipsSubtarget &ST) { in SelectMSA3OpIntrinsic()
334 const MipsSubtarget &ST) { in MSA3OpIntrinsicToGeneric()
346 const MipsSubtarget &ST) { in MSA2OpIntrinsicToGeneric()
358 const MipsSubtarget &ST = in legalizeIntrinsic() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Mips/ |
| H A D | MipsLegalizerInfo.cpp | 67 MipsLegalizerInfo::MipsLegalizerInfo(const MipsSubtarget &ST) { in MipsLegalizerInfo()
469 const MipsSubtarget &ST) { in SelectMSA3OpIntrinsic()
484 const MipsSubtarget &ST) { in MSA3OpIntrinsicToGeneric()
496 const MipsSubtarget &ST) { in MSA2OpIntrinsicToGeneric()
508 const MipsSubtarget &ST = MI.getMF()->getSubtarget<MipsSubtarget>(); in legalizeIntrinsic() local
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| /aosp_15_r20/external/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 29 const SISubtarget &ST = MF.getSubtarget<SISubtarget>(); in getMaxWaveCountPerSIMD() local
38 const SISubtarget &ST = MF.getSubtarget<SISubtarget>(); in getMaxWorkGroupSGPRCount() local
199 const SISubtarget &ST = MF.getSubtarget<SISubtarget>(); in getReservedRegs() local
422 const SISubtarget &ST = MF->getSubtarget<SISubtarget>(); in buildScratchLoadStore() local
503 const SISubtarget &ST = MF->getSubtarget<SISubtarget>(); in eliminateFrameIndex() local
912 const SISubtarget &ST = MF.getSubtarget<SISubtarget>(); in getPreloadedValue() local
983 unsigned SIRegisterInfo::getNumSGPRsAllowed(const SISubtarget &ST, in getNumSGPRsAllowed()
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| /aosp_15_r20/external/clang/test/CodeGenCXX/ |
| H A D | reference-in-block-args.cpp | 6 struct ST { struct
11 void OUTER_BLOCK(void (^fixer)(ST& ref)) { argument
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| /aosp_15_r20/external/scudo/standalone/tests/ |
| H A D | timing_test.cpp | 18 void testFunc1() { scudo::ScopedTimer ST(Manager, __func__); } in testFunc1() local
21 scudo::ScopedTimer ST(Manager, __func__); in testFunc2() local
26 scudo::ScopedTimer ST(Manager, __func__); in testChainedCalls() local
31 scudo::ScopedTimer ST(Manager, __func__); in testIgnoredTimer() local
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