| /aosp_15_r20/external/vixl/test/aarch64/ |
| H A D | test-assembler-aarch64.cc | 5233 __ Sbc(x7, x4, Operand(x3, LSR, 4)); in TEST() local
5239 __ Sbc(w12, w4, Operand(w3, LSR, 4)); in TEST() local
5248 __ Sbc(x20, x4, Operand(x3, LSR, 4)); in TEST() local
5254 __ Sbc(w25, w4, Operand(w3, LSR, 4)); in TEST() local
5302 __ Sbc(x12, x1, Operand(w2, UXTW, 4)); in TEST() local
5314 __ Sbc(x22, x1, Operand(w2, UXTW, 4)); in TEST() local
5399 __ Sbc(x9, x0, Operand(0x1234567890abcdef)); in TEST() local
5400 __ Sbc(w10, w0, Operand(0xffffffff)); in TEST() local
5409 __ Sbc(x20, x0, Operand(0x1234567890abcdef)); in TEST() local
5410 __ Sbc(w21, w0, Operand(0xffffffff)); in TEST() local
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| /aosp_15_r20/art/compiler/optimizing/ |
| H A D | code_generator_arm_vixl.cc | 1173 __ Sbc(out_hi, first_hi, second_hi); in GenerateDataProc() local
3333 __ Sbc(out, in, temp); in GenerateConditionWithZero() local
3883 __ Sbc(HighRegisterFrom(out), HighRegisterFrom(out), HighRegisterFrom(out)); in VisitNeg() local
4387 __ Sbc(HighRegisterFrom(out), HighRegisterFrom(first), HighRegisterFrom(second)); in VisitSub() local
9028 __ Sbc(out_high, first_high, ~value_high); in GenerateAddLongConst() local
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| H A D | intrinsics_arm_vixl.cc | 791 __ Sbc(temp0, temp0, 0); // Complete the move of the compression flag. in GenerateStringCompareToLoop() local
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| /aosp_15_r20/external/vixl/src/aarch64/ |
| H A D | macro-assembler-aarch64.cc | 1791 void MacroAssembler::Sbc(const Register& rd, in Sbc() function in vixl::aarch64::MacroAssembler
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| /aosp_15_r20/external/swiftshader/third_party/subzero/src/ |
| H A D | IceInstARM32.h | 415 Sbc, enumerator
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| /aosp_15_r20/external/vixl/src/aarch32/ |
| H A D | macro-assembler-aarch32.h | 3362 void Sbc(Condition cond, Register rd, Register rn, const Operand& operand) { in Sbc() function
3376 void Sbc(Register rd, Register rn, const Operand& operand) { in Sbc() function
3379 void Sbc(FlagsUpdate flags, in Sbc() function
3403 void Sbc(FlagsUpdate flags, in Sbc() function
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