1 /* 2 * Copyright (c) 2022, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file mhw_vebox_impl.h 24 //! \brief MHW VEBOX interface common base 25 //! \details 26 //! 27 28 #ifndef __MHW_VEBOX_IMPL_H__ 29 #define __MHW_VEBOX_IMPL_H__ 30 31 #include "mhw_vebox_itf.h" 32 #include "mhw_impl.h" 33 #include "hal_oca_interface_next.h" 34 #include "mos_solo_generic.h" 35 36 #ifdef IGFX_VEBOX_INTERFACE_EXT_SUPPORT 37 #include "mhw_vebox_impl_ext.h" 38 #endif 39 40 namespace mhw 41 { 42 namespace vebox 43 { 44 45 template <typename cmd_t> 46 class Impl : public Itf, public mhw::Impl 47 { 48 _VEBOX_CMD_DEF(_MHW_CMD_ALL_DEF_FOR_IMPL); 49 50 public: Impl(PMOS_INTERFACE osItf)51 Impl(PMOS_INTERFACE osItf) : mhw::Impl(osItf) 52 { 53 MHW_FUNCTION_ENTER; 54 55 MOS_ZeroMemory(&m_veboxSettings, sizeof(m_veboxSettings)); 56 57 MEDIA_ENGINE_INFO mediaSysInfo = {}; 58 59 m_veboxSettings = g_Vebox_Settings; 60 m_vebox0InUse = false; 61 m_vebox1InUse = false; 62 m_veboxScalabilitySupported = false; 63 m_veboxSplitRatio = 50; 64 memset(&m_chromaParams, 0, sizeof(m_chromaParams)); 65 66 MOS_SecureMemcpy(m_BT2020InvPixelValue, sizeof(uint32_t) * 256, g_Vebox_BT2020_Inverse_Pixel_Value, sizeof(uint32_t) * 256); 67 MOS_SecureMemcpy(m_BT2020FwdPixelValue, sizeof(uint32_t) * 256, g_Vebox_BT2020_Forward_Pixel_Value, sizeof(uint32_t) * 256); 68 MOS_SecureMemcpy(m_BT2020InvGammaLUT, sizeof(uint32_t) * 256, g_Vebox_BT2020_Inverse_Gamma_LUT, sizeof(uint32_t) * 256); 69 MOS_SecureMemcpy(m_BT2020FwdGammaLUT, sizeof(uint32_t) * 256, g_Vebox_BT2020_Forward_Gamma_LUT, sizeof(uint32_t) * 256); 70 71 MOS_ZeroMemory(&m_laceColorCorrection, sizeof(m_laceColorCorrection)); 72 73 MHW_CHK_NULL_NO_STATUS_RETURN(osItf); 74 MOS_STATUS eStatus = osItf->pfnGetMediaEngineInfo(osItf, mediaSysInfo); 75 if (eStatus == MOS_STATUS_SUCCESS) 76 { 77 if (mediaSysInfo.VEBoxInfo.IsValid && 78 mediaSysInfo.VEBoxInfo.NumberOfVEBoxEnabled > 1) 79 { 80 m_veboxScalabilitySupported = true; 81 } 82 } 83 84 #if (_DEBUG || _RELEASE_INTERNAL) 85 if (m_userSettingPtr != nullptr) 86 { 87 ReadUserSettingForDebug( 88 m_userSettingPtr, 89 m_veboxSplitRatio, 90 __MEDIA_USER_FEATURE_VALUE_VEBOX_SPLIT_RATIO, 91 MediaUserSetting::Group::Device); 92 } 93 #endif 94 }; 95 MosGetHWTileType(MOS_TILE_TYPE tileType,MOS_TILE_MODE_GMM tileModeGMM,bool gmmTileEnabled)96 static __inline uint32_t MosGetHWTileType(MOS_TILE_TYPE tileType, MOS_TILE_MODE_GMM tileModeGMM, bool gmmTileEnabled) 97 { 98 uint32_t tileMode = 0; 99 100 if (gmmTileEnabled) 101 { 102 return tileModeGMM; 103 } 104 105 switch (tileType) 106 { 107 case MOS_TILE_LINEAR: 108 tileMode = 0; 109 break; 110 case MOS_TILE_YS: 111 tileMode = 1; 112 break; 113 case MOS_TILE_X: 114 tileMode = 2; 115 break; 116 default: 117 tileMode = 3; 118 break; 119 } 120 return tileMode; 121 } 122 UpdateVeboxSync()123 MOS_STATUS UpdateVeboxSync() override 124 { 125 PMHW_VEBOX_HEAP pVeboxHeap; 126 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 127 PMOS_INTERFACE pOsInterface; 128 129 MHW_FUNCTION_ENTER; 130 131 MHW_CHK_NULL_RETURN(this->m_osItf); 132 MHW_CHK_NULL_RETURN(m_veboxHeap); 133 134 pVeboxHeap = m_veboxHeap; 135 pOsInterface = this->m_osItf; 136 137 // If KMD frame tracking is on, the dwSyncTag has been set to gpu status tag 138 // in Mhw_VeboxInterface_AssignVeboxState(). dwNextTag is not used anymore. 139 if (!pOsInterface->bEnableKmdMediaFrameTracking) 140 { 141 pVeboxHeap->pStates[pVeboxHeap->uiCurState].dwSyncTag = 142 pVeboxHeap->dwNextTag++; 143 } 144 pVeboxHeap->pStates[pVeboxHeap->uiCurState].bBusy = true; 145 146 return eStatus; 147 } 148 GetVeboxHeapInfo(const MHW_VEBOX_HEAP ** ppVeboxHeap)149 MOS_STATUS GetVeboxHeapInfo( 150 const MHW_VEBOX_HEAP** ppVeboxHeap) override 151 { 152 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 153 154 MHW_FUNCTION_ENTER; 155 MHW_CHK_NULL_RETURN(ppVeboxHeap); 156 157 *ppVeboxHeap = (const MHW_VEBOX_HEAP*)m_veboxHeap; 158 159 return eStatus; 160 } 161 SetVeboxHeapStateIndex(uint32_t index)162 MOS_STATUS SetVeboxHeapStateIndex( 163 uint32_t index) override 164 { 165 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 166 167 MHW_FUNCTION_ENTER; 168 MHW_CHK_NULL_RETURN(m_veboxHeap); 169 170 m_veboxHeap->uiCurState = index; 171 172 return eStatus; 173 } 174 GetVeboxNumInstances()175 uint32_t GetVeboxNumInstances() override 176 { 177 MHW_FUNCTION_ENTER; 178 179 return m_veboxSettings.uiNumInstances; 180 } 181 DestroyHeap()182 MOS_STATUS DestroyHeap() override 183 { 184 PMOS_INTERFACE pOsInterface; 185 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 186 187 MHW_FUNCTION_ENTER; 188 MHW_CHK_NULL_RETURN(this->m_osItf); 189 190 pOsInterface = this->m_osItf; 191 192 if (m_veboxHeap) 193 { 194 if (!Mos_ResourceIsNull(&m_veboxHeap->DriverResource)) 195 { 196 if (m_veboxHeap->pLockedDriverResourceMem) 197 { 198 pOsInterface->pfnUnlockResource( 199 pOsInterface, 200 &m_veboxHeap->DriverResource); 201 } 202 203 pOsInterface->pfnFreeResource( 204 pOsInterface, 205 &m_veboxHeap->DriverResource); 206 } 207 208 if (!Mos_ResourceIsNull(&m_veboxHeap->KernelResource)) 209 { 210 pOsInterface->pfnFreeResource( 211 pOsInterface, 212 &m_veboxHeap->KernelResource); 213 } 214 215 MOS_FreeMemory(m_veboxHeap); 216 m_veboxHeap = nullptr; 217 } 218 return eStatus; 219 } 220 CreateHeap()221 MOS_STATUS CreateHeap() override 222 { 223 MOS_STATUS eStatus; 224 uint8_t* pMem; 225 uint32_t uiSize; 226 uint32_t uiOffset; 227 MOS_ALLOC_GFXRES_PARAMS AllocParams; 228 MOS_LOCK_PARAMS LockFlags; 229 MEDIA_FEATURE_TABLE* skuTable = nullptr; 230 231 MHW_FUNCTION_ENTER; 232 233 MHW_CHK_NULL_RETURN(this->m_osItf); 234 MHW_CHK_NULL_RETURN(this->m_osItf->pfnGetSkuTable); 235 236 skuTable = this->m_osItf->pfnGetSkuTable(this->m_osItf); 237 MHW_CHK_NULL_RETURN(skuTable); 238 239 eStatus = MOS_STATUS_SUCCESS; 240 241 uiSize = sizeof(MHW_VEBOX_HEAP); 242 uiSize += m_veboxSettings.uiNumInstances * 243 sizeof(MHW_VEBOX_HEAP_STATE); 244 245 // Allocate memory for VEBOX 246 pMem = (uint8_t*)MOS_AllocAndZeroMemory(uiSize); 247 MHW_CHK_NULL_RETURN(pMem); 248 249 m_veboxHeap = (MHW_VEBOX_HEAP*)pMem; 250 251 m_veboxHeap->pStates = 252 (MHW_VEBOX_HEAP_STATE*)(pMem + sizeof(MHW_VEBOX_HEAP)); 253 254 // Assign offsets and sizes 255 uiOffset = 0; 256 m_veboxHeap->uiDndiStateOffset = uiOffset; 257 uiOffset += m_veboxSettings.uiDndiStateSize; 258 259 m_veboxHeap->uiIecpStateOffset = uiOffset; 260 uiOffset += m_veboxSettings.uiIecpStateSize; 261 262 m_veboxHeap->uiGamutStateOffset = uiOffset; 263 uiOffset += m_veboxSettings.uiGamutStateSize; 264 265 m_veboxHeap->uiVertexTableOffset = uiOffset; 266 uiOffset += m_veboxSettings.uiVertexTableSize; 267 268 m_veboxHeap->uiCapturePipeStateOffset = uiOffset; 269 uiOffset += m_veboxSettings.uiCapturePipeStateSize; 270 271 m_veboxHeap->uiGammaCorrectionStateOffset = uiOffset; 272 uiOffset += m_veboxSettings.uiGammaCorrectionStateSize; 273 274 m_veboxHeap->uiHdrStateOffset = uiOffset; 275 uiOffset += m_veboxSettings.uiHdrStateSize; 276 277 m_veboxHeap->uiInstanceSize = uiOffset; 278 279 // Appending VeboxHeap sync data after all vebox heap instances 280 m_veboxHeap->uiOffsetSync = 281 m_veboxHeap->uiInstanceSize * 282 m_veboxSettings.uiNumInstances; 283 284 // Allocate GPU memory 285 uiSize = m_veboxHeap->uiInstanceSize * 286 m_veboxSettings.uiNumInstances + 287 m_veboxSettings.uiSyncSize; 288 289 // for using vdbox copy, the size have to be cache line aligned 290 MOS_ALIGN_CEIL(uiSize, MHW_CACHELINE_SIZE); 291 292 m_veboxHeap->uiStateHeapSize = uiSize; 293 294 MOS_ZeroMemory(&AllocParams, sizeof(MOS_ALLOC_GFXRES_PARAMS)); 295 296 AllocParams.Type = MOS_GFXRES_BUFFER; 297 AllocParams.TileType = MOS_TILE_LINEAR; 298 AllocParams.Format = Format_Buffer; 299 AllocParams.dwBytes = uiSize; 300 AllocParams.pBufName = "VphalVeboxHeap"; 301 AllocParams.ResUsageType = MOS_HW_RESOURCE_USAGE_VP_INTERNAL_READ_WRITE_FF; 302 303 if (MEDIA_IS_SKU(skuTable, FtrLimitedLMemBar)) 304 { 305 AllocParams.dwMemType = MOS_MEMPOOL_SYSTEMMEMORY; 306 } 307 308 MHW_CHK_STATUS_RETURN(this->m_osItf->pfnAllocateResource( 309 this->m_osItf, 310 &AllocParams, 311 &m_veboxHeap->DriverResource)); 312 313 if (MEDIA_IS_SKU(skuTable, FtrLimitedLMemBar)) 314 { 315 // Use device memory for vebox heap kernel resource, as no cpu access on it. 316 AllocParams.dwMemType = MOS_MEMPOOL_DEVICEMEMORY; 317 } 318 AllocParams.Flags.bNotLockable = 1; 319 MHW_CHK_STATUS_RETURN(this->m_osItf->pfnAllocateResource( 320 this->m_osItf, 321 &AllocParams, 322 &m_veboxHeap->KernelResource)); 323 324 // Lock the driver resource 325 MOS_ZeroMemory(&LockFlags, sizeof(MOS_LOCK_PARAMS)); 326 327 LockFlags.NoOverWrite = 1; 328 329 m_veboxHeap->pLockedDriverResourceMem = 330 (uint8_t*)this->m_osItf->pfnLockResource( 331 this->m_osItf, 332 &m_veboxHeap->DriverResource, 333 &LockFlags); 334 MHW_CHK_NULL_RETURN(m_veboxHeap->pLockedDriverResourceMem); 335 336 // Initialize VeboxHeap controls that depend on mapping 337 m_veboxHeap->pSync = 338 (uint32_t*)(m_veboxHeap->pLockedDriverResourceMem + 339 m_veboxHeap->uiOffsetSync); 340 341 if (eStatus != MOS_STATUS_SUCCESS) 342 { 343 DestroyHeap(); 344 } 345 return eStatus; 346 } 347 SetgnLumaWgts(uint32_t lumaStadTh,uint32_t TGNEThCnt,bool tGNEEnable)348 MOS_STATUS SetgnLumaWgts(uint32_t lumaStadTh, uint32_t TGNEThCnt, bool tGNEEnable) override 349 { 350 dw4X4TGNEThCnt = TGNEThCnt; 351 bTGNEEnable = tGNEEnable; 352 dwLumaStadTh = lumaStadTh; 353 354 return MOS_STATUS_SUCCESS; 355 } 356 SetgnChromaWgts(uint32_t chromaStadTh)357 MOS_STATUS SetgnChromaWgts(uint32_t chromaStadTh) override 358 { 359 dwChromaStadTh = chromaStadTh; 360 361 return MOS_STATUS_SUCCESS; 362 } 363 SetgnHVSParams(bool tGNEEnable,uint32_t lumaStadTh,uint32_t chromaStadTh,uint32_t tGNEThCnt,uint32_t historyInit,bool fallBack)364 MOS_STATUS SetgnHVSParams( 365 bool tGNEEnable, uint32_t lumaStadTh, uint32_t chromaStadTh, 366 uint32_t tGNEThCnt, uint32_t historyInit, bool fallBack) override 367 { 368 dw4X4TGNEThCnt = tGNEThCnt; 369 bTGNEEnable = tGNEEnable; 370 dwLumaStadTh = lumaStadTh; 371 dwChromaStadTh = chromaStadTh; 372 bHVSfallback = fallBack; 373 dwHistoryInit = historyInit; 374 375 return MOS_STATUS_SUCCESS; 376 } 377 SetgnHVSMode(bool hVSAutoBdrate,bool hVSAutoSubjective,uint32_t bSDThreshold)378 MOS_STATUS SetgnHVSMode(bool hVSAutoBdrate, bool hVSAutoSubjective, uint32_t bSDThreshold) override 379 { 380 bHVSAutoBdrateEnable = hVSAutoBdrate; 381 bHVSAutoSubjectiveEnable = hVSAutoSubjective; 382 dwBSDThreshold = bSDThreshold; 383 384 return MOS_STATUS_SUCCESS; 385 } 386 387 RefreshVeboxSync()388 void RefreshVeboxSync() 389 { 390 MHW_VEBOX_HEAP *pVeboxHeap; 391 MHW_VEBOX_HEAP_STATE *pCurInstance; 392 uint32_t dwCurrentTag; 393 int32_t i; 394 int32_t iInstanceInUse; 395 MOS_NULL_RENDERING_FLAGS NullRenderingFlags; 396 397 MHW_FUNCTION_ENTER; 398 if (m_veboxHeap == nullptr || 399 this->m_osItf == nullptr) 400 { 401 MHW_ASSERTMESSAGE("RefreshVeboxSync failed due to m_veboxHeap or m_osInterface is invalid "); 402 return; 403 } 404 iInstanceInUse = 0; 405 406 // Vebox Heap will always be locked by driver 407 pVeboxHeap = m_veboxHeap; 408 409 // Most recent tag 410 if (this->m_osItf->bEnableKmdMediaFrameTracking) 411 { 412 dwCurrentTag = this->m_osItf->pfnGetGpuStatusSyncTag(this->m_osItf, MOS_GPU_CONTEXT_VEBOX); 413 } 414 else 415 { 416 dwCurrentTag = pVeboxHeap->pSync[0]; 417 } 418 pVeboxHeap->dwSyncTag = dwCurrentTag - 1; 419 420 NullRenderingFlags = this->m_osItf->pfnGetNullHWRenderFlags( 421 this->m_osItf); 422 423 // Refresh VeboxHeap states 424 pCurInstance = pVeboxHeap->pStates; 425 for (i = m_veboxSettings.uiNumInstances; i > 0; i--, pCurInstance++) 426 { 427 if (!pCurInstance->bBusy) continue; 428 429 // The condition below is valid when sync tag wraps from 2^32-1 to 0 430 if (((int32_t)(dwCurrentTag - pCurInstance->dwSyncTag) >= 0) || 431 NullRenderingFlags.VPGobal || 432 NullRenderingFlags.VPDnDi || 433 this->m_osItf->bNullHwIsEnabled) 434 { 435 pCurInstance->bBusy = false; 436 } 437 else 438 { 439 iInstanceInUse++; 440 } 441 } 442 443 // Save number of instance in use 444 m_veboxHeapInUse = iInstanceInUse; 445 } 446 SetVeboxSurfaceControlBits(PMHW_VEBOX_SURFACE_CNTL_PARAMS pVeboxSurfCntlParams,uint32_t * pSurfCtrlBits)447 MOS_STATUS SetVeboxSurfaceControlBits( 448 PMHW_VEBOX_SURFACE_CNTL_PARAMS pVeboxSurfCntlParams, 449 uint32_t* pSurfCtrlBits) override 450 { 451 return MOS_STATUS_SUCCESS; 452 } 453 SetVeboxDndiState(PMHW_VEBOX_DNDI_PARAMS pVeboxDndiParams)454 MOS_STATUS SetVeboxDndiState( 455 PMHW_VEBOX_DNDI_PARAMS pVeboxDndiParams) override 456 { 457 return MOS_STATUS_SUCCESS; 458 } 459 SetVeboxIecpState(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)460 MOS_STATUS SetVeboxIecpState( 461 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams) override 462 { 463 return MOS_STATUS_SUCCESS; 464 } 465 SetDisableHistogram(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)466 MOS_STATUS SetDisableHistogram( 467 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams) override 468 { 469 return MOS_STATUS_SUCCESS; 470 } 471 SetAlphaFromStateSelect(PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams)472 MOS_STATUS SetAlphaFromStateSelect( 473 PMHW_VEBOX_IECP_PARAMS pVeboxIecpParams) override 474 { 475 return MOS_STATUS_SUCCESS; 476 } 477 SetVeboxLaceColorParams(MHW_LACE_COLOR_CORRECTION * pLaceColorParams)478 MOS_STATUS SetVeboxLaceColorParams( 479 MHW_LACE_COLOR_CORRECTION *pLaceColorParams) override 480 { 481 MHW_CHK_NULL_RETURN(pLaceColorParams); 482 MOS_SecureMemcpy(&m_laceColorCorrection, sizeof(MHW_LACE_COLOR_CORRECTION), pLaceColorParams, sizeof(MHW_LACE_COLOR_CORRECTION)); 483 484 return MOS_STATUS_SUCCESS; 485 } 486 SetVeboxChromaParams(MHW_VEBOX_CHROMA_PARAMS * chromaParams)487 MOS_STATUS SetVeboxChromaParams( 488 MHW_VEBOX_CHROMA_PARAMS* chromaParams) override 489 { 490 MHW_CHK_NULL_RETURN(chromaParams); 491 MOS_SecureMemcpy(&m_chromaParams, sizeof(MHW_VEBOX_CHROMA_PARAMS), chromaParams, sizeof(MHW_VEBOX_CHROMA_PARAMS)); 492 493 return MOS_STATUS_SUCCESS; 494 } 495 AssignVeboxState()496 MOS_STATUS AssignVeboxState() override 497 { 498 uint32_t dwWaitMs, dwWaitTag; 499 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 500 MHW_VEBOX_HEAP_STATE *pVeboxCurState; 501 MHW_VEBOX_HEAP *pVeboxHeap; 502 uint32_t uiOffset; 503 504 MHW_FUNCTION_ENTER; 505 MHW_CHK_NULL_RETURN(m_veboxHeap); 506 MHW_CHK_NULL_RETURN(this->m_osItf); 507 508 pVeboxHeap = m_veboxHeap; 509 pVeboxCurState = &m_veboxHeap->pStates[pVeboxHeap->uiNextState]; 510 511 // Refresh sync tag for all vebox heap instance 512 RefreshVeboxSync(); 513 514 // Check validity of current vebox heap instance 515 // The code below is unlikely to be executed - unless all Vebox states are in use 516 // If this ever happens, please consider increasing the number of media states 517 MHW_CHK_NULL_RETURN(pVeboxCurState); 518 if (pVeboxCurState->bBusy) 519 { 520 // Get current vebox instance sync tag 521 dwWaitTag = pVeboxCurState->dwSyncTag; 522 523 // Wait for Batch Buffer complete event OR timeout 524 for (dwWaitMs = MHW_TIMEOUT_MS_DEFAULT; dwWaitMs > 0; dwWaitMs--) 525 { 526 uint32_t dwCurrentTag; 527 528 MHW_CHK_STATUS_RETURN(this->m_osItf->pfnWaitForBBCompleteNotifyEvent( 529 this->m_osItf, 530 MOS_GPU_CONTEXT_VEBOX, 531 MHW_EVENT_TIMEOUT_MS)); 532 533 if (this->m_osItf->bEnableKmdMediaFrameTracking) 534 { 535 dwCurrentTag = this->m_osItf->pfnGetGpuStatusSyncTag(this->m_osItf, MOS_GPU_CONTEXT_VEBOX); 536 } 537 else 538 { 539 dwCurrentTag = pVeboxHeap->pSync[0]; 540 } 541 // Mark current instance status as availabe. Wait if this sync tag came back from GPU 542 if ((int32_t)(dwCurrentTag - dwWaitTag) >= 0) 543 { 544 pVeboxCurState->bBusy = false; 545 break; 546 } 547 } 548 549 // Timeout 550 if (dwWaitMs == 0) 551 { 552 MHW_ASSERTMESSAGE("Timeout on waiting for free Vebox Heap."); 553 eStatus = MOS_STATUS_UNKNOWN; 554 return eStatus; 555 } 556 } 557 558 // Prepare syncTag for GPU write back 559 if (this->m_osItf->bEnableKmdMediaFrameTracking) 560 { 561 pVeboxCurState->dwSyncTag = this->m_osItf->pfnGetGpuStatusTag(this->m_osItf, MOS_GPU_CONTEXT_VEBOX); 562 } 563 else 564 { 565 pVeboxCurState->dwSyncTag = pVeboxHeap->dwNextTag; 566 } 567 568 // Assign current state and increase next state 569 pVeboxHeap->uiCurState = pVeboxHeap->uiNextState; 570 pVeboxHeap->uiNextState = (pVeboxHeap->uiNextState + 1) % 571 (m_veboxSettings.uiNumInstances); 572 573 //Clean the memory of current veboxheap to avoid the history states 574 uiOffset = pVeboxHeap->uiCurState * pVeboxHeap->uiInstanceSize; 575 MOS_ZeroMemory(pVeboxHeap->pLockedDriverResourceMem + uiOffset, pVeboxHeap->uiInstanceSize); 576 577 return eStatus; 578 } 579 AdjustBoundary(PMHW_VEBOX_SURFACE_PARAMS pCurrSurf,uint32_t * pdwSurfaceWidth,uint32_t * pdwSurfaceHeight,bool bDIEnable)580 MOS_STATUS AdjustBoundary( 581 PMHW_VEBOX_SURFACE_PARAMS pCurrSurf, 582 uint32_t *pdwSurfaceWidth, 583 uint32_t *pdwSurfaceHeight, 584 bool bDIEnable) 585 { 586 uint16_t wWidthAlignUnit; 587 uint16_t wHeightAlignUnit; 588 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 589 590 MHW_CHK_NULL_RETURN(pCurrSurf); 591 MHW_CHK_NULL_RETURN(pdwSurfaceWidth); 592 MHW_CHK_NULL_RETURN(pdwSurfaceHeight); 593 594 // initialize 595 wHeightAlignUnit = 1; 596 wWidthAlignUnit = 1; 597 598 switch (pCurrSurf->Format) 599 { 600 case Format_NV12: 601 wHeightAlignUnit = bDIEnable ? 4 : 2; 602 wWidthAlignUnit = 2; 603 break; 604 605 case Format_YUYV: 606 case Format_YUY2: 607 case Format_UYVY: 608 case Format_YVYU: 609 case Format_VYUY: 610 case Format_Y210: 611 case Format_Y216: 612 wHeightAlignUnit = bDIEnable ? 2 : 1; 613 wWidthAlignUnit = 2; 614 break; 615 616 case Format_AYUV: 617 case Format_Y416: 618 wHeightAlignUnit = 1; 619 wWidthAlignUnit = 2; 620 break; 621 622 // For other formats, we will not do any special alignment 623 case Format_A8R8G8B8: 624 case Format_X8R8G8B8: 625 case Format_A8B8G8R8: 626 case Format_X8B8G8R8: 627 case Format_L8: 628 default: 629 break; 630 } 631 632 //When Crop being used in vebox, source surface height/width is updated in VeboxAdjustBoundary(), and the rcMaxSrc is used for crop rectangle. 633 //But in dynamic Crop case, if the rcMaxSrc is larger than the rcSrc, the input pdwSurfaceHeight/pdwSurfaceWidth will be the input surface size. 634 //And if the target surface size is smaller than input surface, it may lead to pagefault issue . So in Vebox Crop case, we set the pdwSurfaceHeight/pdwSurfaceWidth 635 //with rcSrc to ensure Vebox input size is same with target Dstrec. 636 if (pCurrSurf->bVEBOXCroppingUsed) 637 { 638 *pdwSurfaceHeight = MOS_ALIGN_CEIL( 639 MOS_MIN(pCurrSurf->dwHeight, MOS_MAX((uint32_t)pCurrSurf->rcSrc.bottom, MHW_VEBOX_MIN_HEIGHT)), 640 wHeightAlignUnit); 641 *pdwSurfaceWidth = MOS_ALIGN_CEIL( 642 MOS_MIN(pCurrSurf->dwWidth, MOS_MAX((uint32_t)pCurrSurf->rcSrc.right, MHW_VEBOX_MIN_WIDTH)), 643 wWidthAlignUnit); 644 MHW_NORMALMESSAGE("bVEBOXCroppingUsed = true, SurfInput.rcSrc.bottom: %d, par.SurfInput.rcSrc.right: %d; pdwSurfaceHeight: %d, pdwSurfaceWidth: %d;", 645 (uint32_t)pCurrSurf->rcSrc.bottom, 646 (uint32_t)pCurrSurf->rcSrc.right, 647 *pdwSurfaceHeight, 648 *pdwSurfaceWidth); 649 MT_LOG5(MT_VP_MHW_VE_ADJUST_SURFPARAM, MT_NORMAL, MT_VP_RENDER_VE_CROPPING, 1, MT_RECT_BOTTOM, pCurrSurf->rcSrc.bottom, 650 MT_RECT_RIGHT, pCurrSurf->rcSrc.right, MT_SURF_HEIGHT, *pdwSurfaceHeight, MT_SURF_WIDTH, *pdwSurfaceWidth); 651 } 652 else 653 { 654 // Align width and height with max src renctange with consideration of 655 // these conditions: 656 // The minimum of width/height should equal to or larger than 657 // MHW_VEBOX_MIN_WIDTH/HEIGHT. The maximum of width/heigh should equal 658 // to or smaller than surface width/height 659 *pdwSurfaceHeight = MOS_ALIGN_CEIL( 660 MOS_MIN(pCurrSurf->dwHeight, MOS_MAX((uint32_t)pCurrSurf->rcMaxSrc.bottom, MHW_VEBOX_MIN_HEIGHT)), 661 wHeightAlignUnit); 662 *pdwSurfaceWidth = MOS_ALIGN_CEIL( 663 MOS_MIN(pCurrSurf->dwWidth, MOS_MAX((uint32_t)pCurrSurf->rcMaxSrc.right, MHW_VEBOX_MIN_WIDTH)), 664 wWidthAlignUnit); 665 MHW_NORMALMESSAGE("bVEBOXCroppingUsed = false, SurfInput.rcMaxSrc.bottom: %d, SurfInput.rcMaxSrc.right: %d; pdwSurfaceHeight: %d, pdwSurfaceWidth: %d;", 666 (uint32_t)pCurrSurf->rcMaxSrc.bottom, 667 (uint32_t)pCurrSurf->rcMaxSrc.right, 668 *pdwSurfaceHeight, 669 *pdwSurfaceWidth); 670 } 671 672 return eStatus; 673 } 674 675 //! 676 //! \brief Set which vebox can be used by HW 677 //! \details VPHAL set which VEBOX can be use by HW 678 //! \param [in] dwVeboxIndex; 679 //! set which Vebox can be used by HW 680 //! \param [in] dwVeboxCount; 681 //! set Vebox Count 682 //! \param [in] dwUsingSFC; 683 //! set whether using SFC 684 //! \return MOS_STATUS 685 //! MOS_STATUS_SUCCESS if success, else fail reason SetVeboxIndex(uint32_t dwVeboxIndex,uint32_t dwVeboxCount,uint32_t dwUsingSFC)686 MOS_STATUS SetVeboxIndex( 687 uint32_t dwVeboxIndex, 688 uint32_t dwVeboxCount, 689 uint32_t dwUsingSFC) override 690 { 691 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 692 693 MHW_ASSERT(dwVeboxIndex < dwVeboxCount); 694 695 m_indexofVebox = dwVeboxIndex; 696 m_numofVebox = dwVeboxCount; 697 m_veboxScalabilityEnabled = (dwVeboxCount > 1) ? m_veboxScalabilitySupported : false; 698 m_usingSfc = dwUsingSFC; 699 700 return eStatus; 701 } 702 TraceIndirectStateInfo(MOS_COMMAND_BUFFER & cmdBuffer,MOS_CONTEXT & mosContext,bool isCmBuffer,bool useVeboxHeapKernelResource)703 MOS_STATUS TraceIndirectStateInfo(MOS_COMMAND_BUFFER& cmdBuffer, MOS_CONTEXT& mosContext, bool isCmBuffer, bool useVeboxHeapKernelResource) 704 { 705 if (isCmBuffer) 706 { 707 char ocaLog[] = "Vebox indirect state use CmBuffer"; 708 HalOcaInterfaceNext::TraceMessage(cmdBuffer, (MOS_CONTEXT_HANDLE)&mosContext, ocaLog, sizeof(ocaLog)); 709 } 710 else 711 { 712 if (useVeboxHeapKernelResource) 713 { 714 char ocaLog[] = "Vebox indirect state use KernelResource"; 715 HalOcaInterfaceNext::TraceMessage(cmdBuffer, (MOS_CONTEXT_HANDLE)&mosContext, ocaLog, sizeof(ocaLog)); 716 } 717 else 718 { 719 char ocaLog[] = "Vebox indirect state use DriverResource"; 720 HalOcaInterfaceNext::TraceMessage(cmdBuffer, (MOS_CONTEXT_HANDLE)&mosContext, ocaLog, sizeof(ocaLog)); 721 } 722 } 723 return MOS_STATUS_SUCCESS; 724 } 725 726 //! 727 //! \brief Create Gpu Context for Vebox 728 //! \details Create Gpu Context for Vebox 729 //! \param [in] pOsInterface 730 //! OS interface 731 //! \param [in] VeboxGpuContext 732 //! Vebox Gpu Context 733 //! \param [in] VeboxGpuNode 734 //! Vebox Gpu Node 735 //! \return MOS_STATUS 736 //! MOS_STATUS_SUCCESS if success, else fail reason 737 //! CreateGpuContext(PMOS_INTERFACE pOsInterface,MOS_GPU_CONTEXT VeboxGpuContext,MOS_GPU_NODE VeboxGpuNode)738 MOS_STATUS CreateGpuContext( 739 PMOS_INTERFACE pOsInterface, 740 MOS_GPU_CONTEXT VeboxGpuContext, 741 MOS_GPU_NODE VeboxGpuNode) override 742 { 743 MEDIA_FEATURE_TABLE *skuTable; 744 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 745 746 MHW_CHK_NULL_RETURN(pOsInterface); 747 748 skuTable = pOsInterface->pfnGetSkuTable(pOsInterface); 749 MHW_CHK_NULL_RETURN(skuTable); 750 751 #if (_DEBUG || _RELEASE_INTERNAL) 752 if (MEDIA_IS_SKU(skuTable, FtrContextBasedScheduling) && pOsInterface->bVeboxScalabilityMode) 753 { 754 pOsInterface->ctxBasedScheduling = true; 755 } 756 #endif 757 758 if (!MOS_VE_CTXBASEDSCHEDULING_SUPPORTED(pOsInterface)) 759 { 760 MOS_GPUCTX_CREATOPTIONS createOption; 761 762 // Create VEBOX/VEBOX2 Context 763 MHW_CHK_STATUS_RETURN(pOsInterface->pfnCreateGpuContext( 764 pOsInterface, 765 VeboxGpuContext, 766 VeboxGpuNode, 767 &createOption)); 768 } 769 else 770 { 771 MOS_GPUCTX_CREATOPTIONS_ENHANCED createOptionenhanced; 772 MEDIA_SYSTEM_INFO* pGtSystemInfo; 773 774 pGtSystemInfo = pOsInterface->pfnGetGtSystemInfo(pOsInterface); 775 MHW_CHK_NULL_RETURN(pGtSystemInfo); 776 777 if (pOsInterface->ctxBasedScheduling) 778 { 779 createOptionenhanced.LRCACount = pGtSystemInfo->VEBoxInfo.NumberOfVEBoxEnabled; 780 } 781 else 782 { 783 createOptionenhanced.LRCACount = 1; 784 createOptionenhanced.UsingSFC = true; 785 } 786 787 // Create VEBOX/VEBOX2 Context 788 MHW_CHK_STATUS_RETURN(pOsInterface->pfnCreateGpuContext( 789 pOsInterface, 790 VeboxGpuContext, 791 VeboxGpuNode, 792 &createOptionenhanced)); 793 } 794 795 return eStatus; 796 } 797 798 #if (_DEBUG || _RELEASE_INTERNAL) ValidateVeboxScalabilityConfig()799 MOS_STATUS ValidateVeboxScalabilityConfig() 800 { 801 MEDIA_SYSTEM_INFO* pGtSystemInfo = nullptr; 802 MOS_FORCE_VEBOX eForceVebox; 803 bool bScalableVEMode; 804 bool bUseVE1, bUseVE2, bUseVE3, bUseVE4; 805 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 806 807 MHW_CHK_NULL_RETURN(this->m_osItf); 808 809 eForceVebox = this->m_osItf->eForceVebox; 810 bScalableVEMode = ((this->m_osItf->bVeboxScalabilityMode) ? true : false); 811 pGtSystemInfo = this->m_osItf->pfnGetGtSystemInfo(this->m_osItf); 812 MHW_CHK_NULL_RETURN(pGtSystemInfo); 813 814 if (eForceVebox != MOS_FORCE_VEBOX_NONE && 815 eForceVebox != MOS_FORCE_VEBOX_1 && 816 eForceVebox != MOS_FORCE_VEBOX_2 && 817 eForceVebox != MOS_FORCE_VEBOX_1_2 && 818 eForceVebox != MOS_FORCE_VEBOX_1_2_3 && 819 eForceVebox != MOS_FORCE_VEBOX_1_2_3_4) 820 { 821 eStatus = MOS_STATUS_INVALID_PARAMETER; 822 MHW_ASSERTMESSAGE("eForceVebox value is invalid."); 823 return eStatus; 824 } 825 826 if (!bScalableVEMode && 827 (eForceVebox == MOS_FORCE_VEBOX_1_2 || 828 eForceVebox == MOS_FORCE_VEBOX_1_2_3 || 829 eForceVebox == MOS_FORCE_VEBOX_1_2_3_4)) 830 { 831 eStatus = MOS_STATUS_INVALID_PARAMETER; 832 MHW_ASSERTMESSAGE("eForceVebox value is not consistent with scalability mode."); 833 834 return eStatus; 835 } 836 837 if (bScalableVEMode && !m_veboxScalabilitySupported) 838 { 839 eStatus = MOS_STATUS_INVALID_PARAMETER; 840 MHW_ASSERTMESSAGE("scalability mode is not allowed on current platform!"); 841 842 return eStatus; 843 } 844 845 bUseVE1 = bUseVE2 = bUseVE3 = bUseVE4 = false; 846 if (eForceVebox == MOS_FORCE_VEBOX_NONE) 847 { 848 bUseVE1 = true; 849 } 850 else 851 { 852 MHW_VEBOX_IS_VEBOX_SPECIFIED_IN_CONFIG(eForceVebox, MOS_FORCE_VEBOX_1, MOS_FORCEVEBOX_VEBOXID_BITSNUM, MOS_FORCEVEBOX_MASK, bUseVE1); 853 MHW_VEBOX_IS_VEBOX_SPECIFIED_IN_CONFIG(eForceVebox, MOS_FORCE_VEBOX_2, MOS_FORCEVEBOX_VEBOXID_BITSNUM, MOS_FORCEVEBOX_MASK, bUseVE2); 854 MHW_VEBOX_IS_VEBOX_SPECIFIED_IN_CONFIG(eForceVebox, MOS_FORCE_VEBOX_3, MOS_FORCEVEBOX_VEBOXID_BITSNUM, MOS_FORCEVEBOX_MASK, bUseVE3); 855 MHW_VEBOX_IS_VEBOX_SPECIFIED_IN_CONFIG(eForceVebox, MOS_FORCE_VEBOX_4, MOS_FORCEVEBOX_VEBOXID_BITSNUM, MOS_FORCEVEBOX_MASK, bUseVE4); 856 } 857 858 if (!pGtSystemInfo->VEBoxInfo.IsValid || 859 (uint32_t)(bUseVE1 + bUseVE2 + bUseVE3 + bUseVE4) > pGtSystemInfo->VEBoxInfo.NumberOfVEBoxEnabled) 860 { 861 eStatus = MOS_STATUS_INVALID_PARAMETER; 862 MHW_ASSERTMESSAGE("the forced VEBOX is not enabled in current platform."); 863 } 864 865 return eStatus; 866 } 867 #endif 868 VeboxAdjustBoundary(PMHW_VEBOX_SURFACE_PARAMS pcurrSurf,uint32_t * pdwSurfaceWidth,uint32_t * pdwSurfaceHeight,bool bDIEnable)869 MOS_STATUS VeboxAdjustBoundary( 870 PMHW_VEBOX_SURFACE_PARAMS pcurrSurf, 871 uint32_t * pdwSurfaceWidth, 872 uint32_t * pdwSurfaceHeight, 873 bool bDIEnable) override 874 { 875 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 876 877 MHW_CHK_NULL_RETURN(pdwSurfaceWidth); 878 MHW_CHK_NULL_RETURN(pdwSurfaceHeight); 879 880 MHW_CHK_STATUS_RETURN(AdjustBoundary(pcurrSurf, pdwSurfaceWidth, pdwSurfaceHeight, bDIEnable)); 881 // match the vebox width with sfc input width to fix corruption issue when sfc scalability enabled 882 if (m_veboxScalabilityEnabled && m_usingSfc && this->m_osItf->bSimIsActive) 883 { 884 *pdwSurfaceWidth = MOS_ALIGN_CEIL(*pdwSurfaceWidth, 16); 885 *pdwSurfaceHeight = MOS_ALIGN_CEIL(*pdwSurfaceHeight, 4); 886 } 887 888 return eStatus; 889 } 890 FindVeboxGpuNodeToUse(PMHW_VEBOX_GPUNODE_LIMIT pGpuNodeLimit)891 MOS_STATUS FindVeboxGpuNodeToUse( 892 PMHW_VEBOX_GPUNODE_LIMIT pGpuNodeLimit) override 893 { 894 MOS_GPU_NODE VeboxGpuNode = MOS_GPU_NODE_VE; 895 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 896 897 MHW_CHK_NULL_RETURN(pGpuNodeLimit); 898 899 // KMD Virtual Engine, use virtual GPU NODE-- MOS_GPU_NODE_VE 900 pGpuNodeLimit->dwGpuNodeToUse = VeboxGpuNode; 901 902 #if !EMUL 903 #if (_DEBUG || _RELEASE_INTERNAL) 904 if (Mos_Solo_IsInUse(this->m_osItf)) 905 { 906 MHW_CHK_STATUS_RETURN(ValidateVeboxScalabilityConfig()); 907 } 908 #endif 909 910 Mos_Solo_CheckNodeLimitation(this->m_osItf, &pGpuNodeLimit->dwGpuNodeToUse); 911 #endif 912 913 return eStatus; 914 } 915 SetVeboxInUse(bool inputVebox0,bool inputVebox1)916 MOS_STATUS SetVeboxInUse( 917 bool inputVebox0, 918 bool inputVebox1) 919 { 920 MOS_STATUS eStatus = MOS_STATUS_SUCCESS; 921 922 m_vebox0InUse = inputVebox0; 923 m_vebox1InUse = inputVebox1; 924 925 return eStatus; 926 } 927 IsScalabilitySupported()928 bool IsScalabilitySupported() 929 { 930 return m_veboxScalabilitySupported; 931 } 932 AddVeboxSurfaces(PMOS_COMMAND_BUFFER pCmdBufferInUse,PMHW_VEBOX_SURFACE_STATE_CMD_PARAMS pVeboxSurfaceStateCmdParams)933 MOS_STATUS AddVeboxSurfaces( 934 PMOS_COMMAND_BUFFER pCmdBufferInUse, 935 PMHW_VEBOX_SURFACE_STATE_CMD_PARAMS pVeboxSurfaceStateCmdParams) override 936 { 937 return MOS_STATUS_SUCCESS; 938 } 939 IsVeboxScalabilitywith4K()940 bool IsVeboxScalabilitywith4K() override 941 { 942 return m_veboxScalabilitywith4K; 943 } 944 Add1DLutState(void * & surface,PMHW_1DLUT_PARAMS p1DLutParams)945 MOS_STATUS Add1DLutState(void *&surface, PMHW_1DLUT_PARAMS p1DLutParams) override 946 { 947 return MOS_STATUS_SUCCESS; 948 } 949 AddFP16State(PMHW_FP16_PARAMS pFP16Params)950 MOS_STATUS AddFP16State(PMHW_FP16_PARAMS pFP16Params) override 951 { 952 return MOS_STATUS_SUCCESS; 953 } 954 _MHW_SETCMD_OVERRIDE_DECL(VEBOX_SURFACE_STATE)955 _MHW_SETCMD_OVERRIDE_DECL(VEBOX_SURFACE_STATE) 956 { 957 _MHW_SETCMD_CALLBASE(VEBOX_SURFACE_STATE); 958 cmd.DW1.SurfaceIdentification = params.SurfaceIdentification; 959 cmd.DW2.Width = params.Width; 960 cmd.DW2.Height = params.Height; 961 962 cmd.DW3.HalfPitchForChroma = params.HalfPitchForChroma; 963 cmd.DW3.InterleaveChroma = params.InterleaveChroma; 964 cmd.DW3.SurfaceFormat = params.SurfaceFormat; 965 cmd.DW3.BayerInputAlignment = params.BayerInputAlignment; 966 cmd.DW3.BayerPatternOffset = params.BayerPatternOffset; 967 cmd.DW3.BayerPatternFormat = params.BayerPatternFormat; 968 cmd.DW3.SurfacePitch = params.SurfacePitch; 969 cmd.DW3.TileMode = params.TileMode; 970 971 cmd.DW4.XOffsetForU = params.XOffsetForU; 972 cmd.DW4.YOffsetForU = params.YOffsetForU; 973 cmd.DW5.XOffsetForV = params.XOffsetForV; 974 cmd.DW5.YOffsetForV = params.YOffsetForV; 975 976 // May fix this for stereo surfaces 977 cmd.DW6.YOffsetForFrame = params.YOffsetForFrame; 978 cmd.DW6.XOffsetForFrame = params.XOffsetForFrame; 979 980 cmd.DW7.DerivedSurfacePitch = params.DerivedSurfacePitch; 981 cmd.DW8.SurfacePitchForSkinScoreOutputSurfaces = params.SurfacePitchForSkinScoreOutputSurfaces; 982 983 cmd.DW7.CompressionFormat = params.CompressionFormat; 984 985 return MOS_STATUS_SUCCESS; 986 } 987 _MHW_SETCMD_OVERRIDE_DECL(VEBOX_STATE)988 _MHW_SETCMD_OVERRIDE_DECL(VEBOX_STATE) 989 { 990 _MHW_SETCMD_CALLBASE(VEBOX_STATE); 991 992 return MOS_STATUS_SUCCESS; 993 } 994 _MHW_SETCMD_OVERRIDE_DECL(VEBOX_TILING_CONVERT)995 _MHW_SETCMD_OVERRIDE_DECL(VEBOX_TILING_CONVERT) 996 { 997 _MHW_SETCMD_CALLBASE(VEBOX_TILING_CONVERT); 998 999 return MOS_STATUS_SUCCESS; 1000 } 1001 _MHW_SETCMD_OVERRIDE_DECL(VEB_DI_IECP)1002 _MHW_SETCMD_OVERRIDE_DECL(VEB_DI_IECP) 1003 { 1004 _MHW_SETCMD_CALLBASE(VEB_DI_IECP); 1005 1006 return MOS_STATUS_SUCCESS; 1007 } 1008 1009 protected: 1010 using base_t = Itf; 1011 1012 bool m_veboxScalabilitySupported = false; 1013 bool m_veboxScalabilityEnabled = false; 1014 bool m_vebox0InUse = false; 1015 bool m_vebox1InUse = false; 1016 uint32_t m_indexofVebox = 0; 1017 uint32_t m_numofVebox = 1; 1018 uint32_t m_usingSfc = 0; 1019 uint32_t m_veboxSplitRatio = 0; 1020 MHW_LACE_COLOR_CORRECTION m_laceColorCorrection = {}; 1021 uint32_t m_BT2020InvPixelValue[256] = {}; 1022 uint32_t m_BT2020FwdPixelValue[256] = {}; 1023 uint32_t m_BT2020InvGammaLUT[256] = {}; 1024 uint32_t m_BT2020FwdGammaLUT[256] = {}; 1025 uint32_t dwLumaStadTh = 3200; 1026 uint32_t dwChromaStadTh = 1600; 1027 uint32_t dw4X4TGNEThCnt = 576; 1028 uint32_t dwHistoryInit = 32; 1029 uint32_t dwBSDThreshold = 480; 1030 bool bTGNEEnable = false; 1031 bool bHVSAutoBdrateEnable = false; 1032 bool bHVSAutoSubjectiveEnable = false; 1033 bool bHVSfallback = false; 1034 1035 MHW_VEBOX_HEAP *m_veboxHeap = nullptr; 1036 MHW_VEBOX_SETTINGS m_veboxSettings = {}; 1037 bool m_veboxScalabilitywith4K = false; 1038 MHW_VEBOX_CHROMA_PARAMS m_chromaParams = {}; 1039 1040 //VPHAL_HVSDENOISE_PARAMS m_HvsParams = {}; 1041 MHW_VEBOX_DNDI_PARAMS m_veboxDNDIParams = {}; 1042 MHW_VEBOX_IECP_PARAMS m_veboxIecpParams = {}; 1043 MHW_VEBOX_CHROMA_SAMPLING m_chromaSampling = {}; 1044 MHW_VEBOX_GAMUT_PARAMS m_veboxGamutParams = {}; 1045 1046 int m_veboxHeapInUse = 0; 1047 1048 MEDIA_CLASS_DEFINE_END(mhw__vebox__Impl) 1049 }; 1050 } // namespace render 1051 } // namespace mhw 1052 1053 #endif // __MHW_RENDER_IMPL_H__ 1054