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Searched defs:ShiftImm (Results 1 – 25 of 26) sorted by relevance

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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Mips/
H A DMipsExpandPseudo.cpp181 const unsigned ShiftImm = in expandAtomicCmpSwapSubword() local
557 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24; in expandAtomicBinOpSubword() local
H A DMipsISelLowering.cpp1642 int64_t ShiftImm = 32 - (Size * 8); in emitSignExtendToI32InReg() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
H A DMipsExpandPseudo.cpp181 const unsigned ShiftImm = in expandAtomicCmpSwapSubword() local
557 const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24; in expandAtomicBinOpSubword() local
H A DMipsISelLowering.cpp1638 int64_t ShiftImm = 32 - (Size * 8); in emitSignExtendToI32InReg() local
/aosp_15_r20/external/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp516 unsigned ShiftImm; // shift for OffsetReg. member
526 unsigned ShiftImm; member
538 unsigned ShiftImm; member
544 unsigned ShiftImm; member
2650 unsigned ShiftReg, unsigned ShiftImm, SMLoc S, in CreateShiftedRegister()
2664 unsigned ShiftImm, SMLoc S, SMLoc E) { in CreateShiftedImmediate()
2805 unsigned ShiftImm, unsigned Alignment, bool isNegative, SMLoc S, in CreateMem()
2823 unsigned ShiftImm, SMLoc S, SMLoc E) { in CreatePostIdxReg()
4667 unsigned ShiftImm = 0; in parsePostIdxReg() local
4993 unsigned ShiftImm = 0; in parseMemory() local
/aosp_15_r20/external/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp1277 unsigned ShiftImm; in emitAddSub_ri() local
1318 uint64_t ShiftImm, bool SetFlags, in emitAddSub_rs()
1359 uint64_t ShiftImm, bool SetFlags, in emitAddSub_rx()
1514 uint64_t ShiftImm, bool WantResult) { in emitSubs_rs()
1653 uint64_t ShiftImm) { in emitLogicalOp_rs()
H A DAArch64ISelDAGToDAG.cpp1526 uint64_t ShiftImm; in isBitfieldExtractOpFromSExtInReg() local
1662 uint64_t ShiftImm; in tryBitfieldExtractOpFromSExt() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp1360 unsigned ShiftImm; in emitAddSub_ri() local
1401 uint64_t ShiftImm, bool SetFlags, in emitAddSub_rs()
1444 uint64_t ShiftImm, bool SetFlags, in emitAddSub_rx()
1601 uint64_t ShiftImm, bool WantResult) { in emitSubs_rs()
1740 uint64_t ShiftImm) { in emitLogicalOp_rs()
H A DAArch64ISelDAGToDAG.cpp1679 uint64_t ShiftImm; in isBitfieldExtractOpFromSExtInReg() local
1816 uint64_t ShiftImm; in tryBitfieldExtractOpFromSExt() local
H A DAArch64InstructionSelector.cpp1066 Optional<int64_t> ShiftImm = getVectorShiftImm(Reg, MRI); in getVectorSHLImm() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp1349 unsigned ShiftImm; in emitAddSub_ri() local
1389 uint64_t ShiftImm, bool SetFlags, in emitAddSub_rs()
1431 uint64_t ShiftImm, bool SetFlags, in emitAddSub_rx()
1582 uint64_t ShiftImm, bool WantResult) { in emitSubs_rs()
1712 uint64_t ShiftImm) { in emitLogicalOp_rs()
H A DAArch64ISelDAGToDAG.cpp2185 uint64_t ShiftImm; in isBitfieldExtractOpFromSExtInReg() local
2316 uint64_t ShiftImm; in tryBitfieldExtractOpFromSExt() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp787 unsigned ShiftImm; // shift for OffsetReg. member
797 unsigned ShiftImm; member
809 unsigned ShiftImm; member
815 unsigned ShiftImm; member
3461 unsigned ShiftReg, unsigned ShiftImm, SMLoc S, in CreateShiftedRegister()
3475 unsigned ShiftImm, SMLoc S, SMLoc E) { in CreateShiftedImmediate()
3627 unsigned ShiftImm, unsigned Alignment, bool isNegative, SMLoc S, in CreateMem()
3645 unsigned ShiftImm, SMLoc S, SMLoc E) { in CreatePostIdxReg()
5461 unsigned ShiftImm = 0; in parsePostIdxReg() local
5806 unsigned ShiftImm = 0; in parseMemory() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp863 unsigned ShiftImm; // shift for OffsetReg. member
873 unsigned ShiftImm; member
885 unsigned ShiftImm; member
891 unsigned ShiftImm; member
3650 unsigned ShiftReg, unsigned ShiftImm, SMLoc S, in CreateShiftedRegister()
3664 unsigned ShiftImm, SMLoc S, SMLoc E) { in CreateShiftedImmediate()
3814 ARM_AM::ShiftOpc ShiftType, unsigned ShiftImm, unsigned Alignment, in CreateMem()
3832 unsigned ShiftImm, SMLoc S, SMLoc E) { in CreatePostIdxReg()
5666 unsigned ShiftImm = 0; in parsePostIdxReg() local
6006 unsigned ShiftImm = 0; in parseMemory() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/
H A DPPCMIPeephole.cpp694 unsigned ShiftImm = DefMI->getOperand(3).getImm(); in simplifyCode() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
H A DPPCMIPeephole.cpp501 unsigned ShiftImm = DefMI->getOperand(3).getImm(); in simplifyCode() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCCodeEmitter.cpp951 unsigned Size, ShiftImm; in getMVEShiftImmOpValue() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCCodeEmitter.cpp957 unsigned Size, ShiftImm; in getMVEShiftImmOpValue() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
H A DARMFastISel.cpp2780 unsigned ShiftImm; in SelectShift() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/
H A DARMFastISel.cpp2783 unsigned ShiftImm; in SelectShift() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp1796 std::optional<int64_t> ShiftImm = getVectorShiftImm(Reg, MRI); in getVectorSHLImm() local
2333 int64_t ShiftImm; in earlySelect() local
/aosp_15_r20/external/llvm/lib/Target/ARM/
H A DARMFastISel.cpp2759 unsigned ShiftImm; in SelectShift() local
/aosp_15_r20/external/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp1218 int64_t ShiftImm = 32 - (Size * 8); in emitSignExtendToI32InReg() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp4353 int64_t ShiftImm; in matchBitfieldExtractFromSExtInReg() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp6261 const APInt &ShiftImm = N2C->getAPIntValue(); in getNode() local

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