| /aosp_15_r20/external/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 1231 unsigned ShiftReg = RI.createVirtualRegister(RC); in EmitShiftInstr() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 1502 Register ShiftReg = RI.createVirtualRegister(RC); in EmitShiftInstr() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 1519 Register ShiftReg = RI.createVirtualRegister(RC); in insertShift() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 1503 Register ShiftReg = RI.createVirtualRegister(RC); in EmitShiftInstr() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstructionSelector.cpp | 1266 Register ShiftReg = I.getOperand(2).getReg(); in preISelLower() local
4704 Register ShiftReg = ShiftLHS.getReg(); in selectShiftedRegister() local
|
| H A D | AArch64FastISel.cpp | 3764 unsigned ShiftReg = emitLSR_ri(MVT::i64, MVT::i64, MulReg, in fastLowerIntrinsicCall() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 1802 Register ShiftReg = RI.createVirtualRegister(RC); in insertShift() local
|
| /aosp_15_r20/external/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 537 unsigned ShiftReg; member
2650 unsigned ShiftReg, unsigned ShiftImm, SMLoc S, in CreateShiftedRegister()
3123 int ShiftReg = 0; in tryParseShiftRegister() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 3035 Register ShiftReg = I.getOperand(2).getReg(); in select() local
6609 Register ShiftReg = ShiftLHS.getReg(); in selectShiftedRegister() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 808 unsigned ShiftReg; member
3461 unsigned ShiftReg, unsigned ShiftImm, SMLoc S, in CreateShiftedRegister()
3981 int ShiftReg = 0; in tryParseShiftRegister() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 884 unsigned ShiftReg; member
3650 unsigned ShiftReg, unsigned ShiftImm, SMLoc S, in CreateShiftedRegister()
4176 int ShiftReg = 0; in tryParseShiftRegister() local
|
| /aosp_15_r20/external/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 3594 unsigned ShiftReg = emitLSR_ri(MVT::i64, MVT::i64, MulReg, in fastLowerIntrinsicCall() local
|
| /aosp_15_r20/external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 8543 unsigned ShiftReg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local
9258 unsigned ShiftReg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 10784 Register ShiftReg = in EmitPartwordAtomicBinary() local
11595 Register ShiftReg = in EmitInstrWithCustomInserter() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 11771 Register ShiftReg = in EmitPartwordAtomicBinary() local
12763 Register ShiftReg = in EmitInstrWithCustomInserter() local
|