| /aosp_15_r20/external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 1139 unsigned Src1Reg = MI.getOperand(1).getReg(); in expandPostRAPseudo() local
1163 unsigned Src1Reg = MI.getOperand(1).getReg(); in expandPostRAPseudo() local
1193 unsigned Src1Reg = MI.getOperand(1).getReg(); in expandPostRAPseudo() local
3304 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; in getCompoundCandidateGroup() local
3638 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
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| /aosp_15_r20/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCDuplexInfo.cpp | 178 unsigned DstReg, PredReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
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| H A D | HexagonMCCompound.cpp | 84 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; in getCompoundCandidateGroup() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCCompound.cpp | 80 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; in getCompoundCandidateGroup() local
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| H A D | HexagonMCDuplexInfo.cpp | 191 unsigned DstReg, PredReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCDuplexInfo.cpp | 190 unsigned DstReg, PredReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
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| H A D | HexagonMCCompound.cpp | 81 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; in getCompoundCandidateGroup() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/SystemZ/ |
| H A D | SystemZPostRewrite.cpp | 104 Register Src1Reg = MBBI->getOperand(1).getReg(); in selectSELRMux() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| H A D | SystemZPostRewrite.cpp | 111 Register Src1Reg = MBBI->getOperand(1).getReg(); in selectSELRMux() local
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| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567/include/llvm/CodeGen/GlobalISel/ |
| D | LegalizationArtifactCombiner.h | 605 Register Src1Reg = Concat.getSourceReg(0); in findValueFromConcat() local
637 Register Src1Reg = BV.getSourceReg(0); in findValueFromBuildVector() local
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| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r536225/include/llvm/CodeGen/GlobalISel/ |
| D | LegalizationArtifactCombiner.h | 609 Register Src1Reg = Concat.getSourceReg(0); in findValueFromConcat() local
641 Register Src1Reg = BV.getSourceReg(0); in findValueFromBuildVector() local
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| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567b/include/llvm/CodeGen/GlobalISel/ |
| D | LegalizationArtifactCombiner.h | 605 Register Src1Reg = Concat.getSourceReg(0); in findValueFromConcat() local
637 Register Src1Reg = BV.getSourceReg(0); in findValueFromBuildVector() local
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| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r522817/include/llvm/CodeGen/GlobalISel/ |
| D | LegalizationArtifactCombiner.h | 605 Register Src1Reg = Concat.getSourceReg(0); in findValueFromConcat() local
637 Register Src1Reg = BV.getSourceReg(0); in findValueFromBuildVector() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizationArtifactCombiner.h | 574 Register Src1Reg = Concat.getSourceReg(0); in findValueFromConcat() local
606 Register Src1Reg = BV.getSourceReg(0); in findValueFromBuildVector() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 1177 Register Src1Reg = MI.getOperand(1).getReg(); in expandPostRAPseudo() local
1201 Register Src1Reg = MI.getOperand(1).getReg(); in expandPostRAPseudo() local
3294 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; in getCompoundCandidateGroup() local
3726 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 1286 Register Src1Reg = MI.getOperand(1).getReg(); in expandPostRAPseudo() local
1310 Register Src1Reg = MI.getOperand(1).getReg(); in expandPostRAPseudo() local
3395 Register DstReg, SrcReg, Src1Reg, Src2Reg; in getCompoundCandidateGroup() local
3893 Register DstReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerLowering.cpp | 689 Register Src1Reg = MI.getOperand(1).getReg(); in matchDupLane() local
741 Register Src1Reg = MI.getOperand(1).getReg(); in applyDupLane() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 275 Register Src1Reg = MI->getOperand(2).getReg(); in ExpandFPMLxInstruction() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 275 Register Src1Reg = MI->getOperand(2).getReg(); in ExpandFPMLxInstruction() local
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| /aosp_15_r20/external/llvm/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 278 unsigned Src1Reg = MI->getOperand(2).getReg(); in ExpandFPMLxInstruction() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 415 Register Src1Reg = I.getOperand(3).getReg(); in selectG_UADDO_USUBO_UADDE_USUBE() local
590 Register Src1Reg = I.getOperand(2).getReg(); in selectG_INSERT() local
653 Register Src1Reg = I.getOperand(3).getReg(); in selectG_INTRINSIC() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstructionSelector.cpp | 1102 Register Src1Reg = I.getOperand(1).getReg(); in selectVectorSHL() local
1140 Register Src1Reg = I.getOperand(1).getReg(); in selectVectorASHR() local
2822 Register Src1Reg = I.getOperand(1).getReg(); in selectMergeValues() local
3777 Register Src1Reg = I.getOperand(1).getReg(); in selectShuffleVector() local
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| H A D | AArch64FastISel.cpp | 2689 unsigned Src1Reg = getRegForValue(Src1Val); in optimizeSelect() local
2819 unsigned Src1Reg = getRegForValue(SI->getTrueValue()); in selectSelect() local
4666 unsigned Src1Reg = getRegForValue(I->getOperand(1)); in selectRem() local
4744 unsigned Src1Reg = getRegForValue(I->getOperand(1)); in selectMul() local
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| /aosp_15_r20/external/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 2558 unsigned Src1Reg = getRegForValue(Src1Val); in optimizeSelect() local
2688 unsigned Src1Reg = getRegForValue(SI->getTrueValue()); in selectSelect() local
4487 unsigned Src1Reg = getRegForValue(I->getOperand(1)); in selectRem() local
4565 unsigned Src1Reg = getRegForValue(I->getOperand(1)); in selectMul() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 2657 Register Src1Reg = getRegForValue(Src1Val); in optimizeSelect() local
2780 Register Src1Reg = getRegForValue(SI->getTrueValue()); in selectSelect() local
4589 Register Src1Reg = getRegForValue(I->getOperand(1)); in selectRem() local
4661 Register Src1Reg = getRegForValue(I->getOperand(1)); in selectMul() local
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