/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 130 SrcOp(Register R) : Reg(R), Ty(SrcType::Ty_Reg) {} in SrcOp() function 131 SrcOp(const MachineOperand &Op) : Reg(Op.getReg()), Ty(SrcType::Ty_Reg) {} in SrcOp() function 132 SrcOp(const MachineInstrBuilder &MIB) : SrcMIB(MIB), Ty(SrcType::Ty_MIB) {} in SrcOp() function 133 SrcOp(const CmpInst::Predicate P) : Pred(P), Ty(SrcType::Ty_Predicate) {} in SrcOp() function 139 SrcOp(uint64_t V) : Imm(V), Ty(SrcType::Ty_Imm) {} in SrcOp() function 140 SrcOp(int64_t V) : Imm(V), Ty(SrcType::Ty_Imm) {} in SrcOp() function
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H A D | LegalizationArtifactCombiner.h | 300 unsigned SrcOp = SrcDef->getOpcode(); in tryCombineMerges() local
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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 138 SrcOp(Register R) : Reg(R), Ty(SrcType::Ty_Reg) {} in SrcOp() function 139 SrcOp(const MachineOperand &Op) : Reg(Op.getReg()), Ty(SrcType::Ty_Reg) {} in SrcOp() function 140 SrcOp(const MachineInstrBuilder &MIB) : SrcMIB(MIB), Ty(SrcType::Ty_MIB) {} in SrcOp() function 141 SrcOp(const CmpInst::Predicate P) : Pred(P), Ty(SrcType::Ty_Predicate) {} in SrcOp() function 147 SrcOp(uint64_t V) : Imm(V), Ty(SrcType::Ty_Imm) {} in SrcOp() function 148 SrcOp(int64_t V) : Imm(V), Ty(SrcType::Ty_Imm) {} in SrcOp() function
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/aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r536225/include/llvm/CodeGen/GlobalISel/ |
D | MachineIRBuilder.h | 141 SrcOp(Register R) : Reg(R), Ty(SrcType::Ty_Reg) {} in SrcOp() function 142 SrcOp(const MachineOperand &Op) : Reg(Op.getReg()), Ty(SrcType::Ty_Reg) {} in SrcOp() function 143 SrcOp(const MachineInstrBuilder &MIB) : SrcMIB(MIB), Ty(SrcType::Ty_MIB) {} in SrcOp() function 144 SrcOp(const CmpInst::Predicate P) : Pred(P), Ty(SrcType::Ty_Predicate) {} in SrcOp() function 150 SrcOp(uint64_t V) : Imm(V), Ty(SrcType::Ty_Imm) {} in SrcOp() function 151 SrcOp(int64_t V) : Imm(V), Ty(SrcType::Ty_Imm) {} in SrcOp() function
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/aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r522817/include/llvm/CodeGen/GlobalISel/ |
D | MachineIRBuilder.h | 138 SrcOp(Register R) : Reg(R), Ty(SrcType::Ty_Reg) {} in SrcOp() function 139 SrcOp(const MachineOperand &Op) : Reg(Op.getReg()), Ty(SrcType::Ty_Reg) {} in SrcOp() function 140 SrcOp(const MachineInstrBuilder &MIB) : SrcMIB(MIB), Ty(SrcType::Ty_MIB) {} in SrcOp() function 141 SrcOp(const CmpInst::Predicate P) : Pred(P), Ty(SrcType::Ty_Predicate) {} in SrcOp() function 147 SrcOp(uint64_t V) : Imm(V), Ty(SrcType::Ty_Imm) {} in SrcOp() function 148 SrcOp(int64_t V) : Imm(V), Ty(SrcType::Ty_Imm) {} in SrcOp() function
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/aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567b/include/llvm/CodeGen/GlobalISel/ |
D | MachineIRBuilder.h | 138 SrcOp(Register R) : Reg(R), Ty(SrcType::Ty_Reg) {} in SrcOp() function 139 SrcOp(const MachineOperand &Op) : Reg(Op.getReg()), Ty(SrcType::Ty_Reg) {} in SrcOp() function 140 SrcOp(const MachineInstrBuilder &MIB) : SrcMIB(MIB), Ty(SrcType::Ty_MIB) {} in SrcOp() function 141 SrcOp(const CmpInst::Predicate P) : Pred(P), Ty(SrcType::Ty_Predicate) {} in SrcOp() function 147 SrcOp(uint64_t V) : Imm(V), Ty(SrcType::Ty_Imm) {} in SrcOp() function 148 SrcOp(int64_t V) : Imm(V), Ty(SrcType::Ty_Imm) {} in SrcOp() function
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/aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567/include/llvm/CodeGen/GlobalISel/ |
D | MachineIRBuilder.h | 138 SrcOp(Register R) : Reg(R), Ty(SrcType::Ty_Reg) {} in SrcOp() function 139 SrcOp(const MachineOperand &Op) : Reg(Op.getReg()), Ty(SrcType::Ty_Reg) {} in SrcOp() function 140 SrcOp(const MachineInstrBuilder &MIB) : SrcMIB(MIB), Ty(SrcType::Ty_MIB) {} in SrcOp() function 141 SrcOp(const CmpInst::Predicate P) : Pred(P), Ty(SrcType::Ty_Predicate) {} in SrcOp() function 147 SrcOp(uint64_t V) : Imm(V), Ty(SrcType::Ty_Imm) {} in SrcOp() function 148 SrcOp(int64_t V) : Imm(V), Ty(SrcType::Ty_Imm) {} in SrcOp() function
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D | LegalizationArtifactCombiner.h | 1105 unsigned SrcOp = SrcDef->getOpcode(); in tryCombineUnmergeValues() local
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/aosp_15_r20/external/llvm/lib/Target/X86/ |
H A D | X86MCInstLower.cpp | 1467 const MachineOperand &SrcOp = MI->getOperand(SrcIdx); in EmitInstruction() local 1489 const MachineOperand &SrcOp = MI->getOperand(1); in EmitInstruction() local 1511 const MachineOperand &SrcOp = MI->getOperand(1); in EmitInstruction() local
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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/SPIRV/ |
H A D | SPIRVInstrInfo.cpp | 240 auto SrcOp = I->getOperand(1); in copyPhysReg() local
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/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
H A D | MachineVerifier.cpp | 1279 const MachineOperand &SrcOp = MI->getOperand(1); in verifyPreISelGenericInstruction() local 1301 const MachineOperand &SrcOp = MI->getOperand(2); in verifyPreISelGenericInstruction() local 1529 const MachineOperand &SrcOp = MI->getOperand(1); in visitMachineInstrBefore() local
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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Hexagon/ |
H A D | HexagonRDFOpt.cpp | 139 const MachineOperand &SrcOp = MI->getOperand(1); in INITIALIZE_PASS_DEPENDENCY() local
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H A D | HexagonExpandCondsets.cpp | 643 MachineInstr *HexagonExpandCondsets::genCondTfrFor(MachineOperand &SrcOp, in genCondTfrFor()
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/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
H A D | HexagonRDFOpt.cpp | 139 const MachineOperand &SrcOp = MI->getOperand(1); in INITIALIZE_PASS_DEPENDENCY() local
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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/ |
H A D | MachineVerifier.cpp | 1425 const MachineOperand &SrcOp = MI->getOperand(1); in verifyPreISelGenericInstruction() local 1447 const MachineOperand &SrcOp = MI->getOperand(2); in verifyPreISelGenericInstruction() local 1838 const MachineOperand &SrcOp = MI->getOperand(1); in visitMachineInstrBefore() local
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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineNegator.cpp | 252 Value *SrcOp = I->getOperand(0); in visitImpl() local
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H A D | InstCombineCasts.cpp | 1255 if (auto *SrcOp = dyn_cast<Instruction>(Src)) in visitZExt() local 2079 Value *SrcOp = CI.getPointerOperand(); in visitPtrToInt() local
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/aosp_15_r20/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonRDFOpt.cpp | 123 const MachineOperand &SrcOp = MI->getOperand(1); in interpretAsCopy() local
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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/ |
H A D | AArch64SelectionDAGInfo.cpp | 59 auto *SrcOp = in EmitMOPS() local
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/aosp_15_r20/external/llvm/utils/TableGen/ |
H A D | CodeGenInstruction.cpp | 244 std::pair<unsigned,unsigned> SrcOp = Ops.ParseOperandName(SrcOpName, false); in ParseConstraint() local
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/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
H A D | SILowerControlFlow.cpp | 465 for (const auto &SrcOp : Def->explicit_operands()) in findMaskOperands() local
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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/ |
H A D | SILowerControlFlow.cpp | 578 for (const auto &SrcOp : Def->explicit_operands()) in findMaskOperands() local
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H A D | SIInstrInfo.cpp | 1949 const MachineOperand &SrcOp = MI.getOperand(1); in expandPostRAPseudo() local 2012 const MachineOperand &SrcOp = MI.getOperand(1); in expandPostRAPseudo() local 2314 const MachineOperand &SrcOp = MI.getOperand(I); in expandMovDPP64() local 4793 const MachineOperand &SrcOp = MI.getOperand(1); in verifyInstruction() local 8617 MachineOperand *SrcOp = &Def->getOperand(1); in optimizeCompareInstr() local
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H A D | AMDGPULegalizerInfo.cpp | 4779 MachineOperand &SrcOp = MI.getOperand(ArgOffset + I); in packImage16bitOpsToDwords() local 4836 MachineOperand &SrcOp = MI.getOperand(DimIdx + I); in convertImageAddrToPacked() local 4851 MachineOperand &SrcOp = MI.getOperand(DimIdx + I); in convertImageAddrToPacked() local 4991 MachineOperand &SrcOp = MI.getOperand(ArgOffset + I); in legalizeImageIntrinsic() local
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/aosp_15_r20/external/llvm/tools/llvm-c-test/ |
H A D | echo.cpp | 429 LLVMValueRef SrcOp = LLVMGetOperand(Src, 0); in CloneInstruction() local
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