/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
H A D | LiveVariables.cpp | 198 unsigned SubReg = *SubRegs; in FindLastPartialDef() local 252 unsigned SubReg = *SubRegs; in HandlePhysRegUse() local 291 unsigned SubReg = *SubRegs; in FindLastRefOrPartRef() local 340 unsigned SubReg = *SubRegs; in HandlePhysRegKill() local 371 unsigned SubReg = *SubRegs; in HandlePhysRegKill() local 453 unsigned SubReg = *SubRegs; in HandlePhysRegDef() local 475 unsigned SubReg = *SubRegs; in HandlePhysRegDef() local 493 unsigned SubReg = *SubRegs; in UpdatePhysRegDefs() local
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H A D | DetectDeadLanes.cpp | 177 unsigned SubReg = MI.getOperand(2).getImm(); in isCrossCopy() local 427 unsigned SubReg = MO.getSubReg(); in determineInitialUsedLanes() local 460 unsigned SubReg = MO.getSubReg(); in isUndefRegAtInput() local
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H A D | LiveIntervals.cpp | 567 unsigned SubReg = MO.getSubReg(); in shrinkToUses() local 1006 unsigned SubReg = MO.getSubReg(); in updateAllRanges() local 1418 unsigned SubReg = MO.getSubReg(); in findLastUseBefore() local 1528 unsigned SubReg = MO.getSubReg(); in repairOldRegInRange() local
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/aosp_15_r20/external/llvm/lib/CodeGen/ |
H A D | LiveVariables.cpp | 198 unsigned SubReg = *SubRegs; in FindLastPartialDef() local 252 unsigned SubReg = *SubRegs; in HandlePhysRegUse() local 291 unsigned SubReg = *SubRegs; in FindLastRefOrPartRef() local 340 unsigned SubReg = *SubRegs; in HandlePhysRegKill() local 371 unsigned SubReg = *SubRegs; in HandlePhysRegKill() local 453 unsigned SubReg = *SubRegs; in HandlePhysRegDef() local 475 unsigned SubReg = *SubRegs; in HandlePhysRegDef() local 493 unsigned SubReg = *SubRegs; in UpdatePhysRegDefs() local
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H A D | DetectDeadLanes.cpp | 180 unsigned SubReg = MI.getOperand(2).getImm(); in isCrossCopy() local 430 unsigned SubReg = MO.getSubReg(); in determineInitialUsedLanes() local 463 unsigned SubReg = MO.getSubReg(); in isUndefRegAtInput() local
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H A D | LiveRangeCalc.cpp | 65 unsigned SubReg = MO.getSubReg(); in calculate() local 175 unsigned SubReg = MO.getSubReg(); in extendToUses() local
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H A D | LiveIntervalAnalysis.cpp | 522 unsigned SubReg = MO.getSubReg(); in shrinkToUses() local 956 unsigned SubReg = MO.getSubReg(); in updateAllRanges() local 1319 unsigned SubReg = MO.getSubReg(); in findLastUseBefore() local 1421 unsigned SubReg = MO.getSubReg(); in repairOldRegInRange() local
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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/ |
H A D | LiveVariables.cpp | 195 unsigned SubReg = *SubRegs; in FindLastPartialDef() local 249 unsigned SubReg = *SubRegs; in HandlePhysRegUse() local 288 unsigned SubReg = *SubRegs; in FindLastRefOrPartRef() local 337 unsigned SubReg = *SubRegs; in HandlePhysRegKill() local 368 unsigned SubReg = *SubRegs; in HandlePhysRegKill() local 450 unsigned SubReg = *SubRegs; in HandlePhysRegDef() local 472 unsigned SubReg = *SubRegs; in HandlePhysRegDef() local 489 unsigned SubReg = *SubRegs; in UpdatePhysRegDefs() local
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H A D | LiveIntervals.cpp | 564 unsigned SubReg = MO.getSubReg(); in shrinkToUses() local 783 unsigned SubReg = MO.getSubReg(); in addKillFlags() local 1025 unsigned SubReg = MO.getSubReg(); in updateAllRanges() local 1042 unsigned SubReg = MO.getSubReg(); in updateAllRanges() local 1457 unsigned SubReg = MO.getSubReg(); in findLastUseBefore() local 1592 unsigned SubReg = MO.getSubReg(); in repairOldRegInRange() local
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H A D | DetectDeadLanes.cpp | 171 unsigned SubReg = MI.getOperand(2).getImm(); in isCrossCopy() local 421 unsigned SubReg = MO.getSubReg(); in determineInitialUsedLanes() local 454 unsigned SubReg = MO.getSubReg(); in isUndefRegAtInput() local
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H A D | LiveIntervalCalc.cpp | 59 unsigned SubReg = MO.getSubReg(); in calculate() local 159 unsigned SubReg = MO.getSubReg(); in extendToUses() local
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H A D | LiveRangeEdit.cpp | 140 unsigned SubReg = MO.getSubReg(); in allUsesAvailableAt() local 275 unsigned SubReg = MO.getSubReg(); in useIsKill() local
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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/ |
H A D | AArch64AdvSIMDScalarPass.cpp | 104 static bool isGPR64(unsigned Reg, unsigned SubReg, in isGPR64() 113 static bool isFPR64(unsigned Reg, unsigned SubReg, in isFPR64() 129 unsigned &SubReg) { in getSrcFromCopy() 245 unsigned SubReg; in isProfitableToTransform() local
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H A D | AArch64RegisterInfo.cpp | 312 for (MCSubRegIterator SubReg(AArch64::GPR64commonRegClass.getRegister(i), in UpdateCustomCallPreservedMask() local 422 for (MCSubRegIterator SubReg(AArch64::ZA, this, /*self=*/true); in getStrictlyReservedRegs() local 970 MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, in shouldCoalesce()
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/aosp_15_r20/external/llvm/lib/Target/AArch64/ |
H A D | AArch64AdvSIMDScalarPass.cpp | 112 static bool isGPR64(unsigned Reg, unsigned SubReg, in isGPR64() 121 static bool isFPR64(unsigned Reg, unsigned SubReg, in isFPR64() 137 unsigned &SubReg) { in getSrcFromCopy() 253 unsigned SubReg; in isProfitableToTransform() local
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/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
H A D | AArch64AdvSIMDScalarPass.cpp | 104 static bool isGPR64(unsigned Reg, unsigned SubReg, in isGPR64() 113 static bool isFPR64(unsigned Reg, unsigned SubReg, in isFPR64() 129 unsigned &SubReg) { in getSrcFromCopy() 245 unsigned SubReg; in isProfitableToTransform() local
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/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
H A D | X86RegisterInfo.cpp | 533 for (const MCPhysReg &SubReg : subregs_inclusive(X86::RSP)) in getReservedRegs() local 540 for (const MCPhysReg &SubReg : subregs_inclusive(X86::RIP)) in getReservedRegs() local 545 for (const MCPhysReg &SubReg : subregs_inclusive(X86::RBP)) in getReservedRegs() local 559 for (const MCPhysReg &SubReg : subregs_inclusive(BasePtr)) in getReservedRegs() local
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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/ |
H A D | SIRegisterInfo.cpp | 1519 Register SubReg = e == 1 in buildSpillLoadStore() local 1725 Register SubReg = in spillSGPR() local 1779 Register SubReg = in spillSGPR() local 1838 Register SubReg = in restoreSGPR() local 1871 Register SubReg = in restoreSGPR() local 1918 Register SubReg = in spillEmergencySGPR() local 1953 Register SubReg = in spillEmergencySGPR() local 2929 unsigned SubReg, in shouldCoalesce() 3057 MachineInstr *SIRegisterInfo::findReachingDef(Register Reg, unsigned SubReg, in findReachingDef()
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H A D | SIRegisterInfo.h | 369 unsigned getChannelFromSubReg(unsigned SubReg) const { in getChannelFromSubReg() 374 unsigned getNumChannelsFromSubReg(unsigned SubReg) const { in getNumChannelsFromSubReg()
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/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
H A D | GCNRegBankReassign.cpp | 80 unsigned SubReg; member in __anonef0bbddb0111::GCNRegBankReassign::OperandMask 232 Printable printReg(unsigned Reg, unsigned SubReg = 0) const { in printReg() 295 unsigned GCNRegBankReassign::getRegBankMask(unsigned Reg, unsigned SubReg, in getRegBankMask() 491 unsigned SubReg, in getFreeBanks()
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H A D | SIShrinkInstructions.cpp | 390 unsigned Reg, unsigned SubReg, in instAccessReg() 411 unsigned Reg, unsigned SubReg, in instReadsReg() 417 unsigned Reg, unsigned SubReg, in instModifiesReg()
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H A D | SIRegisterInfo.cpp | 687 Register SubReg = NumSubRegs == 1 in buildSpillLoadStore() local 787 Register SubReg = in spillSGPR() local 888 Register SubReg = in restoreSGPR() local 1703 unsigned SubReg, in shouldCoalesce() 1845 MachineInstr *SIRegisterInfo::findReachingDef(unsigned Reg, unsigned SubReg, in findReachingDef()
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H A D | SIFormMemoryClauses.cpp | 376 forAllLanes(R.first, R.second.second, [&R, &B](unsigned SubReg) { in runOnMachineFunction() 385 forAllLanes(R.first, R.second.second, [&R, &B](unsigned SubReg) { in runOnMachineFunction()
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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/ |
H A D | X86RegisterInfo.cpp | 545 for (const MCPhysReg &SubReg : subregs_inclusive(X86::RSP)) in getReservedRegs() local 552 for (const MCPhysReg &SubReg : subregs_inclusive(X86::RIP)) in getReservedRegs() local 557 for (const MCPhysReg &SubReg : subregs_inclusive(X86::RBP)) in getReservedRegs() local 571 for (const MCPhysReg &SubReg : subregs_inclusive(BasePtr)) in getReservedRegs() local
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/aosp_15_r20/external/llvm/lib/Target/AMDGPU/ |
H A D | SIRegisterInfo.cpp | 464 unsigned SubReg = NumSubRegs > 1 ? in buildScratchLoadStore() local 525 unsigned SubReg = getPhysRegSubReg(SuperReg, in eliminateFrameIndex() local 590 unsigned SubReg = getPhysRegSubReg(MI->getOperand(0).getReg(), in eliminateFrameIndex() local
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