xref: /aosp_15_r20/external/coreboot/src/drivers/i2c/rv3028c7/rv3028c7.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef _I2C_RV3028C7_H_
4 #define _I2C_RV3028C7_H_
5 
6 #define RV3028C7_ACPI_NAME		"MC28"
7 #define RV3028C7_HID_NAME		"MCRY3028"
8 #define RV3028C7_HID_DESC		"Real Time Clock"
9 
10 /* Register layout */
11 #define SECOND_REG			0x00
12 #define MINUTE_REG			0x01
13 #define HOUR_REG			0x02
14 #define WEEK_REG			0x03
15 #define DAY_REG				0x04
16 #define MONTH_REG			0x05
17 #define YEAR_REG			0x06
18 #define STATUS_REG			0x0e
19 #define  PORF_BIT			(1 << 0)
20 #define  EE_BUSY_BIT			(1 << 7)
21 #define CTRL1_REG			0x0f
22 #define  EERD_BIT			(1 << 3)
23 #define CTRL2_REG			0x10
24 #define  HOUR_12_24_BIT			(1 << 1)
25 /* Registers for the internal EEPROM */
26 #define EEP_ADR_REG			0x25
27 #define EEP_DATA_REG			0x26
28 #define EEP_CMD_REG			0x27
29 #define  EEP_CMD_PREFIX			0x00
30 #define  EEP_CMD_UPDATE			0x11
31 #define EEP_BACKUP_REG			0x37
32 #define  FEDE_BIT			(1 << 4)
33 #define  BSM_BIT			2
34 #define  BSM_MASK			(3 << BSM_BIT)
35 #define  TCR_BIT			0
36 #define  TCR_MASK			(3 << TCR_BIT)
37 #define  TCE_BIT			(1 << 5)
38 
39 #define EEP_REFRESH_EN			1
40 #define EEP_REFRESH_DIS			0
41 
42 /* The longest mentioned timeout in the datasheet is 63 ms,
43    round up to 70 ms to be on the safe side. */
44 #define EEP_SYNC_TIMEOUT_MS		70
45 
46 #endif /* _I2C_RV3028C7_H_ */
47