| /aosp_15_r20/external/clang/lib/Parse/ |
| H A D | ParseTentative.cpp | 108 TPResult TPR = isCXXDeclarationSpecifier(TPResult::False, in isCXXSimpleDeclaration() local
240 TPResult TPR = isCXXDeclarationSpecifier(); in TryParseSimpleDeclaration() local
248 TPResult TPR = TryParseInitDeclaratorList(); in TryParseSimpleDeclaration() local
288 TPResult TPR = TryParseDeclarator(false/*mayBeAbstract*/); in TryParseInitDeclaratorList() local
493 TPResult TPR = isCXXDeclarationSpecifier(); in isCXXTypeId() local
792 TPResult TPR = isCXXDeclarationSpecifier(); in TryParseOperatorId() local
896 TPResult TPR = TryParseFunctionDeclarator(); in TryParseDeclarator() local
907 TPResult TPR = TryParseDeclarator(mayBeAbstract, mayHaveIdentifier); in TryParseDeclarator() local
919 TPResult TPR(TPResult::Ambiguous); in TryParseDeclarator() local
1396 TPResult TPR = TPResult::False; in isCXXDeclarationSpecifier() local
[all …]
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| H A D | ParseDecl.cpp | 2375 TPResult TPR = TryParseDeclarator(/*mayBeAbstract*/false); in ParseImplicitInt() local
3935 TPResult TPR = isExpressionOrTypeSpecifierSimple(NextToken().getKind()); in ParseEnumSpecifier() local
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| /aosp_15_r20/external/crosvm/devices/tests/irqchip/ |
| H A D | userspace.rs | 71 const TPR: u64 = 0x80; constant
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| /aosp_15_r20/external/crosvm/devices/src/irqchip/ |
| H A D | apic.rs | 863 const TPR: usize = 0x80; constant
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| /aosp_15_r20/device/google/contexthub/firmware/os/cpu/cortexm4/inc/cpu/cmsis/ |
| D | core_cm3.h | 671 …__IO uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register … member
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| D | core_sc300.h | 651 …__IO uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register … member
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| D | core_cm4.h | 711 …__IO uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register … member
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| D | core_cm7.h | 892 …__IO uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register … member
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| /aosp_15_r20/external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 637 SDValue TPR = DAG.getCopyToReg(FR0.getValue(1), dl, PredR, in LowerCallResult() local
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| /aosp_15_r20/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Include/ |
| H A D | core_cm3.h | 746 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
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| H A D | core_sc300.h | 728 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
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| H A D | core_cm4.h | 807 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
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| H A D | core_cm7.h | 1009 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
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| /aosp_15_r20/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Include/ |
| H A D | core_sc300.h | 728 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
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| H A D | core_cm3.h | 746 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
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| H A D | core_cm4.h | 807 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
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| H A D | core_cm7.h | 1009 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 348 SDValue TPR = DAG.getCopyToReg(FR0.getValue(1), dl, PredR, in LowerCallResult() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 379 SDValue TPR = DAG.getCopyToReg(FR0.getValue(1), dl, PredR, in LowerCallResult() local
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