1 // Copyright 2019 The Chromium Authors
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4
5 #include "base/profiler/thread_delegate_posix.h"
6
7 #include <inttypes.h>
8 #include <pthread.h>
9 #include <stdio.h>
10
11 #include <optional>
12
13 #include "base/memory/ptr_util.h"
14 #include "base/process/process_handle.h"
15 #include "build/build_config.h"
16
17 #if !(BUILDFLAG(IS_LINUX) || BUILDFLAG(IS_CHROMEOS))
18 #include "base/profiler/stack_base_address_posix.h"
19 #endif
20
21 namespace base {
22 // static
Create(SamplingProfilerThreadToken thread_token)23 std::unique_ptr<ThreadDelegatePosix> ThreadDelegatePosix::Create(
24 SamplingProfilerThreadToken thread_token) {
25 std::optional<uintptr_t> base_address;
26 #if BUILDFLAG(IS_LINUX) || BUILDFLAG(IS_CHROMEOS)
27 base_address = thread_token.stack_base_address;
28 #else
29 base_address =
30 GetThreadStackBaseAddress(thread_token.id, thread_token.pthread_id);
31 #endif
32 if (!base_address)
33 return nullptr;
34 return base::WrapUnique(
35 new ThreadDelegatePosix(thread_token.id, *base_address));
36 }
37
38 ThreadDelegatePosix::~ThreadDelegatePosix() = default;
39
GetThreadId() const40 PlatformThreadId ThreadDelegatePosix::GetThreadId() const {
41 return thread_id_;
42 }
43
GetStackBaseAddress() const44 uintptr_t ThreadDelegatePosix::GetStackBaseAddress() const {
45 return thread_stack_base_address_;
46 }
47
GetRegistersToRewrite(RegisterContext * thread_context)48 std::vector<uintptr_t*> ThreadDelegatePosix::GetRegistersToRewrite(
49 RegisterContext* thread_context) {
50 #if defined(ARCH_CPU_ARM_FAMILY) && defined(ARCH_CPU_32_BITS)
51 return {
52 reinterpret_cast<uintptr_t*>(&thread_context->arm_r0),
53 reinterpret_cast<uintptr_t*>(&thread_context->arm_r1),
54 reinterpret_cast<uintptr_t*>(&thread_context->arm_r2),
55 reinterpret_cast<uintptr_t*>(&thread_context->arm_r3),
56 reinterpret_cast<uintptr_t*>(&thread_context->arm_r4),
57 reinterpret_cast<uintptr_t*>(&thread_context->arm_r5),
58 reinterpret_cast<uintptr_t*>(&thread_context->arm_r6),
59 reinterpret_cast<uintptr_t*>(&thread_context->arm_r7),
60 reinterpret_cast<uintptr_t*>(&thread_context->arm_r8),
61 reinterpret_cast<uintptr_t*>(&thread_context->arm_r9),
62 reinterpret_cast<uintptr_t*>(&thread_context->arm_r10),
63 reinterpret_cast<uintptr_t*>(&thread_context->arm_fp),
64 reinterpret_cast<uintptr_t*>(&thread_context->arm_ip),
65 reinterpret_cast<uintptr_t*>(&thread_context->arm_sp),
66 // arm_lr and arm_pc do not require rewriting because they contain
67 // addresses of executable code, not addresses in the stack.
68 };
69 #elif defined(ARCH_CPU_ARM_FAMILY) && \
70 defined(ARCH_CPU_64_BITS) // #if defined(ARCH_CPU_ARM_FAMILY) &&
71 // defined(ARCH_CPU_32_BITS)
72 std::vector<uintptr_t*> registers;
73 registers.reserve(12);
74 // Return the set of callee-save registers per the ARM 64-bit Procedure Call
75 // Standard section 5.1.1, plus the stack pointer.
76 registers.push_back(reinterpret_cast<uintptr_t*>(&thread_context->sp));
77 for (size_t i = 19; i <= 29; ++i)
78 registers.push_back(reinterpret_cast<uintptr_t*>(&thread_context->regs[i]));
79 return registers;
80 #elif defined(ARCH_CPU_X86_FAMILY) && defined(ARCH_CPU_32_BITS)
81 return {
82 // Return the set of callee-save registers per the i386 System V ABI
83 // section 2.2.3, plus the stack pointer.
84 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_EBX]),
85 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_EBP]),
86 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_ESI]),
87 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_EDI]),
88 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_ESP]),
89 };
90 #elif defined(ARCH_CPU_X86_FAMILY) && defined(ARCH_CPU_64_BITS)
91 return {
92 // Return the set of callee-save registers per the x86-64 System V ABI
93 // section 3.2.1, plus the stack pointer.
94 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_RBP]),
95 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_RBX]),
96 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_R12]),
97 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_R13]),
98 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_R14]),
99 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_R15]),
100 reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_RSP]),
101 };
102 #else // #if defined(ARCH_CPU_ARM_FAMILY) && defined(ARCH_CPU_32_BITS)
103 // Unimplemented for other architectures.
104 return {};
105 #endif
106 }
107
ThreadDelegatePosix(PlatformThreadId id,uintptr_t base_address)108 ThreadDelegatePosix::ThreadDelegatePosix(PlatformThreadId id,
109 uintptr_t base_address)
110 : thread_id_(id), thread_stack_base_address_(base_address) {}
111
112 } // namespace base
113