1 /* 2 * Copyright (c) 2018, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file encode_huc_brc_update_packet.h 24 //! \brief Defines the implementation of huc update packet 25 //! 26 27 #ifndef __CODECHAL_HUC_BRC_UPDATE_PACKET_H__ 28 #define __CODECHAL_HUC_BRC_UPDATE_PACKET_H__ 29 30 #include "media_cmd_packet.h" 31 #include "encode_huc.h" 32 #include "media_pipeline.h" 33 #include "codec_hw_next.h" 34 #include "encode_utils.h" 35 #include "encode_hevc_vdenc_pipeline.h" 36 #include "encode_hevc_basic_feature.h" 37 #if _ENCODE_RESERVED 38 #include "encode_huc_brc_update_packet_ext.h" 39 #endif // _ENCODE_RESERVED 40 41 namespace encode 42 { 43 struct VdencHevcHucBrcUpdateDmem 44 { 45 uint32_t TARGETSIZE_U32 = 0; 46 uint32_t FrameID_U32 = 0; // frame number 47 uint32_t Ref_L0_FrameID_U32[8] = {}; 48 uint32_t Ref_L1_FrameID_U32[8] = {}; 49 uint16_t startGAdjFrame_U16[4] = {}; // 10, 50, 100, 150 50 uint16_t TargetSliceSize_U16 = 0; 51 uint16_t SLB_Data_SizeInBytes = 0; 52 uint16_t PIC_STATE_StartInBytes = 0; // PIC_STATE starts in byte. 0xFFFF means not available in SLB 53 uint16_t CMD2_StartInBytes = 0; 54 uint16_t CMD1_StartInBytes = 0; 55 uint16_t PIPE_MODE_SELECT_StartInBytes = 0; // PIPE Mode select starts in byte. 0xFFFF means not available in SLB 56 uint16_t Current_Data_Offset = 0; // Data block offset of current picture from beginning of the data buffer (region 9) 57 uint16_t Ref_Data_Offset[5] = {}; // Data block offset of ref pictures from beginning of the data buffer (region 9) 58 uint16_t MaxNumSliceAllowed_U16 = 0; 59 uint8_t OpMode_U8 = 0; // 1: frame-based BRC (including ACQP), 2: Weighted prediction, Weighted prediction should not be enabled in first pass. 60 // Same as other common flags, this is a bit operation. Each bit is zero for disabling and 1 for enabling. i.e. 01: BRC, 10: WP - never used; 11: BRC+WP, 4: tile-based BRC (frame level), 8: tile-based BRC (tile level) 61 uint8_t CurrentFrameType_U8 = 0; 62 uint8_t Num_Ref_L0_U8 = 0; 63 uint8_t Num_Ref_L1_U8 = 0; 64 uint8_t Num_Slices = 0; 65 uint8_t CQP_QPValue_U8 = 0; // CQP QP value (needed for ICQ and ACQP) 66 uint8_t CQP_FracQP_U8 = 0; 67 uint8_t MaxNumPass_U8 = 0; // max number of BRC passes (SAO second pass is not included.) 68 uint8_t gRateRatioThreshold_U8[7] = {}; 69 uint8_t startGAdjMult_U8[5] = {}; 70 uint8_t startGAdjDiv_U8[5] = {}; 71 uint8_t gRateRatioThresholdQP_U8[8] = {}; 72 uint8_t SceneChgPrevIntraPctThreshold_U8 = 0; 73 uint8_t SceneChgCurIntraPctThreshold_U8 = 0; 74 uint8_t IPAverageCoeff_U8 = 0; 75 uint8_t CurrentPass_U8 = 0; 76 int8_t DeltaQPForMvZero_S8 = 0; 77 int8_t DeltaQPForMvZone0_S8 = 0; 78 int8_t DeltaQPForMvZone1_S8 = 0; 79 int8_t DeltaQPForMvZone2_S8 = 0; 80 int8_t DeltaQPForSadZone0_S8 = 0; 81 int8_t DeltaQPForSadZone1_S8 = 0; 82 int8_t DeltaQPForSadZone2_S8 = 0; 83 int8_t DeltaQPForSadZone3_S8 = 0; 84 int8_t DeltaQPForROI0_S8 = 0; 85 int8_t DeltaQPForROI1_S8 = 0; 86 int8_t DeltaQPForROI2_S8 = 0; 87 int8_t DeltaQPForROI3_S8 = 0; 88 int8_t LumaLog2WeightDenom_S8 = 0; // default: 6 89 int8_t ChromaLog2WeightDenom_S8 = 0; // default: 6 90 uint8_t DisabledFeature_U8 = 0; 91 uint8_t SlidingWindow_Enable_U8 = 0; // 0-disabled, 1-enabled 92 uint8_t LOG_LCU_Size_U8 = 0; // 6 93 uint16_t NetworkTraceEntry_U16 = 0; // default: 0 94 uint16_t LowDelaySceneChangeXFrameSize_U16 = 0; // default: 0 95 int8_t ReEncodePositiveQPDeltaThr_S8 = 0; // default: 4 96 int8_t ReEncodeNegativeQPDeltaThr_S8 = 0; // default: -10 97 98 // tile-based BRC 99 uint8_t MaxNumTileHuCCallMinus1 = 0; // maximal tile row 100 uint8_t TileHucCallIndex = 0; 101 uint8_t TileHuCCallPassIndex = 0; // Start from 1 102 uint8_t TileHuCCallPassMax = 0; // Reserved now 103 uint16_t TileSizeInLCU = 0; 104 105 uint32_t TxSizeInBitsPerFrame = 0; 106 107 uint8_t StartTileIdx = 0; 108 uint8_t EndTileIdx = 0; 109 110 uint16_t NumFrameSkipped = 0; 111 uint32_t SkipFrameSize = 0; 112 113 uint32_t SliceHeaderSize = 0; 114 uint8_t IsLongTermRef = 0; 115 uint8_t FrameSizeBoostForSceneChange = 0; // UPD_TCBRC_SCENARIO_U8 116 uint8_t ROMCurrent = 0; // ROM average of current frame 117 uint8_t ROMZero = 0; // ROM zero percentage 118 uint32_t TargetFrameSize = 0; // TR_BRC 119 uint32_t TargetFulness = 0; 120 uint8_t Delta = 0; 121 uint8_t CqmEnable = 0; 122 uint8_t UPD_TempCurrentlayer = 0; 123 uint8_t UPD_TempScalable = 0; 124 uint32_t UPD_UserMaxFrame = 0; 125 uint32_t UPD_UserMaxFramePB = 0; 126 uint8_t UPD_Randomaccess = 0; 127 128 uint8_t RSVD[43] = {}; // 64 bytes aligned 129 }; 130 C_ASSERT(256 == sizeof(VdencHevcHucBrcUpdateDmem)); 131 132 #define CODECHAL_VDENC_HEVC_MAX_SLICE_NUM 70 133 134 struct VdencHevcHucBrcConstantData 135 { 136 uint16_t VdencHevcHucBrcConstantData_0[52] = {}; 137 uint16_t VdencHevcHucBrcConstantData_1[52] = {}; 138 uint16_t VdencHevcHucBrcConstantData_2[52] = {}; 139 uint16_t VdencHevcHucBrcConstantData_3[52] = {}; 140 uint16_t VdencHevcHucBrcConstantData_4[52] = {}; 141 uint16_t RSVD0[52]; 142 uint8_t RSVD1[27]; 143 int8_t RSVD2[243]; 144 int8_t VdencHevcHucBrcConstantData_5[72] = {}; 145 int8_t VdencHevcHucBrcConstantData_6[72] = {}; 146 int8_t VdencHevcHucBrcConstantData_7[72] = {}; 147 uint8_t RSVD3[54]; 148 int8_t RSVD4[135]; 149 struct 150 { 151 uint8_t RSVD5[28]; 152 } VdencHevcHucBrcConstantData_8[52]; 153 struct 154 { 155 // Unit in Bytes 156 uint16_t SizeOfCMDs = 0; 157 uint16_t HcpWeightOffsetL0_StartInBytes = 0; // HCP_WEIGHTOFFSET_L0 starts in bytes from beginning of the SLB. 0xFFFF means unavailable in SLB 158 uint16_t HcpWeightOffsetL1_StartInBytes = 0; // HCP_WEIGHTOFFSET_L1 starts in bytes from beginning of the SLB. 0xFFFF means unavailable in SLB 159 uint16_t SliceState_StartInBytes = 0; 160 uint16_t SliceHeaderPIO_StartInBytes = 0; 161 uint16_t VdencWeightOffset_StartInBytes = 0; 162 // Unit in Bits 163 uint16_t SliceHeader_SizeInBits = 0; 164 uint16_t WeightTable_StartInBits = 0; // number of bits from beginning of slice header for weight table first bit, 0xffff means not awailable 165 uint16_t WeightTable_EndInBits = 0; // number of bits from beginning of slice header for weight table last bit, 0xffff means not awailable 166 } Slice[CODECHAL_VDENC_HEVC_MAX_SLICE_NUM]; 167 168 uint8_t RSVD6[61]; 169 }; 170 #define CODECHAL_ENCODE_HEVC_VDENC_WP_DATA_BLOCK_NUMBER 6 171 172 class HucBrcUpdatePkt : public EncodeHucPkt, public mhw::vdbox::hcp::Itf::ParSetting 173 { 174 public: HucBrcUpdatePkt(MediaPipeline * pipeline,MediaTask * task,CodechalHwInterfaceNext * hwInterface)175 HucBrcUpdatePkt(MediaPipeline *pipeline, MediaTask *task, CodechalHwInterfaceNext *hwInterface) : 176 EncodeHucPkt(pipeline, task, hwInterface) 177 { 178 m_featureManager = m_pipeline->GetPacketLevelFeatureManager(HevcPipeline::HucBrcUpdate); 179 m_hcpItf = hwInterface->GetHcpInterfaceNext(); 180 m_vdencItf = hwInterface->GetVdencInterfaceNext(); 181 m_miItf = hwInterface->GetMiInterfaceNext(); 182 } 183 ~HucBrcUpdatePkt()184 virtual ~HucBrcUpdatePkt() {} 185 186 virtual MOS_STATUS Init() override; 187 188 MOS_STATUS Submit(MOS_COMMAND_BUFFER *commandBuffer, uint8_t packetPhase = otherPacket) override; 189 190 //! 191 //! \brief Calculate Command Size 192 //! 193 //! \param [in, out] commandBufferSize 194 //! requested size 195 //! \param [in, out] requestedPatchListSize 196 //! requested size 197 //! \return MOS_STATUS 198 //! status 199 //! 200 MOS_STATUS CalculateCommandSize( 201 uint32_t &commandBufferSize, 202 uint32_t &requestedPatchListSize) override; 203 204 virtual MOS_STATUS DumpOutput() override; 205 206 //! 207 //! \brief Get Packet Name 208 //! \return std::string 209 //! GetPacketName()210 virtual std::string GetPacketName() override 211 { 212 return "BRCUPDATE_PASS" + std::to_string((uint32_t)m_pipeline->GetCurrentPass()); 213 } 214 215 protected: 216 MHW_SETPAR_DECL_HDR(HUC_IMEM_STATE); 217 MHW_SETPAR_DECL_HDR(HUC_DMEM_STATE); 218 MHW_SETPAR_DECL_HDR(HUC_VIRTUAL_ADDR_STATE); 219 MHW_SETPAR_DECL_HDR(HCP_PIC_STATE); 220 221 virtual MOS_STATUS AllocateResources() override; 222 223 virtual MOS_STATUS ConstructBatchBufferHuCBRC(PMOS_RESOURCE batchBuffer); 224 225 virtual MOS_STATUS ConstructGroup1Cmds(); 226 virtual MOS_STATUS ConstructGroup2Cmds(); 227 virtual MOS_STATUS ConstructGroup3Cmds(); 228 229 HevcBasicFeature *m_basicFeature = nullptr; //!< Hevc Basic Feature used in each frame 230 231 virtual MOS_STATUS SetExtDmemBuffer(VdencHevcHucBrcUpdateDmem *hucVdencBrcUpdateDmem) const; 232 virtual MOS_STATUS SetCommonDmemBuffer(VdencHevcHucBrcUpdateDmem *hucVdencBrcUpdateDmem); 233 virtual MOS_STATUS SetDmemBuffer() const; 234 235 virtual MOS_STATUS SetConstLambdaHucBrcUpdate(void *params) const; 236 virtual MOS_STATUS SetConstDataHuCBrcUpdate() const; 237 238 MOS_STATUS SetTcbrcMode(); 239 240 uint32_t GetMaxAllowedSlices(uint8_t levelIdc) const; 241 242 MHW_SETPAR_DECL_HDR(HCP_PIPE_MODE_SELECT); 243 244 MHW_SETPAR_DECL_HDR(HCP_SLICE_STATE); 245 246 MOS_STATUS AddAllCmds_HCP_WEIGHTOFFSET_STATE(PMOS_COMMAND_BUFFER cmdBuffer) const; 247 248 MOS_STATUS AddAllCmds_HCP_PAK_INSERT_OBJECT_SLICE(PMOS_COMMAND_BUFFER cmdBuffer) const; 249 250 #if USE_CODECHAL_DEBUG_TOOL 251 MOS_STATUS DumpHucBrcUpdate(bool isInput); 252 253 virtual MOS_STATUS DumpInput() override; 254 #endif 255 uint32_t m_alignSize[ENCODE_HEVC_VDENC_NUM_MAX_SLICES] = {0}; 256 static constexpr uint32_t m_vdboxHucHevcBrcUpdateKernelDescriptor = 9;//!< Huc HEVC Brc init kernel descriptor 257 static constexpr uint32_t m_vdboxHucHevcBrcLowdelayKernelDescriptor = 10;//!< Huc HEVC Brc low delay kernel descriptor 258 259 // Batch Buffer for VDEnc 260 MOS_RESOURCE m_vdencReadBatchBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM][VDENC_BRC_NUM_OF_PASSES] = {}; //!< VDEnc read batch buffer 261 MOS_RESOURCE m_vdencBrcConstDataBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM] = {}; //!< VDEnc brc constant data buffer 262 263 MOS_RESOURCE m_dataFromPicsBuffer = {}; //!< Data Buffer of Current and Reference Pictures for Weighted Prediction 264 uint32_t m_vdenc2ndLevelBatchBufferSize[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM] = { 0 }; 265 MOS_RESOURCE m_vdencBrcUpdateDmemBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM][VDENC_BRC_NUM_OF_PASSES] = { 0 }; //!< VDEnc BrcUpdate DMEM buffer 266 267 mutable uint32_t m_1stPakInsertObjectCmdSize = 0; //!< Size of 1st PAK_INSERT_OBJ cmd 268 mutable uint32_t m_hcpWeightOffsetStateCmdSize = 0; //!< Size of HCP_WEIGHT_OFFSET_STATE cmd 269 uint32_t m_hcpSliceStateCmdSize = 0; //!< Size of HCP_SLICE_STATE cmd 270 uint32_t m_vdencWeightOffsetStateCmdSize = 0; //!< Size of VDENC_WEIGHT_OFFSET_STATE cmd 271 uint32_t m_miBatchBufferEndCmdSize = 0; //!< Size of MI_BATCH_BUFFER_END cmd 272 uint32_t m_cmd2StartInBytes = 0; 273 uint32_t m_vdencBrcInitDmemBufferSize = 0; //!< Offset of BRC init DMEM buffer 274 uint32_t m_vdencBrcUpdateDmemBufferSize = sizeof(VdencHevcHucBrcUpdateDmem); //!< Offset of BRC update DMEM buffer 275 uint32_t m_vdencBrcConstDataBufferSize = sizeof(VdencHevcHucBrcConstantData); //!< Offset of BRC const data buffer 276 uint32_t m_slbDataSizeInBytes = 0; //!< Size of SLB Data 277 uint8_t m_tcbrcQualityBoost = 0; 278 279 MOS_RESOURCE m_vdencBrcInitDmemBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM] = {}; //!< VDEnc BrcInit DMEM buffer 280 281 // Information for entry/slot in the picture data 282 struct SlotInfo { 283 uint32_t age; 284 int32_t poc; 285 bool isUsed; 286 bool isRef; 287 } slotInfo[CODECHAL_ENCODE_HEVC_VDENC_WP_DATA_BLOCK_NUMBER] = { { 0, 0, false, false } }; 288 289 uint8_t *m_batchbufferAddr = nullptr; 290 int32_t m_curPicSlot = -1; //!< Slot selected to store current Picutre data 291 static constexpr uint32_t m_weightHistSize = 1024; //!< Weight Histogram (part of VDEnc Statistic): 256 DWs (16CLs) of Histogram Stats = 1024 292 293 std::shared_ptr<mhw::vdbox::hcp::Itf> m_hcpItf = nullptr; 294 std::shared_ptr<mhw::vdbox::vdenc::Itf> m_vdencItf = nullptr; 295 std::shared_ptr<mhw::mi::Itf> m_miItf = nullptr; 296 std::shared_ptr<MediaFeatureManager::ManagerLite> m_featureManager = nullptr; 297 298 MEDIA_CLASS_DEFINE_END(encode__HucBrcUpdatePkt) 299 }; 300 301 } // namespace encode 302 #endif 303