| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567b/include/llvm/CodeGen/GlobalISel/ |
| D | MIPatternMatch.h | 143 std::optional<ValueAndVReg> &ValReg; member
151 inline GCstAndRegMatch m_GCst(std::optional<ValueAndVReg> &ValReg) { in m_GCst()
|
| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r536225/include/llvm/CodeGen/GlobalISel/ |
| D | MIPatternMatch.h | 143 std::optional<ValueAndVReg> &ValReg; member
151 inline GCstAndRegMatch m_GCst(std::optional<ValueAndVReg> &ValReg) { in m_GCst()
|
| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567/include/llvm/CodeGen/GlobalISel/ |
| D | MIPatternMatch.h | 143 std::optional<ValueAndVReg> &ValReg; member
151 inline GCstAndRegMatch m_GCst(std::optional<ValueAndVReg> &ValReg) { in m_GCst()
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MIPatternMatch.h | 143 std::optional<ValueAndVReg> &ValReg; member
151 inline GCstAndRegMatch m_GCst(std::optional<ValueAndVReg> &ValReg) { in m_GCst()
|
| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r522817/include/llvm/CodeGen/GlobalISel/ |
| D | MIPatternMatch.h | 143 std::optional<ValueAndVReg> &ValReg; member
151 inline GCstAndRegMatch m_GCst(std::optional<ValueAndVReg> &ValReg) { in m_GCst()
|
| /aosp_15_r20/external/llvm/lib/CodeGen/GlobalISel/ |
| H A D | IRTranslator.cpp | 38 unsigned &ValReg = ValToVReg[&Val]; in getOrCreateVReg() local
|
| /aosp_15_r20/external/llvm/lib/Target/ARM/ |
| H A D | ARMAsmPrinter.cpp | 1730 unsigned ValReg = MI->getOperand(1).getReg(); in EmitInstruction() local
1796 unsigned ValReg = MI->getOperand(1).getReg(); in EmitInstruction() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMAsmPrinter.cpp | 1854 Register ValReg = MI->getOperand(1).getReg(); in EmitInstruction() local
1920 Register ValReg = MI->getOperand(1).getReg(); in EmitInstruction() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/ |
| H A D | ARMAsmPrinter.cpp | 1947 Register ValReg = MI->getOperand(1).getReg(); in emitInstruction() local
2013 Register ValReg = MI->getOperand(1).getReg(); in emitInstruction() local
|
| /aosp_15_r20/external/llvm/lib/Target/X86/ |
| H A D | X86SelectionDAGInfo.cpp | 109 unsigned ValReg; in EmitTargetCodeForMemset() local
|
| H A D | X86FastISel.cpp | 501 bool X86FastISel::X86FastEmitStore(EVT VT, unsigned ValReg, bool ValIsKill, in X86FastEmitStore()
684 unsigned ValReg = getRegForValue(Val); in X86FastEmitStore() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/ |
| H A D | X86SelectionDAGInfo.cpp | 79 unsigned ValReg; in EmitTargetCodeForMemset() local
|
| H A D | X86FastISel.cpp | 479 bool X86FastISel::X86FastEmitStore(EVT VT, unsigned ValReg, X86AddressMode &AM, in X86FastEmitStore()
689 Register ValReg = getRegForValue(Val); in X86FastEmitStore() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| H A D | X86SelectionDAGInfo.cpp | 110 unsigned ValReg; in EmitTargetCodeForMemset() local
|
| H A D | X86FastISel.cpp | 483 bool X86FastISel::X86FastEmitStore(EVT VT, unsigned ValReg, bool ValIsKill, in X86FastEmitStore()
694 unsigned ValReg = getRegForValue(Val); in X86FastEmitStore() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchExpandAtomicPseudoInsts.cpp | 351 MachineBasicBlock *MBB, Register ValReg, in insertSext()
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/ |
| H A D | ARCOptAddrMode.cpp | 426 Register ValReg = IsLoad ? Ldst->getOperand(0).getReg() : Register(); in canSinkLoadStoreTo() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 458 Register CallLowering::ValueHandler::extendRegister(Register ValReg, in extendRegister()
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVPreLegalizer.cpp | 303 createNewIdReg(Register ValReg, unsigned Opcode, MachineRegisterInfo &MRI, in createNewIdReg()
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/RISCV/ |
| H A D | RISCVExpandAtomicPseudoInsts.cpp | 380 MachineBasicBlock *MBB, Register ValReg, in insertSext()
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64LegalizerInfo.cpp | 698 Register ValReg = MI.getOperand(0).getReg(); in legalizeLoadStore() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| H A D | RISCVExpandPseudoInsts.cpp | 397 MachineBasicBlock *MBB, Register ValReg, in insertSext()
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 2848 Register ValReg = LdSt.getReg(0); in select() local
2872 const Register ValReg = LdSt.getReg(0); in select() local
5839 Register ValReg = I.getOperand(2).getReg(); in selectIntrinsic() local
5866 Register ValReg = I.getOperand(2).getReg(); in selectIntrinsic() local
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| H A D | AArch64LegalizerInfo.cpp | 1187 Register ValReg = MI.getOperand(0).getReg(); in legalizeLoadStore() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 321 Register OutgoingValueHandler::extendRegister(Register ValReg, in extendRegister()
|