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Searched defs:_bit_width (Results 1 – 3 of 3) sorted by relevance

/aosp_15_r20/external/pytorch/torch/_inductor/
H A Dcpu_vec_isa.py153_bit_width = 256 # This is required to leverage the compute implemented in aten/src/ATen/cpu/vec/… variable in VecNEON
168 _bit_width = 512 variable in VecAVX512
225 _bit_width = 256 variable in VecAVX2
240 _bit_width = 256 variable in VecZVECTOR
257 _bit_width = 256 # VSX simd supports 128 bit_width, but aten is emulating it as 256 variable in VecVSX
269 _bit_width = 0 variable in InvalidVecISA
H A Dcodecache.py1362_bit_width = 256 # This is required to leverage the compute implemented in aten/src/ATen/cpu/vec/… variable in VecNEON
1377 _bit_width = 512 variable in VecAVX512
1394 _bit_width = 256 variable in VecAVX2
1409 _bit_width = 256 variable in VecZVECTOR
1425 _bit_width = 0 variable in InvalidVecISA
/aosp_15_r20/external/crosvm/x86_64/src/
H A Dacpi.rs42 _bit_width: u8, field