xref: /aosp_15_r20/external/mesa3d/src/mesa/program/prog_instruction.c (revision 6104692788411f58d303aa86923a9ff6ecaded22)
1 /*
2  * Mesa 3-D graphics library
3  *
4  * Copyright (C) 1999-2008  Brian Paul   All Rights Reserved.
5  * Copyright (C) 1999-2009  VMware, Inc.  All Rights Reserved.
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a
8  * copy of this software and associated documentation files (the "Software"),
9  * to deal in the Software without restriction, including without limitation
10  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11  * and/or sell copies of the Software, and to permit persons to whom the
12  * Software is furnished to do so, subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included
15  * in all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
21  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
22  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
23  * OTHER DEALINGS IN THE SOFTWARE.
24  */
25 
26 
27 #include <stdio.h>
28 #include <assert.h>
29 
30 #include "util/glheader.h"
31 #include "prog_instruction.h"
32 #include "prog_parameter.h"
33 
34 
35 /**
36  * Initialize program instruction fields to defaults.
37  * \param inst  first instruction to initialize
38  * \param count  number of instructions to initialize
39  */
40 void
_mesa_init_instructions(struct prog_instruction * inst,GLuint count)41 _mesa_init_instructions(struct prog_instruction *inst, GLuint count)
42 {
43    GLuint i;
44 
45    memset(inst, 0, count * sizeof(struct prog_instruction));
46 
47    for (i = 0; i < count; i++) {
48       inst[i].SrcReg[0].File = PROGRAM_UNDEFINED;
49       inst[i].SrcReg[0].Swizzle = SWIZZLE_NOOP;
50       inst[i].SrcReg[1].File = PROGRAM_UNDEFINED;
51       inst[i].SrcReg[1].Swizzle = SWIZZLE_NOOP;
52       inst[i].SrcReg[2].File = PROGRAM_UNDEFINED;
53       inst[i].SrcReg[2].Swizzle = SWIZZLE_NOOP;
54 
55       inst[i].DstReg.File = PROGRAM_UNDEFINED;
56       inst[i].DstReg.WriteMask = WRITEMASK_XYZW;
57 
58       inst[i].Saturate = GL_FALSE;
59    }
60 }
61 
62 
63 /**
64  * Basic info about each instruction
65  */
66 struct instruction_info
67 {
68    enum prog_opcode Opcode;
69    const char *Name;
70    GLuint NumSrcRegs;
71    GLuint NumDstRegs;
72 };
73 
74 /**
75  * Instruction info
76  * \note Opcode should equal array index!
77  */
78 static const struct instruction_info InstInfo[MAX_OPCODE] = {
79    { OPCODE_NOP,    "NOP",     0, 0 },
80    { OPCODE_ABS,    "ABS",     1, 1 },
81    { OPCODE_ADD,    "ADD",     2, 1 },
82    { OPCODE_ARL,    "ARL",     1, 1 },
83    { OPCODE_CMP,    "CMP",     3, 1 },
84    { OPCODE_COS,    "COS",     1, 1 },
85    { OPCODE_DDX,    "DDX",     1, 1 },
86    { OPCODE_DDY,    "DDY",     1, 1 },
87    { OPCODE_DP2,    "DP2",     2, 1 },
88    { OPCODE_DP3,    "DP3",     2, 1 },
89    { OPCODE_DP4,    "DP4",     2, 1 },
90    { OPCODE_DPH,    "DPH",     2, 1 },
91    { OPCODE_DST,    "DST",     2, 1 },
92    { OPCODE_END,    "END",     0, 0 },
93    { OPCODE_EX2,    "EX2",     1, 1 },
94    { OPCODE_EXP,    "EXP",     1, 1 },
95    { OPCODE_FLR,    "FLR",     1, 1 },
96    { OPCODE_FRC,    "FRC",     1, 1 },
97    { OPCODE_KIL,    "KIL",     1, 0 },
98    { OPCODE_LG2,    "LG2",     1, 1 },
99    { OPCODE_LIT,    "LIT",     1, 1 },
100    { OPCODE_LOG,    "LOG",     1, 1 },
101    { OPCODE_LRP,    "LRP",     3, 1 },
102    { OPCODE_MAD,    "MAD",     3, 1 },
103    { OPCODE_MAX,    "MAX",     2, 1 },
104    { OPCODE_MIN,    "MIN",     2, 1 },
105    { OPCODE_MOV,    "MOV",     1, 1 },
106    { OPCODE_MUL,    "MUL",     2, 1 },
107    { OPCODE_POW,    "POW",     2, 1 },
108    { OPCODE_RCP,    "RCP",     1, 1 },
109    { OPCODE_RSQ,    "RSQ",     1, 1 },
110    { OPCODE_SCS,    "SCS",     1, 1 },
111    { OPCODE_SGE,    "SGE",     2, 1 },
112    { OPCODE_SIN,    "SIN",     1, 1 },
113    { OPCODE_SLT,    "SLT",     2, 1 },
114    { OPCODE_SSG,    "SSG",     1, 1 },
115    { OPCODE_SUB,    "SUB",     2, 1 },
116    { OPCODE_SWZ,    "SWZ",     1, 1 },
117    { OPCODE_TEX,    "TEX",     1, 1 },
118    { OPCODE_TXB,    "TXB",     1, 1 },
119    { OPCODE_TXD,    "TXD",     3, 1 },
120    { OPCODE_TXL,    "TXL",     1, 1 },
121    { OPCODE_TXP,    "TXP",     1, 1 },
122    { OPCODE_XPD,    "XPD",     2, 1 }
123 };
124 
125 
126 /**
127  * Return the number of src registers for the given instruction/opcode.
128  */
129 GLuint
_mesa_num_inst_src_regs(enum prog_opcode opcode)130 _mesa_num_inst_src_regs(enum prog_opcode opcode)
131 {
132    assert(opcode < MAX_OPCODE);
133    assert(opcode == InstInfo[opcode].Opcode);
134    assert(OPCODE_XPD == InstInfo[OPCODE_XPD].Opcode);
135    return InstInfo[opcode].NumSrcRegs;
136 }
137 
138 
139 /**
140  * Return the number of dst registers for the given instruction/opcode.
141  */
142 GLuint
_mesa_num_inst_dst_regs(enum prog_opcode opcode)143 _mesa_num_inst_dst_regs(enum prog_opcode opcode)
144 {
145    assert(opcode < MAX_OPCODE);
146    assert(opcode == InstInfo[opcode].Opcode);
147    assert(OPCODE_XPD == InstInfo[OPCODE_XPD].Opcode);
148    return InstInfo[opcode].NumDstRegs;
149 }
150 
151 
152 /**
153  * Return string name for given program opcode.
154  */
155 const char *
_mesa_opcode_string(enum prog_opcode opcode)156 _mesa_opcode_string(enum prog_opcode opcode)
157 {
158    if (opcode < MAX_OPCODE)
159       return InstInfo[opcode].Name;
160    else {
161       static char s[20];
162       snprintf(s, sizeof(s), "OP%u", opcode);
163       return s;
164    }
165 }
166 
167