1 /* -*- mesa-c++ -*- 2 * Copyright 2018 Collabora LTD 3 * Author: Gert Wollny <[email protected]> 4 * SPDX-License-Identifier: MIT 5 */ 6 7 #include "sfn_alu_defines.h" 8 9 namespace r600 { 10 11 #define A AluOp::a 12 #define V AluOp::v 13 #define T AluOp::t 14 #define X AluOp::x 15 16 const std::map<EAluOp, AluOp> alu_ops = { 17 {op0_nop, AluOp(0, 0, 0, 0, A, A, A, "NOP") }, 18 {op0_group_barrier, AluOp(0, 0, 0, 0, X, X, X, "GROUP_BARRIER") }, 19 {op0_group_seq_begin, AluOp(0, 0, 0, 0, A, A, A, "GROUP_SEQ_BEGIN") }, 20 {op0_group_seq_end, AluOp(0, 0, 0, 0, A, A, A, "GROUP_SEQ_END") }, 21 {op0_pred_set_clr, AluOp(0, 0, 0, 0, A, A, A, "PRED_SET_CLR") }, 22 {op0_store_flags, AluOp(0, 0, 0, 0, V, V, V, "STORE_FLAGS") }, 23 {op0_lds_1a, AluOp(0, 0, 0, 0, V, V, V, "LDS_1A") }, 24 {op0_lds_1a1d, AluOp(0, 0, 0, 0, V, V, V, "LDS_1A1D") }, 25 {op0_lds_2a, AluOp(0, 0, 0, 0, V, V, V, "LDS_2A") }, 26 27 {op1_bcnt_int, AluOp(1, 0, 0, 0, V, V, V, "BCNT_INT") }, 28 {op1_bcnt_accum_prev_int, AluOp(1, 0, 0, 0, V, V, V, "BCNT_ACCUM_PREV_INT") }, 29 {op1_bfrev_int, AluOp(1, 0, 0, 0, A, A, A, "BFREV_INT") }, 30 {op1_ceil, AluOp(1, 1, 1, 0, A, A, A, "CEIL") }, 31 {op1_cos, AluOp(1, 1, 1, 0, T, T, T, "COS") }, 32 {op1_exp_ieee, AluOp(1, 1, 1, 0, T, T, T, "EXP_IEEE") }, 33 {op1_floor, AluOp(1, 1, 1, 0, A, A, A, "FLOOR") }, 34 {op1_flt_to_int, AluOp(1, 1, 0, 0, T, T, V, "FLT_TO_INT") }, 35 {op1_flt_to_uint, AluOp(1, 1, 0, 0, T, T, T, "FLT_TO_UINT") }, 36 {op1_flt_to_int_rpi, AluOp(1, 1, 0, 0, V, V, V, "FLT_TO_INT_RPI") }, 37 {op1_flt_to_int_floor, AluOp(1, 1, 0, 0, V, V, V, "FLT_TO_INT_FLOOR") }, 38 {op1_flt16_to_flt32, AluOp(1, 0, 1, 0, V, V, V, "FLT16_TO_FLT32") }, 39 {op1_flt32_to_flt16, AluOp(1, 1, 0, 0, V, V, V, "FLT32_TO_FLT16") }, 40 {op1_flt32_to_flt64, AluOp(1, 1, 0, 0, V, V, V, "FLT32_TO_FLT64") }, 41 {op1_flt64_to_flt32, AluOp(1, 1, 1, 1, A, A, A, "FLT64_TO_FLT32") }, 42 {op1_fract, AluOp(1, 1, 0, 0, A, A, A, "FRACT") }, 43 {op1_fract_64, AluOp(1, 1, 0, 1, V, V, V, "FRACT_64") }, 44 {op1_frexp_64, AluOp(1, 1, 0, 1, V, V, V, "FREXP_64") }, 45 {op1_int_to_flt, AluOp(1, 0, 1, 0, T, T, T, "INT_TO_FLT") }, 46 {op1_ldexp_64, AluOp(1, 1, 0, 1, V, V, V, "LDEXP_64") }, 47 {op1_interp_load_p0, AluOp(1, 0, 0, 0, V, V, V, "INTERP_LOAD_P0") }, 48 {op1_interp_load_p10, AluOp(1, 0, 0, 0, V, V, V, "INTERP_LOAD_P10") }, 49 {op1_interp_load_p20, AluOp(1, 0, 0, 0, V, V, V, "INTERP_LOAD_P20") }, 50 {op1_load_store_flags, AluOp(1, 0, 0, 0, V, V, V, "LOAD_STORE_FLAGS") }, 51 {op1_log_clamped, AluOp(1, 1, 1, 0, T, T, T, "LOG_CLAMPED") }, 52 {op1_log_ieee, AluOp(1, 1, 1, 0, T, T, T, "LOG_IEEE") }, 53 {op1_max4, AluOp(1, 1, 1, 0, V, V, V, "MAX4") }, 54 {op1_mbcnt_32hi_int, AluOp(1, 0, 0, 0, V, V, V, "MBCNT_32HI_INT") }, 55 {op1_mbcnt_32lo_accum_prev_int, AluOp(1, 0, 0, 0, V, V, V, "MBCNT_32LO_ACCUM_PREV_INT")}, 56 {op1_mov, AluOp(1, 0, 0, 0, A, A, A, "MOV") }, 57 {op1_mova_int, AluOp(1, 0, 0, 0, X, X, X, "MOVA_INT") }, 58 {op1_not_int, AluOp(1, 0, 0, 0, A, A, A, "NOT_INT") }, 59 {op1_offset_to_flt, AluOp(1, 0, 0, 0, V, V, V, "OFFSET_TO_FLT") }, 60 {op1_pred_set_inv, AluOp(1, 0, 0, 0, A, A, A, "PRED_SET_INV") }, 61 {op1_pred_set_restore, AluOp(1, 0, 0, 0, A, A, A, "PRED_SET_RESTORE") }, 62 {op1_set_cf_idx0, AluOp(1, 0, 0, 0, A, A, A, "SET_CF_IDX0") }, 63 {op1_set_cf_idx1, AluOp(1, 0, 0, 0, A, A, A, "SET_CF_IDX1") }, 64 {op1_recip_clamped, AluOp(1, 1, 1, 0, T, T, T, "RECIP_CLAMPED") }, 65 {op1_recip_ff, AluOp(1, 1, 1, 0, T, T, T, "RECIP_FF") }, 66 {op1_recip_ieee, AluOp(1, 1, 1, 0, T, T, T, "RECIP_IEEE") }, 67 {op1_recipsqrt_clamped, AluOp(1, 1, 1, 0, T, T, T, "RECIPSQRT_CLAMPED") }, 68 {op1_recipsqrt_ff, AluOp(1, 1, 1, 0, T, T, T, "RECIPSQRT_FF") }, 69 {op1_recipsqrt_ieee1, AluOp(1, 1, 1, 0, T, T, T, "RECIPSQRT_IEEE") }, 70 {op1_recip_int, AluOp(1, 0, 0, 0, T, T, T, "RECIP_INT") }, 71 {op1_recip_uint, AluOp(1, 0, 0, 0, T, T, T, "RECIP_UINT") }, 72 {op1_recip_64, AluOp(2, 1, 0, 1, T, T, T, "RECIP_64") }, 73 {op1_recip_clamped_64, AluOp(2, 1, 0, 1, T, T, T, "RECIP_CLAMPED_64") }, 74 {op1_recipsqrt_64, AluOp(2, 1, 0, 1, T, T, T, "RECIPSQRT_64") }, 75 {op1_recipsqrt_clamped_64, AluOp(2, 1, 0, 1, T, T, T, "RECIPSQRT_CLAMPED_64") }, 76 {op1_rndne, AluOp(1, 1, 1, 0, A, A, A, "RNDNE") }, 77 {op1_sqrt_ieee, AluOp(1, 1, 1, 0, T, T, T, "SQRT_IEEE") }, 78 {op1_sin, AluOp(1, 1, 1, 0, T, T, T, "SIN") }, 79 {op1_trunc, AluOp(1, 1, 1, 0, A, A, A, "TRUNC") }, 80 {op1_sqrt_64, AluOp(2, 1, 0, 1, T, T, T, "SQRT_64") }, 81 {op1_ubyte0_flt, AluOp(1, 0, 0, 0, V, V, V, "UBYTE0_FLT") }, 82 {op1_ubyte1_flt, AluOp(1, 0, 0, 0, V, V, V, "UBYTE1_FLT") }, 83 {op1_ubyte2_flt, AluOp(1, 0, 0, 0, V, V, V, "UBYTE2_FLT") }, 84 {op1_ubyte3_flt, AluOp(1, 0, 0, 0, V, V, V, "UBYTE3_FLT") }, 85 {op1_uint_to_flt, AluOp(1, 0, 1, 0, T, T, T, "UINT_TO_FLT") }, 86 {op1_ffbh_uint, AluOp(1, 0, 0, 0, V, V, V, "FFBH_UINT") }, 87 {op1_ffbl_int, AluOp(1, 0, 0, 0, V, V, V, "FFBL_INT") }, 88 {op1_ffbh_int, AluOp(1, 0, 0, 0, V, V, V, "FFBH_INT") }, 89 {op1_flt_to_uint4, AluOp(1, 1, 0, 0, V, V, V, "FLT_TO_UINT4") }, 90 {op1v_flt32_to_flt64, AluOp(1, 1, 0, 1, A, A, A, "FLT32_TO_FLT64") }, 91 {op1v_flt64_to_flt32, AluOp(1, 1, 1, 1, V, V, V, "FLT64_TO_FLT32") }, 92 93 {op2_add, AluOp(2, 1, 1, 0, A, A, A, "ADD") }, 94 {op2_bfm_int, AluOp(2, 0, 0, 0, V, V, V, "BFM_INT") }, 95 {op2_mul, AluOp(2, 1, 1, 0, A, A, A, "MUL") }, 96 {op2_mul_ieee, AluOp(2, 1, 1, 0, A, A, A, "MUL_IEEE") }, 97 {op2_max, AluOp(2, 1, 1, 0, A, A, A, "MAX") }, 98 {op2_min, AluOp(2, 1, 1, 0, A, A, A, "MIN") }, 99 {op2_max_dx10, AluOp(2, 1, 1, 0, A, A, A, "MAX_DX10") }, 100 {op2_min_dx10, AluOp(2, 1, 1, 0, A, A, A, "MIN_DX10") }, 101 {op2_sete, AluOp(2, 1, 0, 0, A, A, A, "SETE") }, 102 {op2_setgt, AluOp(2, 1, 0, 0, A, A, A, "SETGT") }, 103 {op2_setge, AluOp(2, 1, 0, 0, A, A, A, "SETGE") }, 104 {op2_setne, AluOp(2, 1, 0, 0, A, A, A, "SETNE") }, 105 {op2_sete_dx10, AluOp(2, 1, 0, 0, A, A, A, "SETE_DX10") }, 106 {op2_setgt_dx10, AluOp(2, 1, 0, 0, A, A, A, "SETGT_DX10") }, 107 {op2_setge_dx10, AluOp(2, 1, 0, 0, A, A, A, "SETGE_DX10") }, 108 {op2_setne_dx10, AluOp(2, 1, 0, 0, A, A, A, "SETNE_DX10") }, 109 {op2_ashr_int, AluOp(2, 0, 0, 0, T, A, A, "ASHR_INT") }, 110 {op2_lshr_int, AluOp(2, 0, 0, 0, T, A, A, "LSHR_INT") }, 111 {op2_lshl_int, AluOp(2, 0, 0, 0, T, A, A, "LSHL_INT") }, 112 {op2_mul_64, AluOp(2, 1, 1, 1, A, A, A, "MUL_64") }, 113 {op2_pred_setgt_uint, AluOp(2, 0, 0, 0, A, A, A, "PRED_SETGT_UINT") }, 114 {op2_pred_setge_uint, AluOp(2, 0, 0, 0, A, A, A, "PRED_SETGE_UINT") }, 115 {op2_pred_sete, AluOp(2, 1, 0, 0, A, A, A, "PRED_SETE") }, 116 {op2_pred_setgt, AluOp(2, 1, 0, 0, A, A, A, "PRED_SETGT") }, 117 {op2_pred_setge, AluOp(2, 1, 0, 0, A, A, A, "PRED_SETGE") }, 118 {op2_pred_setne, AluOp(2, 1, 0, 0, A, A, A, "PRED_SETNE") }, 119 {op2_pred_set_pop, AluOp(2, 1, 0, 0, A, A, A, "PRED_SET_POP") }, 120 {op2_pred_sete_push, AluOp(2, 1, 0, 0, A, A, A, "PRED_SETE_PUSH") }, 121 {op2_pred_setgt_push, AluOp(2, 1, 0, 0, A, A, A, "PRED_SETGT_PUSH") }, 122 {op2_pred_setge_push, AluOp(2, 1, 0, 0, A, A, A, "PRED_SETGE_PUSH") }, 123 {op2_pred_setne_push, AluOp(2, 1, 0, 0, A, A, A, "PRED_SETNE_PUSH") }, 124 {op2_kille, AluOp(2, 1, 0, 0, A, A, A, "KILLE") }, 125 {op2_killgt, AluOp(2, 1, 0, 0, A, A, A, "KILLGT") }, 126 {op2_killge, AluOp(2, 1, 0, 0, A, A, A, "KILLGE") }, 127 {op2_killne, AluOp(2, 1, 0, 0, A, A, A, "KILLNE") }, 128 {op2_and_int, AluOp(2, 0, 0, 0, A, A, A, "AND_INT") }, 129 {op2_or_int, AluOp(2, 0, 0, 0, A, A, A, "OR_INT") }, 130 {op2_xor_int, AluOp(2, 0, 0, 0, A, A, A, "XOR_INT") }, 131 {op2_add_int, AluOp(2, 0, 0, 0, A, A, A, "ADD_INT") }, 132 {op2_sub_int, AluOp(2, 0, 0, 0, A, A, A, "SUB_INT") }, 133 {op2_max_int, AluOp(2, 0, 0, 0, A, A, A, "MAX_INT") }, 134 {op2_min_int, AluOp(2, 0, 0, 0, A, A, A, "MIN_INT") }, 135 {op2_max_uint, AluOp(2, 0, 0, 0, A, A, A, "MAX_UINT") }, 136 {op2_min_uint, AluOp(2, 0, 0, 0, A, A, A, "MIN_UINT") }, 137 {op2_sete_int, AluOp(2, 0, 0, 0, A, A, A, "SETE_INT") }, 138 {op2_setgt_int, AluOp(2, 0, 0, 0, A, A, A, "SETGT_INT") }, 139 {op2_setge_int, AluOp(2, 0, 0, 0, A, A, A, "SETGE_INT") }, 140 {op2_setne_int, AluOp(2, 0, 0, 0, A, A, A, "SETNE_INT") }, 141 {op2_setgt_uint, AluOp(2, 0, 0, 0, A, A, A, "SETGT_UINT") }, 142 {op2_setge_uint, AluOp(2, 0, 0, 0, A, A, A, "SETGE_UINT") }, 143 {op2_killgt_uint, AluOp(2, 0, 0, 0, A, A, A, "KILLGT_UINT") }, 144 {op2_killge_uint, AluOp(2, 0, 0, 0, A, A, A, "KILLGE_UINT") }, 145 {op2_prede_int, AluOp(2, 0, 0, 0, A, A, A, "PREDE_INT") }, 146 {op2_pred_setgt_int, AluOp(2, 0, 0, 0, A, A, A, "PRED_SETGT_INT") }, 147 {op2_pred_setge_int, AluOp(2, 0, 0, 0, A, A, A, "PRED_SETGE_INT") }, 148 {op2_pred_setne_int, AluOp(2, 0, 0, 0, A, A, A, "PRED_SETNE_INT") }, 149 {op2_kille_int, AluOp(2, 0, 0, 0, A, A, A, "KILLE_INT") }, 150 {op2_killgt_int, AluOp(2, 0, 0, 0, A, A, A, "KILLGT_INT") }, 151 {op2_killge_int, AluOp(2, 0, 0, 0, A, A, A, "KILLGE_INT") }, 152 {op2_killne_int, AluOp(2, 0, 0, 0, A, A, A, "KILLNE_INT") }, 153 {op2_pred_sete_push_int, AluOp(2, 0, 0, 0, A, A, A, "PRED_SETE_PUSH_INT") }, 154 {op2_pred_setgt_push_int, AluOp(2, 0, 0, 0, A, A, A, "PRED_SETGT_PUSH_INT") }, 155 {op2_pred_setge_push_int, AluOp(2, 0, 0, 0, A, A, A, "PRED_SETGE_PUSH_INT") }, 156 {op2_pred_setne_push_int, AluOp(2, 0, 0, 0, A, A, A, "PRED_SETNE_PUSH_INT") }, 157 {op2_pred_setlt_push_int, AluOp(2, 0, 0, 0, A, A, A, "PRED_SETLT_PUSH_INT") }, 158 {op2_pred_setle_push_int, AluOp(2, 0, 0, 0, A, A, A, "PRED_SETLE_PUSH_INT") }, 159 {op2_addc_uint, AluOp(2, 0, 0, 0, A, A, A, "ADDC_UINT") }, 160 {op2_subb_uint, AluOp(2, 0, 0, 0, A, A, A, "SUBB_UINT") }, 161 {op2_set_mode, AluOp(2, 0, 0, 0, A, A, A, "SET_MODE") }, 162 {op2_set_lds_size, AluOp(2, 0, 0, 0, A, A, A, "SET_LDS_SIZE") }, 163 {op2_mullo_int, AluOp(2, 0, 0, 0, T, T, T, "MULLO_INT") }, 164 {op2_mulhi_int, AluOp(2, 0, 0, 0, T, T, T, "MULHI_INT") }, 165 {op2_mullo_uint, AluOp(2, 0, 0, 0, T, T, T, "MULLO_UINT") }, 166 {op2_mulhi_uint, AluOp(2, 0, 0, 0, T, T, T, "MULHI_UINT") }, 167 {op2_dot_ieee, AluOp(2, 1, 1, 0, V, V, V, "DOT_IEEE") }, 168 {op2_mulhi_uint24, AluOp(2, 0, 0, 0, V, V, V, "MULHI_UINT24") }, 169 {op2_mul_uint24, AluOp(2, 0, 0, 0, V, V, V, "MUL_UINT24") }, 170 {op2_sete_64, AluOp(2, 1, 0, 1, V, V, V, "SETE_64") }, 171 {op2_setne_64, AluOp(2, 1, 0, 1, V, V, V, "SETNE_64") }, 172 {op2_setgt_64, AluOp(2, 1, 0, 1, V, V, V, "SETGT_64") }, 173 {op2_setge_64, AluOp(2, 1, 0, 1, V, V, V, "SETGE_64") }, 174 {op2_min_64, AluOp(2, 1, 0, 1, V, V, V, "MIN_64") }, 175 {op2_max_64, AluOp(2, 1, 0, 1, V, V, V, "MAX_64") }, 176 {op2_dot4, AluOp(2, 1, 1, 0, V, V, V, "DOT4") }, 177 {op2_dot4_ieee, AluOp(2, 1, 1, 0, V, V, V, "DOT4_IEEE") }, 178 {op2_cube, AluOp(2, 1, 0, 0, V, V, V, "CUBE") }, 179 {op2_pred_setgt_64, AluOp(2, 1, 0, 1, V, V, V, "PRED_SETGT_64") }, 180 {op2_pred_sete_64, AluOp(2, 1, 0, 1, V, V, V, "PRED_SETE_64") }, 181 {op2_pred_setge_64, AluOp(2, 1, 0, 1, V, V, V, "PRED_SETGE_64") }, 182 {OP2V_MUL_64, AluOp(2, 1, 0, 1, V, V, V, "MUL_64") }, 183 {op2_add_64, AluOp(2, 1, 1, 1, V, V, V, "ADD_64") }, 184 {op2_sad_accum_prev_uint, AluOp(2, 0, 0, 0, V, V, V, "SAD_ACCUM_PREV_UINT") }, 185 {op2_dot, AluOp(2, 1, 0, 0, V, V, V, "DOT") }, 186 {op1_mul_prev, AluOp(2, 1, 0, 0, V, V, V, "MUL_PREV") }, 187 {op1_mul_ieee_prev, AluOp(2, 1, 0, 0, V, V, V, "MUL_IEEE_PREV") }, 188 {op1_add_prev, AluOp(2, 1, 0, 0, V, V, V, "ADD_PREV") }, 189 {op2_muladd_prev, AluOp(2, 1, 0, 0, V, V, V, "MULADD_PREV") }, 190 {op2_muladd_ieee_prev, AluOp(2, 1, 0, 0, V, V, V, "MULADD_IEEE_PREV") }, 191 {op2_interp_xy, AluOp(2, 0, 0, 0, V, V, V, "INTERP_XY") }, 192 {op2_interp_zw, AluOp(2, 0, 0, 0, V, V, V, "INTERP_ZW") }, 193 {op2_interp_x, AluOp(2, 0, 0, 0, V, V, V, "INTERP_X") }, 194 {op2_interp_z, AluOp(2, 0, 0, 0, V, V, V, "INTERP_Z") }, 195 196 {op3_bfe_uint, AluOp(3, 0, 0, 0, V, V, V, "BFE_UINT") }, 197 {op3_bfe_int, AluOp(3, 0, 0, 0, V, V, V, "BFE_INT") }, 198 {op3_bfi_int, AluOp(3, 0, 0, 0, V, V, V, "BFI_INT") }, 199 {op3_fma, AluOp(3, 1, 1, 0, V, V, V, "FMA") }, 200 {op3_cndne_64, AluOp(3, 1, 0, 1, V, V, V, "CNDNE_64") }, 201 {op3_fma_64, AluOp(3, 1, 1, 1, V, V, V, "FMA_64") }, 202 {op3_lerp_uint, AluOp(3, 0, 0, 0, V, V, V, "LERP_UINT") }, 203 {op3_bit_align_int, AluOp(3, 0, 0, 0, V, V, V, "BIT_ALIGN_INT") }, 204 {op3_byte_align_int, AluOp(3, 0, 0, 0, V, V, V, "BYTE_ALIGN_INT") }, 205 {op3_sad_accum_uint, AluOp(3, 0, 0, 0, V, V, V, "SAD_ACCUM_UINT") }, 206 {op3_sad_accum_hi_uint, AluOp(3, 0, 0, 0, V, V, V, "SAD_ACCUM_HI_UINT") }, 207 {op3_muladd_uint24, AluOp(3, 0, 0, 0, V, V, V, "MULADD_UINT24") }, 208 {op3_lds_idx_op, AluOp(3, 0, 0, 0, X, X, X, "LDS_IDX_OP") }, 209 {op3_muladd, AluOp(3, 1, 1, 0, A, A, A, "MULADD") }, 210 {op3_muladd_m2, AluOp(3, 1, 1, 0, A, A, A, "MULADD_M2") }, 211 {op3_muladd_m4, AluOp(3, 1, 1, 0, A, A, A, "MULADD_M4") }, 212 {op3_muladd_d2, AluOp(3, 1, 1, 0, A, A, A, "MULADD_D2") }, 213 {op3_muladd_ieee, AluOp(3, 1, 1, 0, A, A, A, "MULADD_IEEE") }, 214 {op3_cnde, AluOp(3, 0, 0, 0, A, A, A, "CNDE") }, 215 {op3_cndgt, AluOp(3, 0, 0, 0, A, A, A, "CNDGT") }, 216 {op3_cndge, AluOp(3, 0, 0, 0, A, A, A, "CNDGE") }, 217 {op3_cnde_int, AluOp(3, 0, 0, 0, A, A, A, "CNDE_INT") }, 218 {op3_cndgt_int, AluOp(3, 0, 0, 0, A, A, A, "CNDGT_INT") }, 219 {op3_cndge_int, AluOp(3, 0, 0, 0,A, A, A, "CNDGE_INT") }, 220 {op3_mul_lit, AluOp(3, 1, 0, 0,T, T, T, "MUL_LIT") } 221 }; 222 223 #undef A 224 #undef V 225 #undef T 226 #undef X 227 228 const std::map<AluInlineConstants, AluInlineConstantDescr> alu_src_const = { 229 {ALU_SRC_LDS_OQ_A, {false, "LDS_OQ_A"} }, 230 {ALU_SRC_LDS_OQ_B, {false, "LDS_OQ_B"} }, 231 {ALU_SRC_LDS_OQ_A_POP, {false, "LDS_OQ_A_POP"} }, 232 {ALU_SRC_LDS_OQ_B_POP, {false, "LDS_OQ_B_POP"} }, 233 {ALU_SRC_LDS_DIRECT_A, {false, "LDS_DIRECT_A"} }, 234 {ALU_SRC_LDS_DIRECT_B, {false, "LDS_DIRECT_B"} }, 235 {ALU_SRC_TIME_HI, {false, "TIME_HI"} }, 236 {ALU_SRC_TIME_LO, {false, "TIME_LO"} }, 237 {ALU_SRC_MASK_HI, {false, "MASK_HI"} }, 238 {ALU_SRC_MASK_LO, {false, "MASK_LO"} }, 239 {ALU_SRC_HW_WAVE_ID, {false, "HW_WAVE_ID"} }, 240 {ALU_SRC_SIMD_ID, {false, "SIMD_ID"} }, 241 {ALU_SRC_SE_ID, {false, "SE_ID"} }, 242 {ALU_SRC_HW_THREADGRP_ID, {false, "HW_THREADGRP_ID"} }, 243 {ALU_SRC_WAVE_ID_IN_GRP, {false, "WAVE_ID_IN_GRP"} }, 244 {ALU_SRC_NUM_THREADGRP_WAVES, {false, "NUM_THREADGRP_WAVES"}}, 245 {ALU_SRC_HW_ALU_ODD, {false, "HW_ALU_ODD"} }, 246 {ALU_SRC_LOOP_IDX, {false, "LOOP_IDX"} }, 247 {ALU_SRC_PARAM_BASE_ADDR, {false, "PARAM_BASE_ADDR"} }, 248 {ALU_SRC_NEW_PRIM_MASK, {false, "NEW_PRIM_MASK"} }, 249 {ALU_SRC_PRIM_MASK_HI, {false, "PRIM_MASK_HI"} }, 250 {ALU_SRC_PRIM_MASK_LO, {false, "PRIM_MASK_LO"} }, 251 {ALU_SRC_1_DBL_L, {false, "1.0L"} }, 252 {ALU_SRC_1_DBL_M, {false, "1.0H"} }, 253 {ALU_SRC_0_5_DBL_L, {false, "0.5L"} }, 254 {ALU_SRC_0_5_DBL_M, {false, "0.5H"} }, 255 {ALU_SRC_0, {false, "0"} }, 256 {ALU_SRC_1, {false, "1.0"} }, 257 {ALU_SRC_1_INT, {false, "1"} }, 258 {ALU_SRC_M_1_INT, {false, "-1"} }, 259 {ALU_SRC_0_5, {false, "0.5"} }, 260 {ALU_SRC_LITERAL, {true, "ALU_SRC_LITERAL"} }, 261 {ALU_SRC_PV, {true, "PV"} }, 262 {ALU_SRC_PS, {false, "PS"} } 263 }; 264 265 const std::map<ESDOp, LDSOp> lds_ops = { 266 {DS_OP_ADD, {2, "ADD"} }, 267 {DS_OP_SUB, {2, "SUB"} }, 268 {DS_OP_RSUB, {2, "RSUB"} }, 269 {DS_OP_INC, {2, "INC"} }, 270 {DS_OP_DEC, {2, "DEC"} }, 271 {DS_OP_MIN_INT, {2, "MIN_INT"} }, 272 {DS_OP_MAX_INT, {2, "MAX_INT"} }, 273 {DS_OP_MIN_UINT, {2, "MIN_UINT"} }, 274 {DS_OP_MAX_UINT, {2, "MAX_UINT"} }, 275 {DS_OP_AND, {2, "AND"} }, 276 {DS_OP_OR, {2, "OR"} }, 277 {DS_OP_XOR, {2, "XOR"} }, 278 {DS_OP_MSKOR, {3, "MSKOR"} }, 279 {DS_OP_WRITE, {2, "WRITE"} }, 280 {DS_OP_WRITE_REL, {3, "WRITE_REL"} }, 281 {DS_OP_WRITE2, {3, "WRITE2"} }, 282 {DS_OP_CMP_STORE, {3, "CMP_STORE"} }, 283 {DS_OP_CMP_STORE_SPF, {3, "CMP_STORE_SPF"} }, 284 {DS_OP_BYTE_WRITE, {2, "BYTE_WRITE"} }, 285 {DS_OP_SHORT_WRITE, {2, "SHORT_WRITE"} }, 286 {DS_OP_ADD_RET, {2, "ADD_RET"} }, 287 {DS_OP_SUB_RET, {2, "SUB_RET"} }, 288 {DS_OP_RSUB_RET, {2, "RSUB_RET"} }, 289 {DS_OP_INC_RET, {2, "INC_RET"} }, 290 {DS_OP_DEC_RET, {2, "DEC_RET"} }, 291 {DS_OP_MIN_INT_RET, {2, "MIN_INT_RET"} }, 292 {DS_OP_MAX_INT_RET, {2, "MAX_INT_RET"} }, 293 {DS_OP_MIN_UINT_RET, {2, "MIN_UINT_RET"} }, 294 {DS_OP_MAX_UINT_RET, {2, "MAX_UINT_RET"} }, 295 {DS_OP_AND_RET, {2, "AND_RET"} }, 296 {DS_OP_OR_RET, {2, "OR_RET"} }, 297 {DS_OP_XOR_RET, {2, "XOR_RET"} }, 298 {DS_OP_MSKOR_RET, {3, "MSKOR_RET"} }, 299 {DS_OP_XCHG_RET, {2, "XCHG_RET"} }, 300 {DS_OP_XCHG_REL_RET, {3, "XCHG_REL_RET"} }, 301 {DS_OP_XCHG2_RET, {3, "XCHG2_RET"} }, 302 {DS_OP_CMP_XCHG_RET, {3, "CMP_XCHG_RET"} }, 303 {DS_OP_CMP_XCHG_SPF_RET, {3, "CMP_XCHG_SPF_RET"} }, 304 {DS_OP_READ_RET, {1, "READ_RET"} }, 305 {DS_OP_READ_REL_RET, {1, "READ_REL_RET"} }, 306 {DS_OP_READ2_RET, {2, "READ2_RET"} }, 307 {DS_OP_READWRITE_RET, {3, "READWRITE_RET"} }, 308 {DS_OP_BYTE_READ_RET, {1, "BYTE_READ_RET"} }, 309 {DS_OP_UBYTE_READ_RET, {1, "UBYTE_READ_RET"} }, 310 {DS_OP_SHORT_READ_RET, {1, "SHORT_READ_RET"} }, 311 {DS_OP_USHORT_READ_RET, {1, "USHORT_READ_RET"} }, 312 {DS_OP_ATOMIC_ORDERED_ALLOC_RET, {3, "ATOMIC_ORDERED_ALLOC_RET"}}, 313 {LDS_ADD_RET, {2, "LDS_ADD_RET"} }, 314 {LDS_ADD, {2, "LDS_ADD"} }, 315 {LDS_AND_RET, {2, "LDS_AND_RET"} }, 316 {LDS_AND, {2, "LDS_AND"} }, 317 {LDS_WRITE, {2, "LDS_WRITE"} }, 318 {LDS_OR_RET, {2, "LDS_OR_RET"} }, 319 {LDS_OR, {2, "LDS_OR"} }, 320 {LDS_MAX_INT_RET, {2, "LDS_MAX_INT_RET"} }, 321 {LDS_MAX_INT, {2, "LDS_MAX_INT"} }, 322 {LDS_MAX_UINT_RET, {2, "LDS_MAX_UINT_RET"} }, 323 {LDS_MAX_UINT, {2, "LDS_MAX_UINT"} }, 324 {LDS_MIN_INT_RET, {2, "LDS_MIN_INT_RET"} }, 325 {LDS_MIN_INT, {2, "LDS_MIN_INT"} }, 326 {LDS_MIN_UINT_RET, {2, "LDS_MIN_UINT_RET"} }, 327 {LDS_MIN_UINT, {2, "LDS_MIN_UINT"} }, 328 {LDS_XOR_RET, {2, "LDS_XOR"} }, 329 {LDS_XOR, {2, "LDS_XOR"} }, 330 {LDS_XCHG_RET, {2, "LDS_XCHG_RET"} }, 331 {LDS_CMP_XCHG_RET, {3, "LDS_CMP_XCHG_RET"} }, 332 {LDS_WRITE_REL, {3, "LDS_WRITE_REL"} }, 333 }; 334 335 } // namespace r600 336