1 /*
2 * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Licensed under the Apache License, Version 2.0 (the License); you may
7 * not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
9 *
10 * www.apache.org/licenses/LICENSE-2.0
11 *
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
17 */
18
19 /* ----------------------------------------------------------------------
20 * Project: CMSIS NN Library
21 * Title: arm_nn_mult_q7.c
22 * Description: Q7 vector multiplication with variable output shifts
23 *
24 * $Date: 13. July 2018
25 * $Revision: V.1.0.0
26 *
27 * Target Processor: Cortex-M cores
28 *
29 * -------------------------------------------------------------------- */
30
31 #include "arm_nnfunctions.h"
32
33 /**
34 * @ingroup groupSupport
35 */
36
37 /**
38 * @addtogroup NNBasicMath
39 * @{
40 */
41
42 /**
43 * @brief Q7 vector multiplication with variable output shifts
44 * @param[in] *pSrcA pointer to the first input vector
45 * @param[in] *pSrcB pointer to the second input vector
46 * @param[out] *pDst pointer to the output vector
47 * @param[in] out_shift amount of right-shift for output
48 * @param[in] blockSize number of samples in each vector
49 * @return none.
50 *
51 * <b>Scaling and Overflow Behavior:</b>
52 * \par
53 * The function uses saturating arithmetic.
54 * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
55 */
56
arm_nn_mult_q7(q7_t * pSrcA,q7_t * pSrcB,q7_t * pDst,const uint16_t out_shift,uint32_t blockSize)57 void arm_nn_mult_q7(
58 q7_t * pSrcA,
59 q7_t * pSrcB,
60 q7_t * pDst,
61 const uint16_t out_shift,
62 uint32_t blockSize)
63 {
64 uint32_t blkCnt; /* loop counters */
65
66 #if defined (ARM_MATH_DSP)
67
68 /* Run the below code for Cortex-M4 and Cortex-M3 */
69 q7_t out1, out2, out3, out4; /* Temporary variables to store the product */
70
71 /* loop Unrolling */
72 blkCnt = blockSize >> 2U;
73
74 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
75 ** a second loop below computes the remaining 1 to 3 samples. */
76 while (blkCnt > 0U)
77 {
78 /* C = A * B */
79 /* Multiply the inputs and store the results in temporary variables */
80 out1 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 8);
81 out2 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 8);
82 out3 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 8);
83 out4 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 8);
84
85 /* Store the results of 4 inputs in the destination buffer in single cycle by packing */
86 *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
87
88 /* Decrement the blockSize loop counter */
89 blkCnt--;
90 }
91
92 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
93 ** No loop unrolling is used. */
94 blkCnt = blockSize % 0x4U;
95
96 #else
97
98 /* Run the below code for Cortex-M0 */
99
100 /* Initialize blkCnt with number of samples */
101 blkCnt = blockSize;
102
103 #endif /* #if defined (ARM_MATH_DSP) */
104
105
106 while (blkCnt > 0U)
107 {
108 /* C = A * B */
109 /* Multiply the inputs and store the result in the destination buffer */
110 *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 8);
111
112 /* Decrement the blockSize loop counter */
113 blkCnt--;
114 }
115 }
116
117 /**
118 * @} end of NNBasicMath group
119 */
120