xref: /aosp_15_r20/external/intel-media-driver/media_driver/agnostic/gen12/hw/vdbox/mhw_vdbox_vdenc_g12_X.h (revision ba62d9d3abf0e404f2022b4cd7a85e107f48596f)
1 /*===================== begin_copyright_notice ==================================
2 
3 Copyright (c) 2017-2021, Intel Corporation
4 
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16 OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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23 ======================= end_copyright_notice ==================================*/
24 
25 //! \file     mhw_vdbox_vdenc_g12_X.h
26 //! \details  Defines functions for constructing Vdbox Vdenc commands on Gen12-based platforms
27 //!
28 
29 #ifndef __MHW_VDBOX_VDENC_G12_X_H__
30 #define __MHW_VDBOX_VDENC_G12_X_H__
31 
32 #include "mhw_vdbox_vdenc_generic.h"
33 #include "mhw_vdbox_vdenc_hwcmd_g12_X.h"
34 #include "mhw_vdbox_g12_X.h"
35 #include "mos_interface.h"
36 
37 #define VDENCHEVC_RSC_OFFSET_C420OR422_DXX_LCU32OR64_4K_G12               1824
38 #define VDENCHEVC_RSC_OFFSET_C420OR422_DXX_LCU32OR64_8K_G12               2304
39 #define VDENCHEVC_RSC_OFFSET_C444_D8_LCU32OR64_4K_G12                     1568
40 #define VDENCHEVC_RSC_OFFSET_C444_D8_LCU32OR64_8K_G12                     2112
41 #define VDENCHEVC_RSC_OFFSET_C444_D10_LCU32OR64_4K_G12                    2336
42 #define VDENCHEVC_RSC_OFFSET_C444_D10_LCU32OR64_8K_G12                    1600
43 #define VDENCHEVC_RSC_OFFSET_C444_D12_LCU32OR64_4K_G12                    2336
44 #define VDENCHEVC_RSC_OFFSET_C444_D12_LCU32OR64_8K_G12                    1600
45 
46 // TGL rowstore Cache Values
47 #define VP9VDENCROWSTORE_BASEADDRESS_1536                                 1536
48 #define VP9VDENCROWSTORE_BASEADDRESS_2304                                 2304
49 #define VP9VDENCROWSTORE_BASEADDRESS_2368                                 2368
50 #define VP9VDENCROWSTORE_BASEADDRESS_2112                                 2112
51 #define VP9VDENCROWSTORE_BASEADDRESS_1920                                 1920
52 #define VP9VDENCROWSTORE_BASEADDRESS_768                                  768
53 #define RESERVED_VDENC_ROWSTORE_BASEADDRESS                               2370
54 #define RESERVED_VDENC_IPDL_ROWSTORE_BASEADDRESS                          384
55 #define AVC_VDENC_IPDL_ROWSTORE_BASEADDRESS                               512
56 
57 #define GEN12_AVC_VDENC_ROWSTORE_BASEADDRESS                                  1280
58 #define GEN12_AVC_VDENC_ROWSTORE_BASEADDRESS_MBAFF                            1536
59 #define GEN12_VP8_VDENC_ROWSTORE_BASEADDRESS                                  1536
60 
61 #define OFFSET_OF(TYPE, MEMBER) ((size_t) & ((TYPE *)0)->MEMBER )
62 
63 typedef struct _MHW_VDBOX_VDENC_CONTROL_STATE_PARAMS
64 {
65     bool      bVdencInitialization;
66 }MHW_VDBOX_VDENC_CONTROL_STATE_PARAMS, *PMHW_VDBOX_VDENC_CONTROL_STATE_PARAMS;
67 
68 struct MHW_VDBOX_VDENC_WALKER_STATE_PARAMS_G12 : public MHW_VDBOX_VDENC_WALKER_STATE_PARAMS
69 {
70     // GEN11+ tiling support
71     PMHW_VDBOX_HCP_TILE_CODING_PARAMS_G12   pTileCodingParams = nullptr;
72     uint32_t                                dwNumberOfPipes = 0;
73     uint32_t                                dwTileId = 0;
74     uint32_t                                IBCControl = 0;
75     uint32_t                                RowStaticInfo_31_0 = 0;
76     uint32_t                                RowStaticInfo_63_32 = 0;
77     uint32_t                                RowStaticInfo_95_64 = 0;
78     uint32_t                                RowStaticInfo_127_96 = 0;
79     uint32_t                                ctbSize = 0;
80     uint32_t                                minCodingBlkSize = 0;
81     uint32_t                                frameWidthMinus1 = 0;
82     uint32_t                                frameHeightMinus1 = 0;
83 };
84 using PMHW_VDBOX_VDENC_WALKER_STATE_PARAMS_G12 = MHW_VDBOX_VDENC_WALKER_STATE_PARAMS_G12 *;
85 
86 struct MHW_VDBOX_VD_PIPE_FLUSH_PARAMS_G12
87 {
88     union
89     {
90         struct
91         {
92             uint16_t       bWaitDoneHEVC            : 1;
93             uint16_t       bWaitDoneVDENC           : 1;
94             uint16_t       bWaitDoneMFL             : 1;
95             uint16_t       bWaitDoneMFX             : 1;
96             uint16_t       bWaitDoneVDCmdMsgParser  : 1;
97             uint16_t       bFlushHEVC               : 1;
98             uint16_t       bFlushVDENC              : 1;
99             uint16_t       bFlushMFL                : 1;
100             uint16_t       bFlushMFX                : 1;
101             uint16_t       bWaitDoneAV1             : 1;
102             uint16_t       bFlushAV1                : 1;
103             uint16_t                                : 5;
104         };
105         struct
106         {
107             uint16_t       Value;
108         };
109     }Flags;
110 };
111 using PMHW_VDBOX_VD_PIPE_FLUSH_PARAMS_G12 = MHW_VDBOX_VD_PIPE_FLUSH_PARAMS_G12 *;
112 
113 //!  MHW Vdbox Vdenc interface for Gen12
114 /*!
115 This class defines the Vdenc command construction functions for Gen12 platforms as template
116 */
117 template <typename TVdencCmds>
118 class MhwVdboxVdencInterfaceG12 : public MhwVdboxVdencInterfaceGeneric<TVdencCmds>
119 {
120 protected:
121     enum CommandsNumberOfAddresses
122     {
123         MI_FLUSH_DW_CMD_NUMBER_OF_ADDRESSES = 1,
124         MI_BATCH_BUFFER_START_CMD_NUMBER_OF_ADDRESSES = 1,
125         VDENC_PIPE_BUF_ADDR_STATE_CMD_NUMBER_OF_ADDRESSES = 21
126     };
127 
128     enum VdencSurfaceFormat
129     {
130         vdencSurfaceFormatYuv422          = 0x0,
131         vdencSurfaceFormatRgba4444        = 0x1,
132         vdencSurfaceFormatYuv444          = 0x2,
133         vdencSurfaceFormatP010Variant     = 0x3,
134         vdencSurfaceFormatPlanar420_8     = 0x4,
135         vdencSurfaceFormatYcrcbSwapy422   = 0x5,
136         vdencSurfaceFormatYcrcbSwapuv422  = 0x6,
137         vdencSurfaceFormatYcrcbSwapuvy422 = 0x7,
138         vdencSurfaceFormatY216            = 0x8,
139         vdencSurfaceFormatY210            = 0x8,  // Same value is used to represent Y216 and Y210
140         vdencSurfaceFormatRgba_10_10_10_2 = 0x9,
141         vdencSurfaceFormatY410            = 0xa,
142         vdencSurfaceFormatNv21            = 0xb,
143         vdencSurfaceFormatY416            = 0xc,
144         vdencSurfaceFormatP010            = 0xd,
145         vdencSurfaceFormatPlanarP016      = 0xe,
146         vdencSurfaceFormatY8Unorm         = 0xf,
147         vdencSurfaceFormatY16             = 0x10,
148         vdencSurfaceFormatY216Variant     = 0x11,
149         vdencSurfaceFormatY416Variant     = 0x12,
150         vdencSurfaceFormatYuyvVariant     = 0x13,
151         vdencSurfaceFormatAyuvVariant     = 0x14,
152     };
153 
154     enum VDENC_WALKER_STATE_IBC_CONTROL
155     {
156         VDENC_WALKER_STATE_COMMAND_IBC_CONTROL_IBC_DISABLED_G12 = 0x0,
157         VDENC_WALKER_STATE_COMMAND_IBC_CONTROL_IBC_ONLY_LBC_G12 = 0x1,
158         VDENC_WALKER_STATE_COMMAND_IBC_CONTROL_IBC_ENABLED_TBCLBC_G12 = 0x3,
159     };
160 
InitRowstoreUserFeatureSettings()161     MOS_STATUS InitRowstoreUserFeatureSettings() override
162     {
163         MHW_FUNCTION_ENTER;
164 
165         MOS_USER_FEATURE_VALUE_DATA userFeatureData;
166         MEDIA_FEATURE_TABLE *skuTable = this->m_osInterface->pfnGetSkuTable(this->m_osInterface);
167 
168         MHW_MI_CHK_NULL(skuTable);
169 
170         MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
171         if (this->m_osInterface->bSimIsActive)
172         {
173             // Disable RowStore Cache on simulation by default
174             userFeatureData.u32Data = 1;
175         }
176         else
177         {
178             userFeatureData.u32Data = 0;
179         }
180 
181         userFeatureData.i32DataFlag = MOS_USER_FEATURE_VALUE_DATA_FLAG_CUSTOM_DEFAULT_VALUE_TYPE;
182 #if (_DEBUG || _RELEASE_INTERNAL)
183         MOS_UserFeature_ReadValue_ID(
184             nullptr,
185             __MEDIA_USER_FEATURE_VALUE_ROWSTORE_CACHE_DISABLE_ID,
186             &userFeatureData,
187             this->m_osInterface->pOsContext);
188 #endif // _DEBUG || _RELEASE_INTERNAL
189         this->m_rowstoreCachingSupported = userFeatureData.i32Data ? false : true;
190 
191         if (this->m_rowstoreCachingSupported)
192         {
193             MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
194 #if (_DEBUG || _RELEASE_INTERNAL)
195             MOS_UserFeature_ReadValue_ID(
196                 nullptr,
197                 __MEDIA_USER_FEATURE_VALUE_VDENCROWSTORECACHE_DISABLE_ID,
198                 &userFeatureData,
199                 this->m_osInterface->pOsContext);
200 #endif // _DEBUG || _RELEASE_INTERNAL
201             this->m_vdencRowStoreCache.bSupported = userFeatureData.i32Data ? false : true;
202         }
203 
204         return MOS_STATUS_SUCCESS;
205     }
206 
207     //!
208     //! \brief    Translate MOS type format to vdenc surface raw format
209     //! \details  VDBOX protected function to translate mos format to media state format
210     //! \param    MOS_FORMAT  Format
211     //!           [in] MOS type format
212     //! \return   VdencSurfaceFormat
213     //!           media state surface format
214     //!
MosFormatToVdencSurfaceRawFormat(MOS_FORMAT format)215     VdencSurfaceFormat MosFormatToVdencSurfaceRawFormat(MOS_FORMAT format)
216     {
217         MHW_FUNCTION_ENTER;
218 
219         switch (format)
220         {
221         case Format_A8R8G8B8:
222         case Format_X8R8G8B8:
223         case Format_A8B8G8R8:
224             return vdencSurfaceFormatRgba4444;
225         case Format_NV12:
226         case Format_NV11:
227         case Format_P208:
228         case Format_IMC1:
229         case Format_IMC2:
230         case Format_IMC3:
231         case Format_IMC4:
232             return vdencSurfaceFormatPlanar420_8;
233         case Format_400P:
234         case Format_P8:
235             return vdencSurfaceFormatY8Unorm;
236         case Format_UYVY:
237             return vdencSurfaceFormatYcrcbSwapy422;
238         case Format_YVYU:
239             return vdencSurfaceFormatYcrcbSwapuv422;
240         case Format_VYUY:
241             return vdencSurfaceFormatYcrcbSwapuvy422;
242         case Format_444P:
243         case Format_AYUV:
244             return vdencSurfaceFormatYuv444;
245         case Format_YUY2:
246         case Format_YUYV:
247             return vdencSurfaceFormatYuv422;
248         case Format_P010:
249             return vdencSurfaceFormatP010;
250         case Format_R10G10B10A2:
251         case Format_B10G10R10A2:
252             return vdencSurfaceFormatRgba_10_10_10_2;
253             // Only Y210 supported now, allocated as Y216 format by 3D driver
254         case Format_Y210:
255         case Format_Y216:
256             return vdencSurfaceFormatY216;
257         case Format_Y410:
258             return vdencSurfaceFormatY410;
259         case Format_NV21:
260             return vdencSurfaceFormatNv21;
261         default:
262             return vdencSurfaceFormatPlanar420_8;
263         }
264 
265         return vdencSurfaceFormatYuv422;
266     }
267 
268     //!
269     //! \brief    Translate MOS type format to vdenc surface recon format
270     //! \details  VDBOX protected function to translate mos format to media state recon format
271     //! \param    MOS_FORMAT  Format
272     //!           [in] MOS type format
273     //! \return   VdencSurfaceFormat
274     //!           media state surface format
275     //!
MosFormatToVdencSurfaceReconFormat(MOS_FORMAT format)276     VdencSurfaceFormat MosFormatToVdencSurfaceReconFormat(MOS_FORMAT format)
277     {
278         MHW_FUNCTION_ENTER;
279 
280         switch (format)
281         {
282         case Format_A8R8G8B8:
283         case Format_X8R8G8B8:
284         case Format_A8B8G8R8:
285             return vdencSurfaceFormatRgba4444;
286         case Format_NV12:
287         case Format_IMC1:
288         case Format_IMC2:
289         case Format_IMC3:
290         case Format_IMC4:
291             return vdencSurfaceFormatPlanar420_8;
292         case Format_400P:
293         case Format_P8:
294             return vdencSurfaceFormatY8Unorm;
295         case Format_UYVY:
296             return vdencSurfaceFormatYcrcbSwapy422;
297         case Format_YVYU:
298             return vdencSurfaceFormatYcrcbSwapuv422;
299         case Format_VYUY:
300             return vdencSurfaceFormatYcrcbSwapuvy422;
301         case Format_444P:
302         case Format_AYUV:
303             return vdencSurfaceFormatAyuvVariant;
304         case Format_YUY2:
305         case Format_YUYV:
306             return vdencSurfaceFormatYuyvVariant;
307         case Format_P010:
308             return vdencSurfaceFormatP010Variant;
309         case Format_R10G10B10A2:
310             return vdencSurfaceFormatRgba_10_10_10_2;
311         case Format_Y216:
312             return vdencSurfaceFormatY216Variant;
313         case Format_Y410:
314             return vdencSurfaceFormatY416Variant;
315         case Format_NV21:
316             return vdencSurfaceFormatNv21;
317         default:
318             return vdencSurfaceFormatPlanar420_8;
319         }
320     }
321 
322     //!
323     //! \brief    Adds VD Pipeline Flush command in command buffer
324     //! \details  Client facing function to add VD Pipeline Flush command in command buffer
325     //! \param    [in] cmdBuffer
326     //!           Command buffer to which HW command is added
327     //! \param    [in] params
328     //!           Params structure used to populate the HW command
329     //! \return   MOS_STATUS
330     //!           MOS_STATUS_SUCCESS if success, else fail type
331     //!
AddVdPipelineFlushCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_VD_PIPE_FLUSH_PARAMS params)332     MOS_STATUS AddVdPipelineFlushCmd(
333         PMOS_COMMAND_BUFFER             cmdBuffer,
334         PMHW_VDBOX_VD_PIPE_FLUSH_PARAMS params) override
335     {
336         MHW_FUNCTION_ENTER;
337 
338         MHW_MI_CHK_NULL(this->m_osInterface);
339         MHW_MI_CHK_NULL(cmdBuffer);
340         MHW_MI_CHK_NULL(params);
341 
342         MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
343 
344         typename TVdencCmds::VD_PIPELINE_FLUSH_CMD cmd;
345         PMHW_VDBOX_VD_PIPE_FLUSH_PARAMS_G12 paramsG12 = (PMHW_VDBOX_VD_PIPE_FLUSH_PARAMS_G12)params;
346 
347         cmd.DW1.HevcPipelineDone           = params->Flags.bWaitDoneHEVC;
348         cmd.DW1.VdencPipelineDone          = params->Flags.bWaitDoneVDENC;
349         cmd.DW1.MflPipelineDone            = params->Flags.bWaitDoneMFL;
350         cmd.DW1.MfxPipelineDone            = params->Flags.bWaitDoneMFX;
351         cmd.DW1.VdCommandMessageParserDone = params->Flags.bWaitDoneVDCmdMsgParser;
352         cmd.DW1.HevcPipelineCommandFlush   = params->Flags.bFlushHEVC;
353         cmd.DW1.VdencPipelineCommandFlush  = params->Flags.bFlushVDENC;
354         cmd.DW1.MflPipelineCommandFlush    = params->Flags.bFlushMFL;
355         cmd.DW1.MfxPipelineCommandFlush    = params->Flags.bFlushMFX;
356         cmd.DW1.AvpPipelineDone            = paramsG12->Flags.bWaitDoneAV1;
357         cmd.DW1.AvpPipelineCommandFlush    = paramsG12->Flags.bFlushAV1;
358 
359         MHW_MI_CHK_STATUS(this->m_osInterface->pfnAddCommand(cmdBuffer, &cmd, sizeof(cmd)));
360 
361         return MOS_STATUS_SUCCESS;
362     }
363 
364 public:
365     //!
366     //! \brief  Constructor
367     //!
MhwVdboxVdencInterfaceG12(PMOS_INTERFACE osInterface)368     MhwVdboxVdencInterfaceG12(PMOS_INTERFACE osInterface) : MhwVdboxVdencInterfaceGeneric<TVdencCmds>(osInterface)
369     {
370         MHW_FUNCTION_ENTER;
371 
372         this->m_rhoDomainStatsEnabled = true;
373         InitRowstoreUserFeatureSettings();
374     }
375 
GetVdencCmd1Size()376     inline virtual uint32_t GetVdencCmd1Size() override
377     {
378         return 0;
379     }
380 
GetVdencCmd2Size()381     inline virtual uint32_t GetVdencCmd2Size() override
382     {
383         return 0;
384     }
385 
386     //!
387     //! \brief    Destructor
388     //!
~MhwVdboxVdencInterfaceG12()389     virtual ~MhwVdboxVdencInterfaceG12() { }
390 
GetRowstoreCachingAddrs(PMHW_VDBOX_ROWSTORE_PARAMS rowstoreParams)391     MOS_STATUS GetRowstoreCachingAddrs(
392         PMHW_VDBOX_ROWSTORE_PARAMS rowstoreParams) override
393     {
394         MHW_FUNCTION_ENTER;
395 
396         MHW_MI_CHK_NULL(rowstoreParams);
397 
398         bool is8bit = rowstoreParams->ucBitDepthMinus8 == 0;
399         bool is10bit = rowstoreParams->ucBitDepthMinus8 == 1 || rowstoreParams->ucBitDepthMinus8 == 2;
400         bool is12bit = rowstoreParams->ucBitDepthMinus8 > 2;
401         bool isLcu32or64 = rowstoreParams->ucLCUSize == 32 || rowstoreParams->ucLCUSize == 64;
402         bool isGt2k = rowstoreParams->dwPicWidth > 2048;
403         bool isGt4k = rowstoreParams->dwPicWidth > 4096;
404         bool isGt8k = rowstoreParams->dwPicWidth > 8192;
405         uint32_t index = 0;
406 
407         bool avc = rowstoreParams->Mode == CODECHAL_ENCODE_MODE_AVC;
408         bool vp8 = rowstoreParams->Mode == CODECHAL_ENCODE_MODE_VP8;
409         bool widthLE4K = rowstoreParams->dwPicWidth <= MHW_VDBOX_PICWIDTH_4K;
410         bool mbaffOrField = rowstoreParams->bMbaff || !rowstoreParams->bIsFrame;
411         this->m_vdencRowStoreCache.bEnabled = false;
412         this->m_vdencRowStoreCache.dwAddress = 0;
413 
414         //VDENC row store cache setting for AVC and VP8
415         this->m_vdencRowStoreCache.bEnabled = this->m_vdencRowStoreCache.bSupported && widthLE4K && (avc || vp8);
416         this->m_vdencRowStoreCache.dwAddress = avc ? (mbaffOrField ? GEN12_AVC_VDENC_ROWSTORE_BASEADDRESS_MBAFF :
417             GEN12_AVC_VDENC_ROWSTORE_BASEADDRESS) : GEN12_VP8_VDENC_ROWSTORE_BASEADDRESS;
418         this->m_vdencRowStoreCache.dwAddress = this->m_vdencRowStoreCache.bEnabled ? this->m_vdencRowStoreCache.dwAddress : 0;
419 
420         if (this->m_vdencRowStoreCache.bSupported && rowstoreParams->Mode == CODECHAL_ENCODE_MODE_HEVC)
421         {
422             if (rowstoreParams->ucChromaFormat != HCP_CHROMA_FORMAT_YUV444)
423             {
424                 index = 2 * isGt4k + isLcu32or64;
425             }
426             else
427             {
428                 uint32_t subidx = is12bit ? 2 : (is10bit ? 1 : 0);
429                 index = 4 + 6 * isLcu32or64 + 2 * subidx + isGt4k;
430             }
431 
432             if (!isGt8k)
433             {
434                 this->m_vdencRowStoreCache.bEnabled  = RowStoreCacheEnableHEVC[index][3];
435                 this->m_vdencRowStoreCache.dwAddress = RowStoreCacheAddrHEVC[index][3];
436             }
437         }
438 
439         //VP9 VDENC
440         if (this->m_vdencRowStoreCache.bSupported && rowstoreParams->Mode == CODECHAL_ENCODE_MODE_VP9)
441         {
442             if ((rowstoreParams->ucChromaFormat >= HCP_CHROMA_FORMAT_YUV420) &&
443                 (rowstoreParams->ucChromaFormat <= HCP_CHROMA_FORMAT_YUV444))
444             {
445                 index = 4 * (rowstoreParams->ucChromaFormat - HCP_CHROMA_FORMAT_YUV420) + 2 * (!is8bit) + isGt4k;
446             }
447             else
448             {
449                 return MOS_STATUS_SUCCESS;
450             }
451 
452             if (rowstoreParams->ucChromaFormat == HCP_CHROMA_FORMAT_YUV444 && !is8bit)
453             {
454                 index += isGt2k;
455             }
456 
457             if (!isGt8k)
458             {
459                 this->m_vdencRowStoreCache.bEnabled = RowStoreCacheEnableVP9[index][3];
460                 this->m_vdencRowStoreCache.dwAddress = RowStoreCacheAddrVP9[index][3];
461             }
462         }
463 
464         if (this->m_vdencRowStoreCache.bSupported && rowstoreParams->Mode == CODECHAL_ENCODE_MODE_AV1)
465         {
466             this->m_vdencRowStoreCache.bEnabled  = true;
467             this->m_vdencRowStoreCache.dwAddress = RESERVED_VDENC_ROWSTORE_BASEADDRESS;
468 
469             //IPDL
470             this->m_vdencIpdlRowstoreCache.dwAddress = RESERVED_VDENC_IPDL_ROWSTORE_BASEADDRESS;
471 
472         }
473         else if (this->m_vdencRowStoreCache.bSupported && rowstoreParams->Mode == CODECHAL_ENCODE_MODE_AVC)
474         {
475             this->m_vdencRowStoreCache.bEnabled = true;
476 
477             //IPDL
478             this->m_vdencIpdlRowstoreCache.dwAddress = AVC_VDENC_IPDL_ROWSTORE_BASEADDRESS;
479 
480         }
481 
482         return MOS_STATUS_SUCCESS;
483     }
484 
GetAvcMaxSize(uint32_t waAddDelayInVDEncDynamicSlice)485     uint32_t GetAvcMaxSize(uint32_t waAddDelayInVDEncDynamicSlice)
486     {
487         uint32_t maxSize =
488             TVdencCmds::VDENC_PIPE_MODE_SELECT_CMD::byteSize +
489             TVdencCmds::VDENC_SRC_SURFACE_STATE_CMD::byteSize +
490             TVdencCmds::VDENC_REF_SURFACE_STATE_CMD::byteSize +
491             TVdencCmds::VDENC_DS_REF_SURFACE_STATE_CMD::byteSize +
492             TVdencCmds::VDENC_PIPE_BUF_ADDR_STATE_CMD::byteSize +
493             TVdencCmds::VDENC_CONST_QPT_STATE_CMD::byteSize +
494             TVdencCmds::VDENC_IMG_STATE_CMD::byteSize +
495             TVdencCmds::VDENC_WALKER_STATE_CMD::byteSize +
496             TVdencCmds::VD_PIPELINE_FLUSH_CMD::byteSize;
497 
498         if (waAddDelayInVDEncDynamicSlice)
499         {
500             maxSize += TVdencCmds::VD_PIPELINE_FLUSH_CMD::byteSize * MHW_VDBOX_VDENC_DYNAMIC_SLICE_WA_COUNT;
501         }
502 
503         return maxSize;
504     }
505 
GetReserved0MaxSize()506     uint32_t GetReserved0MaxSize()
507     {
508        uint32_t maxSize =
509             TVdencCmds::VDENC_CONTROL_STATE_CMD::byteSize +
510             TVdencCmds::VDENC_PIPE_MODE_SELECT_CMD::byteSize +
511             TVdencCmds::VDENC_SRC_SURFACE_STATE_CMD::byteSize +
512             TVdencCmds::VDENC_REF_SURFACE_STATE_CMD::byteSize +
513             TVdencCmds::VDENC_DS_REF_SURFACE_STATE_CMD::byteSize +
514             TVdencCmds::VDENC_PIPE_BUF_ADDR_STATE_CMD::byteSize +
515             TVdencCmds::VDENC_WALKER_STATE_CMD::byteSize +
516             TVdencCmds::VD_PIPELINE_FLUSH_CMD::byteSize;;
517 
518         return maxSize;
519     }
520 
GetVdencStateCommandsDataSize(uint32_t mode,uint32_t waAddDelayInVDEncDynamicSlice,uint32_t * commandsSize,uint32_t * patchListSize)521     MOS_STATUS GetVdencStateCommandsDataSize(
522         uint32_t mode,
523         uint32_t waAddDelayInVDEncDynamicSlice,
524         uint32_t *commandsSize,
525         uint32_t *patchListSize) override
526     {
527         MHW_FUNCTION_ENTER;
528 
529         uint32_t            maxSize = 0;
530         uint32_t            patchListMaxSize = 0;
531         uint32_t            standard = CodecHal_GetStandardFromMode(mode);
532 
533         if (standard == CODECHAL_AVC)
534         {
535             maxSize = GetAvcMaxSize(waAddDelayInVDEncDynamicSlice);
536             patchListMaxSize = VDENC_PIPE_BUF_ADDR_STATE_CMD_NUMBER_OF_ADDRESSES;
537         }
538         else if (standard == CODECHAL_HEVC)
539         {
540             maxSize =
541                 TVdencCmds::VDENC_PIPE_MODE_SELECT_CMD::byteSize +
542                 TVdencCmds::VDENC_SRC_SURFACE_STATE_CMD::byteSize +
543                 TVdencCmds::VDENC_REF_SURFACE_STATE_CMD::byteSize +
544                 TVdencCmds::VDENC_DS_REF_SURFACE_STATE_CMD::byteSize +
545                 TVdencCmds::VDENC_PIPE_BUF_ADDR_STATE_CMD::byteSize +
546                 TVdencCmds::VDENC_WEIGHTSOFFSETS_STATE_CMD::byteSize +
547                 TVdencCmds::VDENC_WALKER_STATE_CMD::byteSize +
548                 TVdencCmds::VD_PIPELINE_FLUSH_CMD::byteSize;
549 
550             if (waAddDelayInVDEncDynamicSlice)
551             {
552                 maxSize += TVdencCmds::VD_PIPELINE_FLUSH_CMD::byteSize * MHW_VDBOX_VDENC_DYNAMIC_SLICE_WA_COUNT;
553             }
554 
555             patchListMaxSize = VDENC_PIPE_BUF_ADDR_STATE_CMD_NUMBER_OF_ADDRESSES;
556         }
557         else if (standard == CODECHAL_VP9)
558         {
559             maxSize =
560                 TVdencCmds::VDENC_PIPE_MODE_SELECT_CMD::byteSize +
561                 TVdencCmds::VDENC_SRC_SURFACE_STATE_CMD::byteSize +
562                 TVdencCmds::VDENC_REF_SURFACE_STATE_CMD::byteSize +
563                 TVdencCmds::VDENC_DS_REF_SURFACE_STATE_CMD::byteSize +
564                 TVdencCmds::VDENC_PIPE_BUF_ADDR_STATE_CMD::byteSize +
565                 TVdencCmds::VDENC_WALKER_STATE_CMD::byteSize +
566                 TVdencCmds::VD_PIPELINE_FLUSH_CMD::byteSize;
567 
568             if (waAddDelayInVDEncDynamicSlice)
569             {
570                 maxSize += TVdencCmds::VD_PIPELINE_FLUSH_CMD::byteSize * MHW_VDBOX_VDENC_DYNAMIC_SLICE_WA_COUNT;
571             }
572 
573             patchListMaxSize =
574                 MI_FLUSH_DW_CMD_NUMBER_OF_ADDRESSES +
575                 MI_BATCH_BUFFER_START_CMD_NUMBER_OF_ADDRESSES +
576                 VDENC_PIPE_BUF_ADDR_STATE_CMD_NUMBER_OF_ADDRESSES;
577         }
578         else if (standard == CODECHAL_AV1)
579         {
580             maxSize = GetReserved0MaxSize();
581 
582             patchListMaxSize =
583                 MI_FLUSH_DW_CMD_NUMBER_OF_ADDRESSES +
584                 MI_BATCH_BUFFER_START_CMD_NUMBER_OF_ADDRESSES +
585                 VDENC_PIPE_BUF_ADDR_STATE_CMD_NUMBER_OF_ADDRESSES;
586         }
587         else
588         {
589             MHW_ASSERTMESSAGE("Unsupported encode mode.");
590             *commandsSize = 0;
591             *patchListSize = 0;
592             return MOS_STATUS_UNKNOWN;
593         }
594 
595         *commandsSize = maxSize;
596         *patchListSize = patchListMaxSize;
597 
598         return MOS_STATUS_SUCCESS;
599     }
600 
GetAvcSliceMaxSize()601     uint32_t GetAvcSliceMaxSize()
602     {
603         uint32_t maxSize =
604             TVdencCmds::VDENC_WEIGHTSOFFSETS_STATE_CMD::byteSize +
605             TVdencCmds::VDENC_WALKER_STATE_CMD::byteSize +
606             TVdencCmds::VD_PIPELINE_FLUSH_CMD::byteSize;
607 
608         return maxSize;
609     }
610 
GetReserved0TileMaxSize()611     uint32_t GetReserved0TileMaxSize()
612     {
613         uint32_t maxSize = GetVdencCmd1Size() +
614             GetVdencCmd2Size() +
615             TVdencCmds::VDENC_WALKER_STATE_CMD::byteSize;
616 
617         return maxSize;
618     }
619 
GetVdencPrimitiveCommandsDataSize(uint32_t mode,uint32_t * commandsSize,uint32_t * patchListSize)620     MOS_STATUS GetVdencPrimitiveCommandsDataSize(
621         uint32_t                        mode,
622         uint32_t                        *commandsSize,
623         uint32_t                        *patchListSize) override
624     {
625         MHW_FUNCTION_ENTER;
626 
627         uint32_t            maxSize = 0;
628         uint32_t            patchListMaxSize = 0;
629         uint32_t            standard = CodecHal_GetStandardFromMode(mode);
630 
631         if (standard == CODECHAL_AVC)
632         {
633             maxSize = GetAvcSliceMaxSize();
634             patchListMaxSize = VDENC_PIPE_BUF_ADDR_STATE_CMD_NUMBER_OF_ADDRESSES;
635         }
636         else if (standard == CODECHAL_AV1)
637         {
638             maxSize = GetReserved0TileMaxSize();
639         }
640         else
641         {
642             MHW_ASSERTMESSAGE("Unsupported encode mode.");
643             *commandsSize = 0;
644             *patchListSize = 0;
645             return MOS_STATUS_UNKNOWN;
646         }
647 
648         *commandsSize = maxSize;
649         *patchListSize = patchListMaxSize;
650 
651         return MOS_STATUS_SUCCESS;
652     }
653 
AddVdencPipeModeSelectCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_PIPE_MODE_SELECT_PARAMS params)654     MOS_STATUS AddVdencPipeModeSelectCmd(
655         PMOS_COMMAND_BUFFER                cmdBuffer,
656         PMHW_VDBOX_PIPE_MODE_SELECT_PARAMS params) override
657     {
658         MHW_FUNCTION_ENTER;
659 
660         MHW_MI_CHK_NULL(this->m_osInterface);
661         MHW_MI_CHK_NULL(cmdBuffer);
662         MHW_MI_CHK_NULL(params);
663         auto paramsG12 = dynamic_cast<PMHW_VDBOX_PIPE_MODE_SELECT_PARAMS_G12>(params);
664         MHW_MI_CHK_NULL(paramsG12);
665         typename TVdencCmds::VDENC_PIPE_MODE_SELECT_CMD cmd;
666 
667         cmd.DW1.StandardSelect                 = CodecHal_GetStandardFromMode(params->Mode);
668         cmd.DW1.ScalabilityMode                = !(paramsG12->MultiEngineMode == MHW_VDBOX_HCP_MULTI_ENGINE_MODE_FE_LEGACY);
669         if (CODECHAL_ENCODE_MODE_HEVC == params->Mode || CODECHAL_ENCODE_MODE_AV1 == params->Mode)
670         {
671             cmd.DW1.FrameStatisticsStreamOutEnable = paramsG12->bBRCEnabled || paramsG12->bLookaheadPass;
672         }
673         // AVC VENC to be optimized later
674         else
675         {
676             cmd.DW1.FrameStatisticsStreamOutEnable = 1;
677         }
678         cmd.DW1.VdencPakObjCmdStreamOutEnable  = params->bVdencPakObjCmdStreamOutEnable;
679         cmd.DW1.TlbPrefetchEnable              = 1;
680         cmd.DW1.PakThresholdCheckEnable        = params->bDynamicSliceEnable;
681         cmd.DW1.VdencStreamInEnable            = params->bVdencStreamInEnable;
682         cmd.DW1.BitDepth                       = params->ucVdencBitDepthMinus8;
683 
684         if (CODECHAL_ENCODE_MODE_HEVC == params->Mode || CODECHAL_ENCODE_MODE_VP9 == params->Mode || CODECHAL_ENCODE_MODE_AV1 == params->Mode)
685         {
686             cmd.DW1.PakChromaSubSamplingType = params->ChromaType;
687         }
688         // by default RGB to YUV using full to studio range
689         // can add a DDI flag to control if needed
690         cmd.DW1.OutputRangeControlAfterColorSpaceConversion = 1;
691 
692         // for tile encoding
693         cmd.DW1.TileReplayEnable = paramsG12->bTileBasedReplayMode;
694 
695         cmd.DW1.IsRandomAccess = paramsG12->bIsRandomAccess;
696 
697         //Restriction: When this pre-fetch is enabled,TLB Prefetch Enable in VDENC_PIPE_MODE select (DW 1 bit 7) should be disabled.
698         cmd.DW2.HmeRegionPreFetchenable = 0;
699 
700         // TLB prefetch performance improvement
701         if (params->Mode == CODECHAL_ENCODE_MODE_AVC)
702         {
703             cmd.DW3.PreFetchoffsetforsource = 7;
704             cmd.DW3.Numverticalreqminus1Src = 0;
705         }
706         else if (params->Mode == CODECHAL_ENCODE_MODE_HEVC || CODECHAL_ENCODE_MODE_AV1 == params->Mode)
707         {
708             cmd.DW3.PreFetchoffsetforsource = 4;
709             cmd.DW3.Numverticalreqminus1Src = 1;
710         }
711 
712         //Restriction : This field can be set only to planar source formats.
713         if (params->Format != Format_NV12 && params->Format != Format_P010)
714         {
715             cmd.DW3.SourceChromaTlbPreFetchenable = 0;
716         }
717 
718         // For RGB encoding
719         if (paramsG12->bRGBEncodingMode)
720         {
721             cmd.DW1.RgbEncodingEnable    = 1;
722             // To add the primary channel selection later here
723         }
724 
725         // For parallel encode from display
726         if (paramsG12->bWirelessEncodeEnabled)
727         {
728             cmd.DW5.CaptureMode                        = TVdencCmds::VDENC_PIPE_MODE_SELECT_CMD::CAPTURE_MODE_UNNAMED1;
729             cmd.DW5.ParallelCaptureAndEncodeSessionId  = paramsG12->ucWirelessSessionId;
730             cmd.DW5.TailPointerReadFrequency           = 0x50;
731         }
732 
733         MHW_MI_CHK_STATUS(this->m_osInterface->pfnAddCommand(cmdBuffer, &cmd, sizeof(cmd)));
734 
735         return MOS_STATUS_SUCCESS;
736     }
737 
AddVdencPipeBufAddrCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_PIPE_BUF_ADDR_PARAMS params)738     MOS_STATUS AddVdencPipeBufAddrCmd(
739         PMOS_COMMAND_BUFFER             cmdBuffer,
740         PMHW_VDBOX_PIPE_BUF_ADDR_PARAMS params) override
741     {
742         MOS_SURFACE details;
743         uint8_t     refIdx;
744 
745         MHW_FUNCTION_ENTER;
746 
747         MHW_MI_CHK_NULL(this->m_osInterface);
748         MHW_MI_CHK_NULL(cmdBuffer);
749         MHW_MI_CHK_NULL(params);
750 
751         typename TVdencCmds::VDENC_PIPE_BUF_ADDR_STATE_CMD cmd;
752 
753         MOS_MEMCOMP_STATE   mmcMode = MOS_MEMCOMP_DISABLED;
754         MHW_RESOURCE_PARAMS resourceParams;
755         MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
756         resourceParams.dwLsbNum = MHW_VDBOX_MFX_GENERAL_STATE_SHIFT;
757         resourceParams.HwCommandType = MOS_VDENC_PIPE_BUF_ADDR;
758 
759         if (params->psRawSurface != nullptr)
760         {
761             cmd.OriginalUncompressedPicture.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(params->RawSurfMmcState) ? 1 : 0;
762             cmd.OriginalUncompressedPicture.PictureFields.DW0.CompressionType = MmcIsRc(params->RawSurfMmcState) ? 1 : 0;
763             cmd.OriginalUncompressedPicture.PictureFields.DW0.MemoryObjectControlState =
764                 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_ORIGINAL_UNCOMPRESSED_PICTURE_ENCODE].Value;
765 
766             cmd.OriginalUncompressedPicture.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(params->psRawSurface->TileType);
767 
768             resourceParams.presResource    = &params->psRawSurface->OsResource;
769             resourceParams.dwOffset        = params->psRawSurface->dwOffset;
770             resourceParams.pdwCmd          = (uint32_t*)&(cmd.OriginalUncompressedPicture.LowerAddress);
771             resourceParams.dwLocationInCmd = 10;
772             resourceParams.bIsWritable     = false;
773 
774             MHW_MI_CHK_STATUS(this->AddResourceToCmd(
775                 this->m_osInterface,
776                 cmdBuffer,
777                 &resourceParams));
778         }
779 
780         if (this->m_vdencRowStoreCache.bEnabled)
781         {
782             cmd.RowStoreScratchBuffer.BufferPictureFields.DW0.CacheSelect = TVdencCmds::VDENC_Surface_Control_Bits_CMD::CACHE_SELECT_UNNAMED1;
783             cmd.RowStoreScratchBuffer.LowerAddress.DW0.Value              = this->m_vdencRowStoreCache.dwAddress << 6;
784         }
785         else if (!Mos_ResourceIsNull(params->presVdencIntraRowStoreScratchBuffer))
786         {
787             cmd.RowStoreScratchBuffer.BufferPictureFields.DW0.MemoryObjectControlState =
788                 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_VDENC_ROW_STORE_BUFFER_CODEC].Value;
789 
790             resourceParams.presResource    = params->presVdencIntraRowStoreScratchBuffer;
791             resourceParams.dwOffset        = 0;
792             resourceParams.pdwCmd          = (uint32_t*)&(cmd.RowStoreScratchBuffer.LowerAddress);
793             resourceParams.dwLocationInCmd = 16;
794             resourceParams.bIsWritable     = true;
795 
796             MHW_MI_CHK_STATUS(this->AddResourceToCmd(
797                 this->m_osInterface,
798                 cmdBuffer,
799                 &resourceParams));
800         }
801         if (params->psFwdRefSurface0)
802         {
803             resourceParams.presResource = &params->psFwdRefSurface0->OsResource;
804             resourceParams.dwOffset = 0;
805             resourceParams.pdwCmd = (uint32_t*)&(cmd.FwdRef0.LowerAddress);
806             resourceParams.dwLocationInCmd = 22;
807             resourceParams.bIsWritable = true;
808 
809             MHW_MI_CHK_STATUS(this->AddResourceToCmd(
810                 this->m_osInterface,
811                 cmdBuffer,
812                 &resourceParams));
813         }
814 
815         if (params->psFwdRefSurface1)
816         {
817             resourceParams.presResource = &params->psFwdRefSurface1->OsResource;
818             resourceParams.dwOffset = 0;
819             resourceParams.pdwCmd = (uint32_t*)&(cmd.FwdRef1.LowerAddress);
820             resourceParams.dwLocationInCmd = 25;
821             resourceParams.bIsWritable = true;
822 
823             MHW_MI_CHK_STATUS(this->AddResourceToCmd(
824                 this->m_osInterface,
825                 cmdBuffer,
826                 &resourceParams));
827         }
828 
829         if (params->psFwdRefSurface2)
830         {
831             resourceParams.presResource = &params->psFwdRefSurface2->OsResource;
832             resourceParams.dwOffset = 0;
833             resourceParams.pdwCmd = (uint32_t*)&(cmd.FwdRef2.LowerAddress);
834             resourceParams.dwLocationInCmd = 28;
835             resourceParams.bIsWritable = true;
836 
837             MHW_MI_CHK_STATUS(this->AddResourceToCmd(
838                 this->m_osInterface,
839                 cmdBuffer,
840                 &resourceParams));
841         }
842         if (params->presVdencStreamOutBuffer != nullptr)
843         {
844             cmd.VdencStatisticsStreamout.PictureFields.DW0.MemoryObjectControlState =
845                 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_STREAMOUT_DATA_CODEC].Value;
846 
847             resourceParams.presResource    = params->presVdencStreamOutBuffer;
848             resourceParams.dwOffset        = params->dwVdencStatsStreamOutOffset;
849             resourceParams.pdwCmd          = (uint32_t*)&(cmd.VdencStatisticsStreamout.LowerAddress);
850             resourceParams.dwLocationInCmd = 34;
851             resourceParams.bIsWritable     = true;
852 
853             MHW_MI_CHK_STATUS(this->AddResourceToCmd(
854                 this->m_osInterface,
855                 cmdBuffer,
856                 &resourceParams));
857         }
858 
859         if (params->presVdencStreamInBuffer != nullptr)
860         {
861             cmd.StreaminDataPicture.PictureFields.DW0.MemoryObjectControlState =
862                 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_VDENC_STREAMIN_CODEC].Value;
863 
864             resourceParams.presResource    = params->presVdencStreamInBuffer;
865             resourceParams.dwOffset        = 0;
866             resourceParams.pdwCmd          = (uint32_t*)&(cmd.StreaminDataPicture.LowerAddress);
867             resourceParams.dwLocationInCmd = 13;
868             resourceParams.bIsWritable     = false;
869 
870             MHW_MI_CHK_STATUS(this->AddResourceToCmd(
871                 this->m_osInterface,
872                 cmdBuffer,
873                 &resourceParams));
874         }
875 
876         for (refIdx = 0; refIdx <= params->dwNumRefIdxL0ActiveMinus1; refIdx++)
877         {
878             if (params->presVdencReferences[refIdx])
879             {
880                 // L0 references
881                 MOS_ZeroMemory(&details, sizeof(details));
882                 details.Format = Format_Invalid;
883                 MHW_MI_CHK_STATUS(this->m_osInterface->pfnGetResourceInfo(this->m_osInterface, params->presVdencReferences[refIdx], &details));
884 
885                 resourceParams.presResource    = params->presVdencReferences[refIdx];
886                 resourceParams.dwOffset        = details.RenderOffset.YUV.Y.BaseOffset;
887                 resourceParams.dwLocationInCmd = (refIdx * 3) + 22;
888                 resourceParams.bIsWritable     = false;
889                 switch (refIdx)
890                 {
891                 case 0:
892                     resourceParams.pdwCmd = (uint32_t*)&(cmd.FwdRef0.LowerAddress);
893                     break;
894                 case 1:
895                     resourceParams.pdwCmd = (uint32_t*)&(cmd.FwdRef1.LowerAddress);
896                     break;
897                 case 2:
898                     resourceParams.pdwCmd = (uint32_t*)&(cmd.FwdRef2.LowerAddress);
899                     break;
900                 case 3:
901                     resourceParams.pdwCmd = (uint32_t*)&(cmd.BwdRef0.LowerAddress);
902                     break;
903                 default:
904                     break;
905                 }
906 
907                 if (params->Mode == CODECHAL_ENCODE_MODE_HEVC)
908                 {
909                     if (params->bMmcEnabled)
910                     {
911                         MHW_MI_CHK_STATUS(this->m_osInterface->pfnGetMemoryCompressionMode(
912                         this->m_osInterface, params->presVdencReferences[refIdx], &mmcMode));
913                     }
914                     else
915                     {
916                         mmcMode = MOS_MEMCOMP_DISABLED;
917                     }
918                 }
919                 else
920                 {
921                     mmcMode = (params->PostDeblockSurfMmcState != MOS_MEMCOMP_DISABLED) ?
922                         params->PostDeblockSurfMmcState : params->PreDeblockSurfMmcState;
923                 }
924 
925                 switch (refIdx)
926                 {
927                 case 0:
928                     cmd.FwdRef0.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0;
929                     cmd.FwdRef0.PictureFields.DW0.CompressionType         = MmcIsRc(mmcMode) ? 1 : 0;
930                     cmd.FwdRef0.PictureFields.DW0.MemoryObjectControlState =
931                         this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value;
932                     cmd.FwdRef0.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType);
933                     break;
934                 case 1:
935                     cmd.FwdRef1.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0;
936                     cmd.FwdRef1.PictureFields.DW0.CompressionType         = MmcIsRc(mmcMode) ? 1 : 0;
937                     cmd.FwdRef1.PictureFields.DW0.MemoryObjectControlState =
938                         this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value;
939                     cmd.FwdRef1.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType);
940                     break;
941                 case 2:
942                     cmd.FwdRef2.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0;
943                     cmd.FwdRef2.PictureFields.DW0.CompressionType         = MmcIsRc(mmcMode) ? 1 : 0;
944                     cmd.FwdRef2.PictureFields.DW0.MemoryObjectControlState =
945                         this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value;
946                     cmd.FwdRef2.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType);
947                     break;
948                 case 3:
949                     cmd.BwdRef0.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0;
950                     cmd.BwdRef0.PictureFields.DW0.CompressionType         = MmcIsRc(mmcMode) ? 1 : 0;
951                     cmd.BwdRef0.PictureFields.DW0.MemoryObjectControlState =
952                         this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value;
953                     cmd.BwdRef0.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType);
954                     break;
955                 default:
956                     break;
957                 }
958 
959                 MHW_MI_CHK_STATUS(this->AddResourceToCmd(
960                     this->m_osInterface,
961                     cmdBuffer,
962                     &resourceParams));
963             }
964 
965             // so far VDEnc only support 2 4x/8x DS Ref Pictures
966             if ((refIdx <= 1) && params->presVdenc4xDsSurface[refIdx])
967             {
968                 if (params->Mode == CODECHAL_ENCODE_MODE_AVC)
969                 {
970                     // 4x DS surface for VDEnc
971                     MOS_ZeroMemory(&details, sizeof(details));
972                     details.Format = Format_Invalid;
973                     MHW_MI_CHK_STATUS(this->m_osInterface->pfnGetResourceInfo(this->m_osInterface, params->presVdenc4xDsSurface[refIdx], &details));
974 
975                     resourceParams.presResource    = params->presVdenc4xDsSurface[refIdx];
976                     resourceParams.dwOffset        = details.RenderOffset.YUV.Y.BaseOffset;
977                     resourceParams.dwLocationInCmd = (refIdx * 3) + 1;
978                     resourceParams.bIsWritable     = false;
979                     switch (refIdx)
980                     {
981                     case 0:
982                         resourceParams.pdwCmd = (uint32_t*)&(cmd.DsFwdRef0.LowerAddress);
983                         break;
984                     case 1:
985                         resourceParams.pdwCmd = (uint32_t*)&(cmd.DsFwdRef1.LowerAddress);
986                         break;
987                     default:
988                         break;
989                     }
990 
991                     mmcMode = params->Ps4xDsSurfMmcState;
992                     switch (refIdx)
993                     {
994                     case 0:
995                         cmd.DsFwdRef0.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0;
996                         cmd.DsFwdRef0.PictureFields.DW0.CompressionType         = MmcIsRc(mmcMode) ? 1 : 0;
997                         cmd.DsFwdRef0.PictureFields.DW0.MemoryObjectControlState =
998                             this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value;
999                         cmd.DsFwdRef0.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType);
1000                         break;
1001                     case 1:
1002                         cmd.DsFwdRef1.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0;
1003                         cmd.DsFwdRef1.PictureFields.DW0.CompressionType         = MmcIsRc(mmcMode) ? 1 : 0;
1004                         cmd.DsFwdRef1.PictureFields.DW0.MemoryObjectControlState =
1005                             this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value;
1006                         cmd.DsFwdRef1.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType);
1007                         break;
1008                     default:
1009                         break;
1010                     }
1011 
1012                     MHW_MI_CHK_STATUS(this->AddResourceToCmd(
1013                         this->m_osInterface,
1014                         cmdBuffer,
1015                         &resourceParams));
1016                 }
1017                 else if (params->Mode == CODECHAL_ENCODE_MODE_HEVC || params->Mode == CODECHAL_ENCODE_MODE_VP9 || params->Mode == CODECHAL_ENCODE_MODE_AV1)
1018                 {
1019                     // 8x DS surface
1020                     MOS_ZeroMemory(&details, sizeof(details));
1021                     details.Format = Format_Invalid;
1022                     MHW_MI_CHK_STATUS(this->m_osInterface->pfnGetResourceInfo(this->m_osInterface, params->presVdenc8xDsSurface[refIdx], &details));
1023 
1024                     resourceParams.presResource    = params->presVdenc8xDsSurface[refIdx];
1025                     resourceParams.dwOffset        = details.RenderOffset.YUV.Y.BaseOffset;
1026                     resourceParams.dwLocationInCmd = (refIdx * 3) + 1;
1027                     resourceParams.bIsWritable     = false;
1028                     switch (refIdx)
1029                     {
1030                     case 0:
1031                         resourceParams.pdwCmd = (uint32_t*)&(cmd.DsFwdRef0.LowerAddress);
1032                         break;
1033                     case 1:
1034                         resourceParams.pdwCmd = (uint32_t*)&(cmd.DsFwdRef1.LowerAddress);
1035                         break;
1036                     default:
1037                         break;
1038                     }
1039 
1040                     mmcMode = params->Ps8xDsSurfMmcState;
1041                     switch (refIdx)
1042                     {
1043                     case 0:
1044                         cmd.DsFwdRef0.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0;
1045                         cmd.DsFwdRef0.PictureFields.DW0.CompressionType         = MmcIsRc(mmcMode) ? 1 : 0;
1046                         cmd.DsFwdRef0.PictureFields.DW0.MemoryObjectControlState =
1047                             this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value;
1048                         cmd.DsFwdRef0.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType);
1049                         break;
1050                     case 1:
1051                         cmd.DsFwdRef1.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0;
1052                         cmd.DsFwdRef1.PictureFields.DW0.CompressionType         = MmcIsRc(mmcMode) ? 1 : 0;
1053                         cmd.DsFwdRef1.PictureFields.DW0.MemoryObjectControlState =
1054                             this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value;
1055                         cmd.DsFwdRef1.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType);
1056                         break;
1057                     default:
1058                         break;
1059                     }
1060 
1061                     MHW_MI_CHK_STATUS(this->AddResourceToCmd(
1062                         this->m_osInterface,
1063                         cmdBuffer,
1064                         &resourceParams));
1065 
1066                     // 4x DS surface
1067                     MOS_ZeroMemory(&details, sizeof(details));
1068                     details.Format = Format_Invalid;
1069                     MHW_MI_CHK_STATUS(this->m_osInterface->pfnGetResourceInfo(this->m_osInterface, params->presVdenc4xDsSurface[refIdx], &details));
1070 
1071                     resourceParams.presResource    = params->presVdenc4xDsSurface[refIdx];
1072                     resourceParams.dwOffset        = details.RenderOffset.YUV.Y.BaseOffset;
1073                     resourceParams.dwLocationInCmd = (refIdx * 3) + 37;
1074                     resourceParams.bIsWritable     = false;
1075                     switch (refIdx)
1076                     {
1077                     case 0:
1078                         resourceParams.pdwCmd = (uint32_t*)&(cmd.DsFwdRef04X.LowerAddress);
1079                         break;
1080                     case 1:
1081                         resourceParams.pdwCmd = (uint32_t*)&(cmd.DsFwdRef14X.LowerAddress);
1082                         break;
1083                     default:
1084                         break;
1085                     }
1086 
1087                     mmcMode = params->Ps8xDsSurfMmcState;
1088                     switch (refIdx)
1089                     {
1090                     case 0:
1091                         cmd.DsFwdRef04X.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0;
1092                         cmd.DsFwdRef04X.PictureFields.DW0.CompressionType         = MmcIsRc(mmcMode) ? 1 : 0;
1093                         cmd.DsFwdRef04X.PictureFields.DW0.MemoryObjectControlState =
1094                             this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value;
1095                         cmd.DsFwdRef04X.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType);
1096                         break;
1097                     case 1:
1098                         cmd.DsFwdRef14X.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0;
1099                         cmd.DsFwdRef14X.PictureFields.DW0.CompressionType         = MmcIsRc(mmcMode) ? 1 : 0;
1100                         cmd.DsFwdRef14X.PictureFields.DW0.MemoryObjectControlState =
1101                             this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value;
1102                         cmd.DsFwdRef14X.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType);
1103                         break;
1104                     default:
1105                         break;
1106                     }
1107 
1108                     MHW_MI_CHK_STATUS(this->AddResourceToCmd(
1109                         this->m_osInterface,
1110                         cmdBuffer,
1111                         &resourceParams));
1112                 }
1113                 else
1114                 {
1115                     MHW_ASSERTMESSAGE("Encode mode = %d not supported", params->Mode);
1116                     return MOS_STATUS_INVALID_PARAMETER;
1117                 }
1118             }
1119         }
1120 
1121         if (!params->isLowDelayB && (params->Mode == CODECHAL_ENCODE_MODE_HEVC || params->Mode == CODECHAL_ENCODE_MODE_AV1))
1122         {
1123             if (params->presVdencReferences[refIdx])
1124             {
1125                 // L1 references
1126                 MOS_ZeroMemory(&details, sizeof(details));
1127                 details.Format = Format_Invalid;
1128                 MHW_MI_CHK_STATUS(this->m_osInterface->pfnGetResourceInfo(this->m_osInterface, params->presVdencReferences[refIdx], &details));
1129 
1130                 resourceParams.presResource = params->presVdencReferences[refIdx];
1131                 resourceParams.dwOffset = details.RenderOffset.YUV.Y.BaseOffset;
1132                 resourceParams.dwLocationInCmd = OFFSET_OF(typename TVdencCmds::VDENC_PIPE_BUF_ADDR_STATE_CMD, BwdRef0) / sizeof(uint32_t);
1133                 resourceParams.bIsWritable = false;
1134                 resourceParams.pdwCmd = (uint32_t*)&(cmd.BwdRef0.LowerAddress);
1135 
1136                 if (params->Mode == CODECHAL_ENCODE_MODE_HEVC)
1137                 {
1138                     if (params->bMmcEnabled)
1139                     {
1140                         MHW_MI_CHK_STATUS(this->m_osInterface->pfnGetMemoryCompressionMode(
1141                         this->m_osInterface, params->presVdencReferences[refIdx], &mmcMode));
1142                     }
1143                     else
1144                     {
1145                         mmcMode = MOS_MEMCOMP_DISABLED;
1146                     }
1147                 }
1148                 else
1149                 {
1150                     mmcMode = (params->PostDeblockSurfMmcState != MOS_MEMCOMP_DISABLED) ?
1151                         params->PostDeblockSurfMmcState : params->PreDeblockSurfMmcState;
1152                 }
1153 
1154                 cmd.BwdRef0.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0;
1155                 cmd.BwdRef0.PictureFields.DW0.CompressionType         = MmcIsRc(mmcMode) ? 1 : 0;
1156                 cmd.BwdRef0.PictureFields.DW0.MemoryObjectControlState =
1157                     this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value;
1158                 cmd.BwdRef0.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType);
1159                 MHW_MI_CHK_STATUS(this->AddResourceToCmd(
1160                     this->m_osInterface,
1161                     cmdBuffer,
1162                     &resourceParams));
1163             }
1164 
1165             if (params->presVdenc8xDsSurface[refIdx])
1166             {
1167                 // 8x DS surface
1168                 MOS_ZeroMemory(&details, sizeof(details));
1169                 details.Format = Format_Invalid;
1170                 MHW_MI_CHK_STATUS(this->m_osInterface->pfnGetResourceInfo(this->m_osInterface, params->presVdenc8xDsSurface[refIdx], &details));
1171 
1172                 resourceParams.presResource = params->presVdenc8xDsSurface[refIdx];
1173                 resourceParams.dwOffset = details.RenderOffset.YUV.Y.BaseOffset;
1174                 resourceParams.dwLocationInCmd = OFFSET_OF(typename TVdencCmds::VDENC_PIPE_BUF_ADDR_STATE_CMD, DsBwdRef0) / sizeof(uint32_t);
1175                 resourceParams.bIsWritable = false;
1176                 resourceParams.pdwCmd = (uint32_t*)&(cmd.DsBwdRef0.LowerAddress);
1177 
1178                 mmcMode = params->Ps8xDsSurfMmcState;
1179 
1180                 cmd.DsBwdRef0.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0;
1181                 cmd.DsBwdRef0.PictureFields.DW0.CompressionType         = MmcIsRc(mmcMode) ? 1 : 0;
1182                 cmd.DsBwdRef0.PictureFields.DW0.MemoryObjectControlState =
1183                     this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value;
1184                 cmd.DsBwdRef0.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType);
1185 
1186                 MHW_MI_CHK_STATUS(this->AddResourceToCmd(
1187                     this->m_osInterface,
1188                     cmdBuffer,
1189                     &resourceParams));
1190             }
1191 
1192             if (params->presVdenc4xDsSurface[refIdx])
1193             {
1194                 // 4x DS surface
1195                 MOS_ZeroMemory(&details, sizeof(details));
1196                 details.Format = Format_Invalid;
1197                 MHW_MI_CHK_STATUS(this->m_osInterface->pfnGetResourceInfo(this->m_osInterface, params->presVdenc4xDsSurface[refIdx], &details));
1198 
1199                 resourceParams.presResource = params->presVdenc4xDsSurface[refIdx];
1200                 resourceParams.dwOffset = details.RenderOffset.YUV.Y.BaseOffset;
1201                 resourceParams.dwLocationInCmd = OFFSET_OF(typename TVdencCmds::VDENC_PIPE_BUF_ADDR_STATE_CMD, DsBwdRef04X) / sizeof(uint32_t);
1202                 resourceParams.bIsWritable = false;
1203                 resourceParams.pdwCmd = (uint32_t*)&(cmd.DsBwdRef04X.LowerAddress);
1204 
1205                 mmcMode = params->Ps4xDsSurfMmcState;
1206                 cmd.DsBwdRef04X.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(mmcMode) ? 1 : 0;
1207                 cmd.DsBwdRef04X.PictureFields.DW0.CompressionType         = MmcIsRc(mmcMode) ? 1 : 0;
1208                 cmd.DsBwdRef04X.PictureFields.DW0.MemoryObjectControlState =
1209                     this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value;
1210                 cmd.DsBwdRef04X.PictureFields.DW0.TiledResourceMode = Mhw_ConvertToTRMode(details.TileType);
1211 
1212                 MHW_MI_CHK_STATUS(this->AddResourceToCmd(
1213                     this->m_osInterface,
1214                     cmdBuffer,
1215                     &resourceParams));
1216             }
1217         }
1218 
1219         // extra surface for HEVC/VP9
1220         if ((params->Mode == CODECHAL_ENCODE_MODE_HEVC) || (params->Mode == CODECHAL_ENCODE_MODE_VP9) || (params->Mode == CODECHAL_ENCODE_MODE_AV1))
1221         {
1222             if (params->presColMvTempBuffer[0] != nullptr)
1223             {
1224                 resourceParams.presResource    = params->presColMvTempBuffer[0];
1225                 resourceParams.dwOffset        = 0;
1226                 resourceParams.pdwCmd          = (uint32_t*)&(cmd.ColocatedMv.LowerAddress);
1227                 resourceParams.dwLocationInCmd = 19;
1228                 resourceParams.bIsWritable     = true;
1229 
1230                 cmd.ColocatedMv.PictureFields.DW0.MemoryCompressionEnable = 0;
1231                 cmd.ColocatedMv.PictureFields.DW0.CompressionType = 0;
1232                 cmd.ColocatedMv.PictureFields.DW0.MemoryObjectControlState =
1233                     this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value;
1234 
1235                 MHW_MI_CHK_STATUS(this->AddResourceToCmd(
1236                     this->m_osInterface,
1237                     cmdBuffer,
1238                     &resourceParams));
1239             }
1240 
1241             if (params->ps8xDsSurface != nullptr)
1242             {
1243                 resourceParams.presResource    = &params->ps8xDsSurface->OsResource;
1244                 resourceParams.dwOffset        = params->ps8xDsSurface->dwOffset;
1245                 resourceParams.pdwCmd          = (uint32_t*)&(cmd.ScaledReferenceSurface8X.LowerAddress);
1246                 resourceParams.dwLocationInCmd = 49;
1247                 resourceParams.bIsWritable     = true;
1248 
1249                 cmd.ScaledReferenceSurface8X.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(params->Ps8xDsSurfMmcState) ? 1 : 0;
1250                 cmd.ScaledReferenceSurface8X.PictureFields.DW0.CompressionType         = MmcIsRc(params->Ps8xDsSurfMmcState) ? 1 : 0;
1251                 cmd.ScaledReferenceSurface8X.PictureFields.DW0.MemoryObjectControlState =
1252                     this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value;
1253 
1254                 MHW_MI_CHK_STATUS(this->AddResourceToCmd(
1255                     this->m_osInterface,
1256                     cmdBuffer,
1257                     &resourceParams));
1258             }
1259 
1260             if (params->ps4xDsSurface != nullptr)
1261             {
1262                 resourceParams.presResource    = &params->ps4xDsSurface->OsResource;
1263                 resourceParams.dwOffset        = params->ps4xDsSurface->dwOffset;
1264                 resourceParams.pdwCmd          = (uint32_t*)&(cmd.ScaledReferenceSurface4X.LowerAddress);
1265                 resourceParams.dwLocationInCmd = 52;
1266                 resourceParams.bIsWritable     = true;
1267 
1268                 cmd.ScaledReferenceSurface4X.PictureFields.DW0.MemoryCompressionEnable = MmcEnable(params->Ps4xDsSurfMmcState) ? 1 : 0;
1269                 cmd.ScaledReferenceSurface4X.PictureFields.DW0.CompressionType = MmcIsRc(params->Ps4xDsSurfMmcState) ? 1 : 0;
1270                 cmd.ScaledReferenceSurface4X.PictureFields.DW0.MemoryObjectControlState =
1271                     this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value;
1272 
1273                 MHW_MI_CHK_STATUS(this->AddResourceToCmd(
1274                     this->m_osInterface,
1275                     cmdBuffer,
1276                     &resourceParams));
1277             }
1278 
1279             // CuRecord stream-out buffer, not used so far
1280             if (params->presVdencCuObjStreamOutBuffer)
1281             {
1282                 resourceParams.presResource    = params->presVdencCuObjStreamOutBuffer;
1283                 resourceParams.dwOffset        = 0;
1284                 resourceParams.pdwCmd          = (uint32_t*)&(cmd.VdencCuRecordStreamOutBuffer.LowerAddress);
1285                 resourceParams.dwLocationInCmd = 43;
1286                 resourceParams.bIsWritable     = true;
1287 
1288                 cmd.VdencCuRecordStreamOutBuffer.PictureFields.DW0.MemoryCompressionEnable = 0;
1289                 cmd.VdencCuRecordStreamOutBuffer.PictureFields.DW0.CompressionType = 0;
1290                 cmd.VdencCuRecordStreamOutBuffer.PictureFields.DW0.MemoryObjectControlState =
1291                     this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value;
1292 
1293                 MHW_MI_CHK_STATUS(this->AddResourceToCmd(
1294                     this->m_osInterface,
1295                     cmdBuffer,
1296                     &resourceParams));
1297             }
1298 
1299             if (params->presVdencPakObjCmdStreamOutBuffer)
1300             {
1301                 resourceParams.presResource    = params->presVdencPakObjCmdStreamOutBuffer;
1302                 resourceParams.dwOffset        = 0;
1303                 resourceParams.pdwCmd          = (uint32_t*)&(cmd.VdencLcuPakObjCmdBuffer.LowerAddress);
1304                 resourceParams.dwLocationInCmd = 46;
1305                 resourceParams.bIsWritable     = true;
1306 
1307                 cmd.VdencLcuPakObjCmdBuffer.PictureFields.DW0.MemoryCompressionEnable = 0;
1308                 cmd.VdencLcuPakObjCmdBuffer.PictureFields.DW0.CompressionType = 0;
1309                 cmd.VdencLcuPakObjCmdBuffer.PictureFields.DW0.MemoryObjectControlState =
1310                     this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value;
1311 
1312                 MHW_MI_CHK_STATUS(this->AddResourceToCmd(
1313                     this->m_osInterface,
1314                     cmdBuffer,
1315                     &resourceParams));
1316             }
1317 
1318             if (params->presSegmentMapStreamOut)
1319             {
1320                 resourceParams.presResource = params->presSegmentMapStreamOut;
1321                 resourceParams.dwOffset        = 0;
1322                 resourceParams.pdwCmd          = (uint32_t*)&(cmd.Vp9SegmentationMapStreaminBuffer.LowerAddress);
1323                 resourceParams.dwLocationInCmd = 55;
1324                 resourceParams.bIsWritable     = true;
1325 
1326                 MHW_MI_CHK_STATUS(this->AddResourceToCmd(
1327                     this->m_osInterface,
1328                     cmdBuffer,
1329                     &resourceParams));
1330 
1331                 resourceParams.presResource    = params->presSegmentMapStreamOut;
1332                 resourceParams.dwOffset        = 0;
1333                 resourceParams.pdwCmd          = (uint32_t*)&(cmd.Vp9SegmentationMapStreamoutBuffer.LowerAddress);
1334                 resourceParams.dwLocationInCmd = 58;
1335                 resourceParams.bIsWritable     = true;
1336 
1337                 MHW_MI_CHK_STATUS(this->AddResourceToCmd(
1338                     this->m_osInterface,
1339                     cmdBuffer,
1340                     &resourceParams));
1341             }
1342         }
1343 
1344         // DW61: Weights Histogram Streamout offset
1345         // This parameter specifies the 64 byte aligned offset in the VDEnc
1346         // Statistics Streamout buffer where the luma and chroma histogram for
1347         // the weights/offsets determination is written out.
1348 
1349         // The first 2 CLs(cacheline=64bytes) are ENC frame statistics data.
1350         // The 3rd CL is for VDL1* stats (hits & misses which doesn't model).
1351         // Hence it's a dummy CL for us. Histogram stats start from 4th CL onwards.
1352         cmd.DW61.WeightsHistogramStreamoutOffset = 3 * MHW_CACHELINE_SIZE;
1353 
1354         if (params->presVdencTileRowStoreBuffer != nullptr)
1355         {
1356             cmd.VdencTileRowStoreBuffer.BufferPictureFields.DW0.MemoryObjectControlState =
1357                 this->m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_VDENC_ROW_STORE_BUFFER_CODEC].Value;
1358 
1359             resourceParams.presResource = params->presVdencTileRowStoreBuffer;
1360             resourceParams.dwOffset = 0;
1361             resourceParams.pdwCmd = (uint32_t*)&(cmd.VdencTileRowStoreBuffer.LowerAddress);
1362             resourceParams.dwLocationInCmd = 62;
1363             resourceParams.bIsWritable = true;
1364 
1365             MHW_MI_CHK_STATUS(this->AddResourceToCmd(
1366                 this->m_osInterface,
1367                 cmdBuffer,
1368                 &resourceParams));
1369         }
1370 
1371         if (params->presVdencCumulativeCuCountStreamoutSurface != nullptr)
1372         {
1373             resourceParams.presResource = params->presVdencCumulativeCuCountStreamoutSurface;
1374             resourceParams.dwOffset = 0;
1375             resourceParams.pdwCmd = (uint32_t*)&(cmd.VdencCumulativeCuCountStreamoutSurface.LowerAddress);
1376             resourceParams.dwLocationInCmd = 65;
1377             resourceParams.bIsWritable = true;
1378 
1379             MHW_MI_CHK_STATUS(this->AddResourceToCmd(
1380                 this->m_osInterface,
1381                 cmdBuffer,
1382                 &resourceParams));
1383         }
1384 
1385         MHW_MI_CHK_STATUS(this->m_osInterface->pfnAddCommand(cmdBuffer, &cmd, sizeof(cmd)));
1386 
1387         return MOS_STATUS_SUCCESS;
1388     }
1389 
GetHWTileType(MOS_TILE_TYPE tileType,MOS_TILE_MODE_GMM tileModeGMM,bool gmmTileEnabled)1390     uint32_t GetHWTileType(MOS_TILE_TYPE tileType, MOS_TILE_MODE_GMM tileModeGMM, bool gmmTileEnabled)
1391     {
1392         uint32_t tileMode = 0;
1393 
1394         if (gmmTileEnabled)
1395         {
1396             return tileModeGMM;
1397         }
1398 
1399         switch (tileType)
1400         {
1401         case MOS_TILE_LINEAR:
1402             tileMode = 0;
1403             break;
1404         case MOS_TILE_YS:
1405             tileMode = 1;
1406             break;
1407         case MOS_TILE_X:
1408             tileMode = 2;
1409             break;
1410         default:
1411             tileMode = 3;
1412             break;
1413         }
1414         return tileMode;
1415     }
1416 
AddVdencSrcSurfaceStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_SURFACE_PARAMS params)1417     MOS_STATUS AddVdencSrcSurfaceStateCmd(
1418         PMOS_COMMAND_BUFFER       cmdBuffer,
1419         PMHW_VDBOX_SURFACE_PARAMS params) override
1420     {
1421         MHW_FUNCTION_ENTER;
1422 
1423         MHW_MI_CHK_NULL(this->m_osInterface);
1424         MHW_MI_CHK_NULL(cmdBuffer);
1425         MHW_MI_CHK_NULL(params);
1426         MHW_MI_CHK_NULL(params->psSurface);
1427 
1428         typename TVdencCmds::VDENC_SRC_SURFACE_STATE_CMD cmd;
1429 
1430         cmd.Dwords25.DW0.Width               = params->dwActualWidth - 1;
1431         cmd.Dwords25.DW0.Height              = params->dwActualHeight - 1;
1432         cmd.Dwords25.DW0.ColorSpaceSelection = params->bColorSpaceSelection;
1433 
1434         cmd.Dwords25.DW0.CrVCbUPixelOffsetVDirection = params->ucVDirection;
1435 
1436         uint32_t tilemode             = GetHWTileType(params->psSurface->TileType, params->psSurface->TileModeGMM, params->psSurface->bGMMTileEnabled);
1437         cmd.Dwords25.DW1.TiledSurface = (tilemode & 0x2) >> 1;
1438         cmd.Dwords25.DW1.TileWalk     = tilemode & 0x1;
1439 
1440         cmd.Dwords25.DW1.SurfaceFormat            = MosFormatToVdencSurfaceRawFormat(params->psSurface->Format);
1441         cmd.Dwords25.DW0.SurfaceFormatByteSwizzle = params->bDisplayFormatSwizzle;
1442         cmd.Dwords25.DW1.SurfacePitch             = params->psSurface->dwPitch - 1;
1443         cmd.Dwords25.DW2.YOffsetForUCb = cmd.Dwords25.DW3.YOffsetForVCr =
1444             MOS_ALIGN_CEIL((params->psSurface->UPlaneOffset.iSurfaceOffset - params->psSurface->dwOffset)/params->psSurface->dwPitch + params->psSurface->RenderOffset.YUV.U.YOffset, MHW_VDBOX_MFX_RAW_UV_PLANE_ALIGNMENT_GEN9);
1445         cmd.Dwords25.DW1.ChromaDownsampleFilterControl = 7;
1446 
1447         MHW_MI_CHK_STATUS(this->m_osInterface->pfnAddCommand(cmdBuffer, &cmd, sizeof(cmd)));
1448 
1449         return MOS_STATUS_SUCCESS;
1450     }
1451 
AddVdencRefSurfaceStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_SURFACE_PARAMS params)1452     MOS_STATUS AddVdencRefSurfaceStateCmd(
1453         PMOS_COMMAND_BUFFER       cmdBuffer,
1454         PMHW_VDBOX_SURFACE_PARAMS params) override
1455     {
1456         MHW_FUNCTION_ENTER;
1457 
1458         MHW_MI_CHK_NULL(this->m_osInterface);
1459         MHW_MI_CHK_NULL(cmdBuffer);
1460         MHW_MI_CHK_NULL(params);
1461         MHW_MI_CHK_NULL(params->psSurface);
1462 
1463         typename TVdencCmds::VDENC_REF_SURFACE_STATE_CMD cmd;
1464 
1465         if (params->bVdencDynamicScaling)
1466         {
1467             if (params->ucSurfaceStateId == CODECHAL_HCP_LAST_SURFACE_ID)
1468             {
1469                 cmd.DW1.SurfaceId = 4;
1470             }
1471             else if (params->ucSurfaceStateId == CODECHAL_HCP_GOLDEN_SURFACE_ID)
1472             {
1473                 cmd.DW1.SurfaceId = 5;
1474             }
1475             else if (params->ucSurfaceStateId == CODECHAL_HCP_ALTREF_SURFACE_ID)
1476             {
1477                 cmd.DW1.SurfaceId = 6;
1478             }
1479         }
1480 
1481         if (params->Mode == CODECHAL_ENCODE_MODE_HEVC || params->Mode == CODECHAL_ENCODE_MODE_AV1)
1482         {
1483             cmd.Dwords25.DW0.Width  = params->dwActualWidth - 1;
1484             cmd.Dwords25.DW0.Height = params->dwActualHeight - 1;
1485         }
1486         else
1487         {
1488             cmd.Dwords25.DW0.Width  = params->psSurface->dwWidth - 1;
1489             cmd.Dwords25.DW0.Height = params->psSurface->dwHeight - 1;
1490         }
1491 
1492         cmd.Dwords25.DW0.CrVCbUPixelOffsetVDirection = params->ucVDirection;
1493 
1494         uint32_t tilemode             = GetHWTileType(params->psSurface->TileType, params->psSurface->TileModeGMM, params->psSurface->bGMMTileEnabled);
1495         cmd.Dwords25.DW1.TiledSurface = (tilemode & 0x2) >> 1;
1496         cmd.Dwords25.DW1.TileWalk     = tilemode & 0x1;
1497 
1498         cmd.Dwords25.DW1.SurfaceFormat = MosFormatToVdencSurfaceReconFormat(params->psSurface->Format);
1499 
1500         if (cmd.Dwords25.DW1.SurfaceFormat == TVdencCmds::VDENC_Surface_State_Fields_CMD::SURFACE_FORMAT_P010)
1501         {
1502             cmd.Dwords25.DW1.SurfaceFormat = TVdencCmds::VDENC_Surface_State_Fields_CMD::SURFACE_FORMAT_P010_VARIANT;
1503         }
1504 
1505         cmd.Dwords25.DW1.SurfacePitch = params->psSurface->dwPitch - 1;
1506         cmd.Dwords25.DW2.YOffsetForUCb = cmd.Dwords25.DW3.YOffsetForVCr =
1507             (params->psSurface->UPlaneOffset.iSurfaceOffset - params->psSurface->dwOffset)/params->psSurface->dwPitch + params->psSurface->RenderOffset.YUV.U.YOffset;
1508 
1509         if (cmd.Dwords25.DW1.SurfaceFormat == vdencSurfaceFormatY416Variant ||
1510             cmd.Dwords25.DW1.SurfaceFormat == vdencSurfaceFormatAyuvVariant)
1511         {
1512             /* Y410/Y416 Reconstructed format handling */
1513             if (cmd.Dwords25.DW1.SurfaceFormat == vdencSurfaceFormatY416Variant)
1514                 cmd.Dwords25.DW1.SurfacePitch = params->psSurface->dwPitch / 2 - 1;
1515             /* AYUV Reconstructed format handling */
1516             if (cmd.Dwords25.DW1.SurfaceFormat == vdencSurfaceFormatAyuvVariant)
1517                 cmd.Dwords25.DW1.SurfacePitch = params->psSurface->dwPitch / 4 - 1;
1518 
1519             cmd.Dwords25.DW2.YOffsetForUCb = params->dwReconSurfHeight;
1520             cmd.Dwords25.DW3.YOffsetForVCr = params->dwReconSurfHeight << 1;
1521         }
1522         else if (cmd.Dwords25.DW1.SurfaceFormat == vdencSurfaceFormatY216Variant ||
1523             cmd.Dwords25.DW1.SurfaceFormat == vdencSurfaceFormatYuyvVariant)
1524         {
1525             cmd.Dwords25.DW2.YOffsetForUCb = cmd.Dwords25.DW3.YOffsetForVCr = params->dwReconSurfHeight;
1526         }
1527 
1528         MHW_MI_CHK_STATUS(this->m_osInterface->pfnAddCommand(cmdBuffer, &cmd, sizeof(cmd)));
1529 
1530         return MOS_STATUS_SUCCESS;
1531     }
1532 
AddVdencDsRefSurfaceStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_SURFACE_PARAMS params,uint8_t numSurfaces)1533     MOS_STATUS AddVdencDsRefSurfaceStateCmd(
1534         PMOS_COMMAND_BUFFER       cmdBuffer,
1535         PMHW_VDBOX_SURFACE_PARAMS params,
1536         uint8_t                   numSurfaces) override
1537     {
1538         uint32_t tilemode = 0;
1539         MHW_FUNCTION_ENTER;
1540 
1541         MHW_MI_CHK_NULL(this->m_osInterface);
1542         MHW_MI_CHK_NULL(cmdBuffer);
1543         MHW_MI_CHK_NULL(params);
1544         MHW_MI_CHK_NULL(params->psSurface);
1545 
1546         typename TVdencCmds::VDENC_DS_REF_SURFACE_STATE_CMD cmd;
1547 
1548         if (params->Mode == CODECHAL_ENCODE_MODE_HEVC || params->Mode == CODECHAL_ENCODE_MODE_AV1)
1549         {
1550             cmd.Dwords25.DW0.Width  = params->dwActualWidth - 1;
1551             cmd.Dwords25.DW0.Height = params->dwActualHeight - 1;
1552         }
1553         else
1554         {
1555             cmd.Dwords25.DW0.Width  = params->psSurface->dwWidth - 1;
1556             cmd.Dwords25.DW0.Height = params->psSurface->dwHeight - 1;
1557         }
1558         cmd.Dwords25.DW0.CrVCbUPixelOffsetVDirection = params->ucVDirection;
1559 
1560         tilemode                      = GetHWTileType(params->psSurface->TileType, params->psSurface->TileModeGMM, params->psSurface->bGMMTileEnabled);
1561         cmd.Dwords25.DW1.TiledSurface = (tilemode & 0x2) >> 1;
1562         cmd.Dwords25.DW1.TileWalk     = tilemode & 0x1;
1563 
1564         cmd.Dwords25.DW1.SurfaceFormat    = TVdencCmds::VDENC_Surface_State_Fields_CMD::SURFACE_FORMAT_PLANAR_420_8;
1565         cmd.Dwords25.DW1.SurfacePitch     = params->psSurface->dwPitch - 1;
1566         cmd.Dwords25.DW2.YOffsetForUCb    = cmd.Dwords25.DW3.YOffsetForVCr =
1567             (params->psSurface->UPlaneOffset.iSurfaceOffset - params->psSurface->dwOffset)/params->psSurface->dwPitch + params->psSurface->RenderOffset.YUV.U.YOffset;
1568 
1569         // 2nd surface
1570         if (numSurfaces > 1)
1571         {
1572             params = params + 1;          // Increment pointer to move from 1st surface to 2nd surface.
1573             MHW_MI_CHK_NULL(params);
1574             MHW_MI_CHK_NULL(params->psSurface);
1575 
1576             if (params->Mode == CODECHAL_ENCODE_MODE_HEVC || params->Mode == CODECHAL_ENCODE_MODE_AV1)
1577             {
1578                 cmd.Dwords69.DW0.Width  = params->dwActualWidth - 1;
1579                 cmd.Dwords69.DW0.Height = params->dwActualHeight - 1;
1580             }
1581             else
1582             {
1583                 cmd.Dwords69.DW0.Width  = params->psSurface->dwWidth - 1;
1584                 cmd.Dwords69.DW0.Height = params->psSurface->dwHeight - 1;
1585             }
1586             cmd.Dwords69.DW0.CrVCbUPixelOffsetVDirection = params->ucVDirection;
1587 
1588             tilemode                          = GetHWTileType(params->psSurface->TileType, params->psSurface->TileModeGMM, params->psSurface->bGMMTileEnabled);
1589             cmd.Dwords69.DW1.TiledSurface     = (tilemode & 0x2) >> 1;
1590             cmd.Dwords69.DW1.TileWalk         = tilemode & 0x1;
1591 
1592             cmd.Dwords69.DW1.SurfaceFormat    = TVdencCmds::VDENC_Surface_State_Fields_CMD::SURFACE_FORMAT_PLANAR_420_8;
1593             cmd.Dwords69.DW1.SurfacePitch     = params->psSurface->dwPitch - 1;
1594             cmd.Dwords69.DW2.YOffsetForUCb    = cmd.Dwords69.DW3.YOffsetForVCr =
1595                 (params->psSurface->UPlaneOffset.iSurfaceOffset - params->psSurface->dwOffset)/params->psSurface->dwPitch + params->psSurface->RenderOffset.YUV.U.YOffset;
1596         }
1597 
1598         MHW_MI_CHK_STATUS(this->m_osInterface->pfnAddCommand(cmdBuffer, &cmd, sizeof(cmd)));
1599 
1600         return MOS_STATUS_SUCCESS;
1601     }
1602 
AddVdencImgStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_BATCH_BUFFER batchBuffer,PMHW_VDBOX_AVC_IMG_PARAMS params)1603     MOS_STATUS AddVdencImgStateCmd(
1604         PMOS_COMMAND_BUFFER       cmdBuffer,
1605         PMHW_BATCH_BUFFER         batchBuffer,
1606         PMHW_VDBOX_AVC_IMG_PARAMS params) override
1607     {
1608         MHW_FUNCTION_ENTER;
1609 
1610         MHW_MI_CHK_NULL(params);
1611         MHW_MI_CHK_NULL(params->pEncodeAvcSeqParams);
1612         MHW_MI_CHK_NULL(params->pEncodeAvcPicParams);
1613 
1614         auto paramsG12 = dynamic_cast<PMHW_VDBOX_AVC_IMG_PARAMS_G12>(params);
1615         MHW_MI_CHK_NULL(paramsG12);
1616 
1617         typename TVdencCmds::VDENC_IMG_STATE_CMD cmd;
1618 
1619         auto avcSeqParams   = params->pEncodeAvcSeqParams;
1620         auto avcPicParams   = params->pEncodeAvcPicParams;
1621         auto avcSliceParams = params->pEncodeAvcSliceParams;
1622 
1623         // initialize
1624         cmd.DW1.VdencExtendedPakObjCmdEnable         = 1;
1625         cmd.DW2.UnidirectionalMixDisable             = false;
1626         cmd.DW4.IntraSadMeasureAdjustment            = 2;
1627         cmd.DW4.SubMacroblockSubPartitionMask        = 0x70;
1628         cmd.DW8.BilinearFilterEnable                 = false;
1629         cmd.DW9.Mode0Cost                            = 10;
1630         cmd.DW9.Mode1Cost                            = 0;
1631         cmd.DW9.Mode2Cost                            = 3;
1632         cmd.DW9.Mode3Cost                            = 30;
1633         cmd.DW20.PenaltyForIntra16X16NondcPrediction = 36;
1634         cmd.DW20.PenaltyForIntra8X8NondcPrediction   = 12;
1635         cmd.DW20.PenaltyForIntra4X4NondcPrediction   = 4;
1636         cmd.DW22.Smallmbsizeinword                   = 0xff;
1637         cmd.DW22.Largembsizeinword                   = 0xff;
1638         cmd.DW27.MaxHmvR                             = 0x2000;
1639         cmd.DW27.MaxVmvR                             = 0x200;
1640         cmd.DW33.Maxdeltaqp                          = 0x0f;
1641 
1642         // initialize for P frame
1643         if (avcPicParams->CodingType != I_TYPE)
1644         {
1645             cmd.DW2.BidirectionalWeight       = 0x20;
1646             cmd.DW4.SubPelMode                = (avcPicParams->bEnableSubPelMode) ? avcPicParams->SubPelMode : 3;
1647             cmd.DW4.BmeDisableForFbrMessage   = 1;
1648             cmd.DW4.InterSadMeasureAdjustment = 2;
1649             cmd.DW5.CrePrefetchEnable         = 1;
1650             cmd.DW8.NonSkipZeroMvCostAdded    = 1;
1651             cmd.DW8.NonSkipMbModeCostAdded    = 1;
1652             cmd.DW9.Mode0Cost                 = 7;
1653             cmd.DW9.Mode1Cost                 = 26;
1654             cmd.DW9.Mode2Cost                 = 30;
1655             cmd.DW9.Mode3Cost                 = 57;
1656             cmd.DW10.Mode4Cost                = 8;
1657             cmd.DW10.Mode5Cost                = 2;
1658             cmd.DW10.Mode6Cost                = 4;
1659             cmd.DW10.Mode7Cost                = 6;
1660             cmd.DW11.Mode8Cost                = 5;
1661             cmd.DW11.Mode9Cost                = 0;
1662             cmd.DW11.RefIdCost                = 4;
1663             cmd.DW12.MvCost0                  = 0;
1664             cmd.DW12.MvCost1                  = 6;
1665             cmd.DW12.MvCost2                  = 6;
1666             cmd.DW12.MvCost3                  = 9;
1667             cmd.DW13.MvCost4                  = 10;
1668             cmd.DW13.MvCost5                  = 13;
1669             cmd.DW13.MvCost6                  = 14;
1670             cmd.DW13.MvCost7                  = 24;
1671             cmd.DW31.SadHaarThreshold0        = 800;
1672             cmd.DW32.SadHaarThreshold1        = 1600;
1673             cmd.DW32.SadHaarThreshold2        = 2400;
1674             cmd.DW34.MidpointSadHaar          = 0x640;
1675         }
1676 
1677         cmd.DW1.VdencPerfmode                   = params->bVDEncPerfModeEnabled;
1678         cmd.DW1.Transform8X8Flag                = avcPicParams->transform_8x8_mode_flag;
1679         cmd.DW3.PictureWidth                    = params->wPicWidthInMb;
1680         cmd.DW4.ForwardTransformSkipCheckEnable = this->m_vdencFTQEnabled[avcSeqParams->TargetUsage];
1681         cmd.DW4.BlockBasedSkipEnabled           = this->m_vdencBlockBasedSkipEnabled[avcSeqParams->TargetUsage];
1682         cmd.DW5.CrePrefetchEnable               = params->bCrePrefetchEnable;
1683         cmd.DW5.PictureHeightMinusOne           = params->wPicHeightInMb - 1;
1684         cmd.DW5.PictureType                     = avcPicParams->CodingType - 1;
1685         cmd.DW5.ConstrainedIntraPredictionFlag  = avcPicParams->constrained_intra_pred_flag;
1686 
1687         if (paramsG12->bVDEncUltraModeEnabled)
1688         {
1689             cmd.DW1.VdencPerfmode  = true;
1690             cmd.DW1.VdencUltraMode = true;
1691         }
1692 
1693         // HME Ref1 Disable should be set as 0 when VDEnc Perf Mode is enabled
1694         if ((avcPicParams->CodingType != I_TYPE) &&
1695             (!params->pEncodeAvcSliceParams->num_ref_idx_l0_active_minus1) &&
1696             (!params->bVDEncPerfModeEnabled))
1697         {
1698             cmd.DW5.HmeRef1Disable = true;
1699         }
1700 
1701         if (avcSeqParams->EnableSliceLevelRateCtrl)
1702         {
1703             cmd.DW5.MbSliceThresholdValue = params->dwMbSlcThresholdValue;
1704         }
1705 
1706         cmd.DW6.SliceMacroblockHeightMinusOne = params->wPicHeightInMb - 1;
1707 
1708         cmd.DW8.LumaIntraPartitionMask = avcPicParams->transform_8x8_mode_flag ? 0 : TVdencCmds::VDENC_IMG_STATE_CMD::LUMA_INTRA_PARTITION_MASK_UNNAMED2;
1709 
1710         cmd.DW14.QpPrimeY = avcPicParams->QpY + avcSliceParams->slice_qp_delta;
1711 
1712         if (params->pVDEncModeCost)
1713         {
1714             cmd.DW9.Mode0Cost  = *(params->pVDEncModeCost);
1715             cmd.DW9.Mode1Cost  = *(params->pVDEncModeCost + 1);
1716             cmd.DW9.Mode2Cost  = *(params->pVDEncModeCost + 2);
1717             cmd.DW9.Mode3Cost  = *(params->pVDEncModeCost + 3);
1718 
1719             cmd.DW10.Mode4Cost = *(params->pVDEncModeCost + 4);
1720             cmd.DW10.Mode5Cost = *(params->pVDEncModeCost + 5);
1721             cmd.DW10.Mode6Cost = *(params->pVDEncModeCost + 6);
1722             cmd.DW10.Mode7Cost = *(params->pVDEncModeCost + 7);
1723 
1724             cmd.DW11.Mode8Cost = *(params->pVDEncModeCost + 8);
1725             cmd.DW11.RefIdCost = *(params->pVDEncModeCost + 10);
1726         }
1727         if (params->pVDEncMvCost)
1728         {
1729             cmd.DW12.MvCost0 = *(params->pVDEncMvCost);
1730             cmd.DW12.MvCost1 = *(params->pVDEncMvCost + 1);
1731             cmd.DW12.MvCost2 = *(params->pVDEncMvCost + 2);
1732             cmd.DW12.MvCost3 = *(params->pVDEncMvCost + 3);
1733             cmd.DW13.MvCost4 = *(params->pVDEncMvCost + 4);
1734             cmd.DW13.MvCost5 = *(params->pVDEncMvCost + 5);
1735             cmd.DW13.MvCost6 = *(params->pVDEncMvCost + 6);
1736             cmd.DW13.MvCost7 = *(params->pVDEncMvCost + 7);
1737         }
1738 
1739         cmd.DW27.MaxVmvR = params->dwMaxVmvR;
1740 
1741         if (params->pVDEncHmeMvCost)
1742         {
1743             cmd.DW28.HmeMvCost0 = *(params->pVDEncHmeMvCost);
1744             cmd.DW28.HmeMvCost1 = *(params->pVDEncHmeMvCost + 1);
1745             cmd.DW28.HmeMvCost2 = *(params->pVDEncHmeMvCost + 2);
1746             cmd.DW28.HmeMvCost3 = *(params->pVDEncHmeMvCost + 3);
1747             cmd.DW29.HmeMvCost4 = *(params->pVDEncHmeMvCost + 4);
1748             cmd.DW29.HmeMvCost5 = *(params->pVDEncHmeMvCost + 5);
1749             cmd.DW29.HmeMvCost6 = *(params->pVDEncHmeMvCost + 6);
1750             cmd.DW29.HmeMvCost7 = *(params->pVDEncHmeMvCost + 7);
1751         }
1752 
1753         // HMEOffset is in range of -128 to 127, clip value to within range
1754         if (avcPicParams->bEnableHMEOffset)
1755         {
1756             cmd.DW7.Hme0XOffset = MOS_CLAMP_MIN_MAX(avcPicParams->HMEOffset[0][0][0], -128, 127);
1757             cmd.DW7.Hme0YOffset = MOS_CLAMP_MIN_MAX(avcPicParams->HMEOffset[0][0][1], -128, 127);
1758             cmd.DW7.Hme1XOffset = MOS_CLAMP_MIN_MAX(avcPicParams->HMEOffset[1][0][0], -128, 127);
1759             cmd.DW7.Hme1YOffset = MOS_CLAMP_MIN_MAX(avcPicParams->HMEOffset[1][0][1], -128, 127);
1760         }
1761 
1762         // Rolling-I settings
1763         if ((avcPicParams->CodingType != I_TYPE) && (avcPicParams->EnableRollingIntraRefresh != ROLLING_I_DISABLED))
1764         {
1765             cmd.DW21.IntraRefreshEnableRollingIEnable = avcPicParams->EnableRollingIntraRefresh != ROLLING_I_DISABLED ? 1 : 0;
1766             cmd.DW21.IntraRefreshMode                 = avcPicParams->EnableRollingIntraRefresh == ROLLING_I_ROW ? 0 : 1;        // 0->Row based ; 1->Column based
1767             cmd.DW21.IntraRefreshMBPos                = avcPicParams->IntraRefreshMBNum;
1768             cmd.DW21.IntraRefreshMBSizeMinusOne       = avcPicParams->IntraRefreshUnitinMB;
1769             cmd.DW21.QpAdjustmentForRollingI          = avcPicParams->IntraRefreshQPDelta;
1770 
1771             auto waTable = this->m_osInterface->pfnGetWaTable(this->m_osInterface);
1772             MHW_MI_CHK_NULL(waTable);
1773 
1774             // WA to prevent error propagation from top-right direction.
1775             // Disable prediction modes 3, 7 for 4x4
1776             // and modes 0, 2, 3, 4, 5, 7 for 8x8 (due to filtering)
1777             if (avcPicParams->EnableRollingIntraRefresh == ROLLING_I_COLUMN &&
1778                 MEDIA_IS_WA(waTable, Wa_18011246551))
1779             {
1780                 cmd.DW17.AvcIntra4X4ModeMask = 0x88;
1781                 cmd.DW17.AvcIntra8X8ModeMask = 0xBD;
1782             }
1783         }
1784 
1785         // Setting MinMaxQP values if they are presented
1786         if (avcPicParams->ucMaximumQP && avcPicParams->ucMinimumQP)
1787         {
1788             cmd.DW33.MaxQp = avcPicParams->ucMaximumQP;
1789             cmd.DW33.MinQp = avcPicParams->ucMinimumQP;
1790         }
1791         else
1792         {
1793             // Set default values
1794             cmd.DW33.MaxQp = 0x33;
1795             cmd.DW33.MinQp = 0x0a;
1796         }
1797 
1798         // VDEnc CQP case ROI settings, BRC ROI will be handled in HuC FW
1799         if (!params->bVdencBRCEnabled && avcPicParams->NumROI && avcPicParams->bNativeROI)
1800         {
1801             MHW_ASSERT(avcPicParams->NumROI < 4);
1802 
1803             int8_t priorityLevelOrDQp[ENCODE_VDENC_AVC_MAX_ROI_NUMBER_G9] = { 0 };
1804 
1805             for (uint8_t i = 0; i < avcPicParams->NumROI; i++)
1806             {
1807                 int8_t dQpRoi = avcPicParams->ROIDistinctDeltaQp[i];
1808 
1809                 // clip delta qp roi to VDEnc supported range
1810                 priorityLevelOrDQp[i] = (char)CodecHal_Clip3(
1811                     ENCODE_VDENC_AVC_MIN_ROI_DELTA_QP_G9, ENCODE_VDENC_AVC_MAX_ROI_DELTA_QP_G9, dQpRoi);
1812             }
1813 
1814             cmd.DW34.RoiEnable = true;
1815 
1816             // Zone0 is reserved for non-ROI region
1817             cmd.DW30.RoiQpAdjustmentForZone1 = priorityLevelOrDQp[0];
1818             cmd.DW30.RoiQpAdjustmentForZone2 = priorityLevelOrDQp[1];
1819             cmd.DW30.RoiQpAdjustmentForZone3 = priorityLevelOrDQp[2];
1820         }
1821 
1822         if (avcSeqParams->RateControlMethod != RATECONTROL_CQP)
1823         {
1824             cmd.DW30.QpAdjustmentForShapeBestIntra4X4Winner = 0;
1825             cmd.DW30.QpAdjustmentForShapeBestIntra8X8Winner = 0;
1826             cmd.DW30.QpAdjustmentForShapeBestIntra16X16Winner = 0;
1827 
1828             cmd.DW31.BestdistortionQpAdjustmentForZone0 = 0;
1829             cmd.DW31.BestdistortionQpAdjustmentForZone1 = 1;
1830             cmd.DW31.BestdistortionQpAdjustmentForZone2 = 2;
1831             cmd.DW31.BestdistortionQpAdjustmentForZone3 = 3;
1832         }
1833 
1834         if (avcPicParams->EnableRollingIntraRefresh == ROLLING_I_DISABLED && params->bVdencStreamInEnabled &&
1835             (avcPicParams->NumDirtyROI && params->bVdencBRCEnabled || avcPicParams->NumROI && avcPicParams->bNativeROI ||
1836                 (avcPicParams->TargetFrameSize > 0 && !avcSeqParams->LookaheadDepth)))  // TCBRC (for AdaptiveRegionBoost)
1837         {
1838             cmd.DW34.RoiEnable = true;
1839         }
1840 
1841         if (params->bVdencStreamInEnabled)
1842         {
1843             cmd.DW34.FwdPredictor0MvEnable = 1;
1844             cmd.DW34.PpmvDisable           = 1;
1845 
1846             // non-native ROI in ForceQP mode (VDEnc StreamIn filled by HuC in BRC mode and by UMD driver in CQP) or MBQP
1847             if (avcPicParams->EnableRollingIntraRefresh == ROLLING_I_DISABLED &&
1848                 ((avcPicParams->NumROI && !avcPicParams->bNativeROI) || paramsG12->bStreamInMbQpEnabled))
1849             {
1850                 cmd.DW34.MbLevelQpEnable = 1;
1851             }
1852         }
1853 
1854         if (cmdBuffer == nullptr && batchBuffer == nullptr)
1855         {
1856             MHW_ASSERTMESSAGE("There was no valid buffer to add the HW command to.");
1857             return MOS_STATUS_NULL_POINTER;
1858         }
1859 
1860         MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(this->m_osInterface, cmdBuffer, batchBuffer, &cmd, sizeof(cmd)));
1861 
1862         return MOS_STATUS_SUCCESS;
1863     }
1864 
AddVdencWalkerStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_VDENC_WALKER_STATE_PARAMS params)1865     MOS_STATUS AddVdencWalkerStateCmd(
1866         PMOS_COMMAND_BUFFER                  cmdBuffer,
1867         PMHW_VDBOX_VDENC_WALKER_STATE_PARAMS params) override
1868     {
1869         MHW_FUNCTION_ENTER;
1870 
1871         MHW_MI_CHK_NULL(this->m_osInterface);
1872         MHW_MI_CHK_NULL(cmdBuffer);
1873         MHW_MI_CHK_NULL(params);
1874 
1875         typename TVdencCmds::VDENC_WALKER_STATE_CMD cmd;
1876 
1877         if (params->Mode == CODECHAL_ENCODE_MODE_AVC)
1878         {
1879             MHW_MI_CHK_NULL(params->pAvcSeqParams);
1880             MHW_MI_CHK_NULL(params->pAvcSlcParams);
1881 
1882             auto avcSeqParams = params->pAvcSeqParams;
1883             auto avcSlcParams = params->pAvcSlcParams;
1884 
1885             cmd.DW1.MbLcuStartYPosition = avcSlcParams->first_mb_in_slice / CODECHAL_GET_WIDTH_IN_MACROBLOCKS(avcSeqParams->FrameWidth);
1886 
1887             cmd.DW2.NextsliceMbStartYPosition = (avcSlcParams->first_mb_in_slice + avcSlcParams->NumMbsForSlice) / CODECHAL_GET_WIDTH_IN_MACROBLOCKS(avcSeqParams->FrameWidth);
1888 
1889             if (cmd.DW2.NextsliceMbStartYPosition > (uint32_t)CODECHAL_GET_HEIGHT_IN_MACROBLOCKS(avcSeqParams->FrameHeight))
1890             {
1891                 cmd.DW2.NextsliceMbStartYPosition = (uint32_t)CODECHAL_GET_HEIGHT_IN_MACROBLOCKS(avcSeqParams->FrameHeight);
1892             }
1893 
1894             cmd.DW3.Log2WeightDenomLuma = avcSlcParams->luma_log2_weight_denom;
1895 
1896             cmd.DW5.TileWidth = avcSeqParams->FrameWidth - 1;
1897         }
1898         else if (params->Mode == CODECHAL_ENCODE_MODE_HEVC)
1899         {
1900             auto paramsG12 = dynamic_cast<PMHW_VDBOX_VDENC_WALKER_STATE_PARAMS_G12>(params);
1901             MHW_MI_CHK_NULL(paramsG12);
1902 
1903             MHW_MI_CHK_NULL(params->pHevcEncSeqParams);
1904             MHW_MI_CHK_NULL(params->pHevcEncPicParams);
1905             MHW_MI_CHK_NULL(params->pEncodeHevcSliceParams);
1906 
1907             auto seqParams   = params->pHevcEncSeqParams;
1908             auto picParams   = params->pHevcEncPicParams;
1909             auto sliceParams = params->pEncodeHevcSliceParams;
1910 
1911             uint32_t ctbSize     = 1 << (seqParams->log2_max_coding_block_size_minus3 + 3);
1912             uint32_t widthInPix  = (1 << (seqParams->log2_min_coding_block_size_minus3 + 3)) * (seqParams->wFrameWidthInMinCbMinus1 + 1);
1913             uint32_t widthInCtb  = (widthInPix / ctbSize) + ((widthInPix % ctbSize) ? 1 : 0);  // round up
1914             uint32_t heightInPix = (1 << (seqParams->log2_min_coding_block_size_minus3 + 3)) * (seqParams->wFrameHeightInMinCbMinus1 + 1);
1915             uint32_t heightInCtb = (heightInPix / ctbSize) + ((heightInPix % ctbSize) ? 1 : 0);  // round up
1916             uint32_t shift     = seqParams->log2_max_coding_block_size_minus3 - seqParams->log2_min_coding_block_size_minus3;
1917 
1918             cmd.DW3.Log2WeightDenomLuma = cmd.DW3.HevcLog2WeightDemonLuma =
1919                 (picParams->weighted_pred_flag || picParams->weighted_bipred_flag) ? (picParams->bEnableGPUWeightedPrediction ? 6 : sliceParams->luma_log2_weight_denom) : 0;
1920 
1921             if (paramsG12->pTileCodingParams == nullptr)
1922             {
1923                 // No tiling support
1924                 cmd.DW1.MbLcuStartYPosition          = sliceParams->slice_segment_address / widthInCtb;
1925                 cmd.DW2.NextsliceMbLcuStartXPosition = (sliceParams->slice_segment_address + sliceParams->NumLCUsInSlice) / heightInCtb;
1926                 cmd.DW2.NextsliceMbStartYPosition    = (sliceParams->slice_segment_address + sliceParams->NumLCUsInSlice) / widthInCtb;
1927                 cmd.DW5.TileWidth                    = widthInPix - 1;
1928                 cmd.DW5.TileHeight                   = heightInPix - 1;
1929             }
1930             else
1931             {
1932                 cmd.DW1.MbLcuStartXPosition          = paramsG12->pTileCodingParams->TileStartLCUX;
1933                 cmd.DW1.MbLcuStartYPosition          = paramsG12->pTileCodingParams->TileStartLCUY;
1934 
1935                 cmd.DW2.NextsliceMbLcuStartXPosition = paramsG12->pTileCodingParams->TileStartLCUX + (paramsG12->pTileCodingParams->TileWidthInMinCbMinus1 >> shift) + 1;
1936                 cmd.DW2.NextsliceMbStartYPosition    = paramsG12->pTileCodingParams->TileStartLCUY + (paramsG12->pTileCodingParams->TileHeightInMinCbMinus1 >> shift) + 1;
1937 
1938                 cmd.DW4.TileStartCtbX                = paramsG12->pTileCodingParams->TileStartLCUX * ctbSize;
1939                 cmd.DW4.TileStartCtbY                = paramsG12->pTileCodingParams->TileStartLCUY * ctbSize;
1940 
1941                 cmd.DW5.TileWidth                    = ((paramsG12->pTileCodingParams->TileWidthInMinCbMinus1 + 1) << (seqParams->log2_min_coding_block_size_minus3 + 3)) - 1;
1942                 cmd.DW5.TileHeight                   = ((paramsG12->pTileCodingParams->TileHeightInMinCbMinus1 + 1) << (seqParams->log2_min_coding_block_size_minus3 + 3)) - 1;
1943                 cmd.DW1.FirstSuperSlice              = 1;
1944                 cmd.DW3.NumParEngine                 = paramsG12->dwNumberOfPipes;
1945                 cmd.DW3.TileNumber                   = paramsG12->dwTileId;
1946                 cmd.DW3.TileRowStoreSelect           = paramsG12->pTileCodingParams->TileRowStoreSelect;
1947                 cmd.DW8.TileStreamoutOffsetEnable    = 1;
1948                 cmd.DW8.TileStreamoutOffset          = paramsG12->dwTileId * 19;
1949 
1950                 cmd.DW6.StreaminOffsetEnable         = 1;
1951                 cmd.DW6.TileStreaminOffset           = paramsG12->pTileCodingParams->TileStreaminOffset;
1952 
1953                 // PAK Object StreamOut Offset Computation
1954                 uint32_t tileLCUStreamOutByteOffset = 0;
1955                 if (paramsG12->pTileCodingParams->TileStartLCUX != 0 || paramsG12->pTileCodingParams->TileStartLCUY != 0)
1956                 {
1957                     uint32_t ctbSize = 1 << (seqParams->log2_max_coding_block_size_minus3 + 3);
1958                     uint32_t NumOfCUInLCU = (ctbSize >> 3) * (ctbSize >> 3);  // Min CU size is 8
1959                     uint32_t ImgWidthInLCU = (((seqParams->wFrameWidthInMinCbMinus1 + 1) << (seqParams->log2_min_coding_block_size_minus3 + 3)) + ctbSize - 1) / ctbSize;
1960                     uint32_t ImgHeightInLCU = (((seqParams->wFrameHeightInMinCbMinus1 + 1) << (seqParams->log2_min_coding_block_size_minus3 + 3)) + ctbSize - 1) / ctbSize;
1961                     uint32_t NumLCUsCurLocation = paramsG12->pTileCodingParams->TileStartLCUY * ImgWidthInLCU + paramsG12->pTileCodingParams->TileStartLCUX *
1962                                                   ((((paramsG12->pTileCodingParams->TileHeightInMinCbMinus1 + 1) << (seqParams->log2_min_coding_block_size_minus3 + 3)) + ctbSize - 1) / ctbSize);
1963                     //For PAKObject Surface
1964                     tileLCUStreamOutByteOffset = 2 * BYTES_PER_DWORD * NumLCUsCurLocation * (NUM_PAK_DWS_PER_LCU + NumOfCUInLCU * NUM_DWS_PER_CU);
1965                     //Add 1 CL for size info at the beginning of each tile
1966                     tileLCUStreamOutByteOffset += MHW_CACHELINE_SIZE;
1967                     //CL alignment at end of every tile
1968                     tileLCUStreamOutByteOffset = MOS_ROUNDUP_DIVIDE(tileLCUStreamOutByteOffset, MHW_CACHELINE_SIZE);
1969                 }
1970 
1971                 cmd.DW9.TileLcuStreamOutOffset = tileLCUStreamOutByteOffset;
1972                 cmd.DW9.LcuStreamOutOffsetEnable = 0x1;
1973 
1974                 if (cmd.DW4.TileStartCtbY == 0)
1975                 {
1976                     //RowStore Offset Computation
1977                     uint32_t num32x32InX = (cmd.DW4.TileStartCtbX) / 32;
1978                     cmd.DW7.RowStoreOffsetEnable = 1;
1979                     cmd.DW7.TileRowstoreOffset = num32x32InX;
1980                 }
1981             }
1982 
1983             // for IBC
1984             cmd.DW11.Value &= 0xfffc00ff;
1985             cmd.DW12.Value = (cmd.DW12.Value & 0xfcffffff) | 0x1000000;
1986             cmd.DW12.IbcControl = params->pHevcEncPicParams->pps_curr_pic_ref_enabled_flag ?
1987                 paramsG12->IBCControl : VDENC_WALKER_STATE_COMMAND_IBC_CONTROL_IBC_DISABLED_G12;
1988 
1989             cmd.DW12.PaletteModeEnable = (seqParams->palette_mode_enabled_flag != 0) ? 1 : 0;
1990             uint32_t sliceQP = picParams->QpY + sliceParams->slice_qp_delta;
1991             uint32_t index;
1992             if (sliceQP <= 12)
1993             {
1994                 index = 0;
1995             }
1996             else if (sliceQP > 12 && sliceQP <= 47)
1997             {
1998                 index = (sliceQP - 8) / 5;
1999             }
2000             else if (sliceQP > 47 && sliceQP <= 49)
2001             {
2002                 index = 8;
2003             }
2004             else
2005             {
2006                 index = 9;
2007             }
2008             const uint32_t table1[10] = {0x50001,0x50001,0x50001,0x50002,0x90002,0x90002,0x90002,0xd0002,0x190002,0x210003};
2009             cmd.DW12.Value = (cmd.DW12.Value & 0xff80fff8) | table1[index];
2010             const uint32_t table2[10] = {0x2000a,0x2000a,0x2000a,0x4000a,0x8000a,0xc0010,0xc0018,0xc0018,0x100020,0x180030};
2011             cmd.DW13.Value = table2[index];
2012             const uint32_t table3[10] = {0x101004,0x101004,0x101004,0xc1008,0x42004,0x42006,0x13f06,0x13f06,0x13f0c,0x13006};
2013             cmd.DW14.Value = (cmd.DW14.Value & 0xffe0c0c0) | table3[index];
2014             const uint32_t table4[10] = {0x100004,0x100004,0x100004,0x100004,0x200004,0x300004,0x400004,0x600004,0x800004,0x1000004};
2015             cmd.DW15.Value = (cmd.DW15.Value & 0xfc00) | table4[index];
2016 
2017             if (seqParams->bit_depth_luma_minus8 > 0 && seqParams->palette_mode_enabled_flag)
2018             {
2019 
2020                 const uint32_t table1[10] = {0x3,0x3,0x3,0x4,0x4,0x4,0x4,0x4,0x4,0x5};
2021                 cmd.DW12.Value  = (cmd.DW12.Value & 0xfffffff8) | table1[index];
2022                 const uint32_t table2[10] = {0x80028,0x80028,0x80028,0x100028,0x200028,0x300040,0x300060,0x300060,0x400080,0x6000c0};
2023                 cmd.DW13.Value  = table2[index];
2024                 const uint32_t table3[10] = {0x400000,0x400000,0x400000,0x400000,0x800000,0xc00000,0x1000000,0x1800000,0x2000000,0x4000000};
2025                 cmd.DW15.Value = (cmd.DW15.Value & 0xffff) | table3[index];
2026             }
2027 
2028             cmd.DW12.Value &= 0xffff00ff;
2029             cmd.DW14.Value = (cmd.DW14.Value & 0x9fffff) | 0xc8400000;
2030             cmd.DW16.Value = (cmd.DW16.Value & 0xffffff) | 0xa6000000;
2031             if (seqParams->TargetUsage == 7)
2032             {
2033                 cmd.DW16.Value = (cmd.DW16.Value & 0xffc0c0c0) | 0x313131;
2034             }
2035             else
2036             {
2037                 cmd.DW16.Value = (cmd.DW16.Value & 0xffc0c0c0) | 0x3f3f3f;
2038             }
2039         }
2040         else if (params->Mode == CODECHAL_ENCODE_MODE_VP9)
2041         {
2042             auto paramsG12 = dynamic_cast<PMHW_VDBOX_VDENC_WALKER_STATE_PARAMS_G12>(params);
2043             MHW_MI_CHK_NULL(paramsG12);
2044             MHW_MI_CHK_NULL(params->pVp9EncPicParams);
2045             auto vp9PicParams = params->pVp9EncPicParams;
2046             auto tileCodingParams = paramsG12->pTileCodingParams;
2047 
2048             if (tileCodingParams == nullptr)
2049             {
2050                 cmd.DW2.NextsliceMbLcuStartXPosition = CODECHAL_GET_WIDTH_IN_BLOCKS(vp9PicParams->SrcFrameWidthMinus1, CODEC_VP9_SUPER_BLOCK_WIDTH);
2051                 cmd.DW2.NextsliceMbStartYPosition    = CODECHAL_GET_HEIGHT_IN_BLOCKS(vp9PicParams->SrcFrameHeightMinus1, CODEC_VP9_SUPER_BLOCK_HEIGHT);
2052                 cmd.DW5.TileWidth                    = vp9PicParams->SrcFrameWidthMinus1;
2053                 cmd.DW5.TileHeight                   = vp9PicParams->SrcFrameHeightMinus1;
2054                 cmd.DW1.FirstSuperSlice              = 1;
2055             }
2056             else
2057             {
2058                 cmd.DW1.MbLcuStartXPosition          = tileCodingParams->TileStartLCUX;
2059                 cmd.DW1.MbLcuStartYPosition          = tileCodingParams->TileStartLCUY;
2060 
2061                 cmd.DW5.TileWidth                    = ((tileCodingParams->TileWidthInMinCbMinus1 + 1) * CODEC_VP9_MIN_BLOCK_WIDTH) - 1;
2062                 cmd.DW5.TileHeight                   = ((tileCodingParams->TileHeightInMinCbMinus1 + 1) * CODEC_VP9_MIN_BLOCK_HEIGHT) - 1;
2063 
2064                 cmd.DW4.TileStartCtbX                = tileCodingParams->TileStartLCUX * CODEC_VP9_SUPER_BLOCK_WIDTH;
2065                 cmd.DW4.TileStartCtbY                = tileCodingParams->TileStartLCUY * CODEC_VP9_SUPER_BLOCK_HEIGHT;
2066 
2067                 cmd.DW2.NextsliceMbLcuStartXPosition = CODECHAL_GET_WIDTH_IN_BLOCKS((cmd.DW4.TileStartCtbX + cmd.DW5.TileWidth + 1), CODEC_VP9_SUPER_BLOCK_WIDTH);
2068                 cmd.DW2.NextsliceMbStartYPosition    = CODECHAL_GET_HEIGHT_IN_BLOCKS((cmd.DW4.TileStartCtbY + cmd.DW5.TileHeight + 1), CODEC_VP9_SUPER_BLOCK_HEIGHT);
2069 
2070                 cmd.DW1.FirstSuperSlice              = 1;
2071                 cmd.DW3.NumParEngine                 = paramsG12->dwNumberOfPipes;
2072                 cmd.DW3.TileNumber                   = paramsG12->dwTileId;
2073 
2074                 //Frame Stats Offset
2075                 cmd.DW8.TileStreamoutOffsetEnable = 1;
2076                 cmd.DW8.TileStreamoutOffset = (paramsG12->dwTileId * 19); // 3 CLs or 48 DWs of statistics data + 16CLs or 256 DWs of Histogram data
2077 
2078                 uint32_t tileStartXInSBs = (cmd.DW4.TileStartCtbX / CODEC_VP9_SUPER_BLOCK_WIDTH);
2079                 uint32_t tileStartYInSBs = (cmd.DW4.TileStartCtbY / CODEC_VP9_SUPER_BLOCK_HEIGHT);
2080                 //Aligned Tile height & frame width
2081                 uint32_t tileHeightInSBs = (cmd.DW5.TileHeight + 1 + (CODEC_VP9_SUPER_BLOCK_HEIGHT - 1)) / CODEC_VP9_SUPER_BLOCK_HEIGHT;
2082                 uint32_t frameWidthInSBs = (vp9PicParams->SrcFrameWidthMinus1 + 1 + (CODEC_VP9_SUPER_BLOCK_WIDTH - 1)) / CODEC_VP9_SUPER_BLOCK_WIDTH;
2083 
2084                 cmd.DW6.StreaminOffsetEnable = 1;
2085                 //StreamIn data is 4 CLs per LCU
2086                 cmd.DW6.TileStreaminOffset = (tileStartYInSBs * frameWidthInSBs + tileStartXInSBs * tileHeightInSBs) * (4);
2087 
2088                 //Compute PAK Object StreamOut Offsets
2089                 uint32_t tileLCUStreamOutOffsetInCachelines = 0;
2090                 if (cmd.DW4.TileStartCtbY != 0 || cmd.DW4.TileStartCtbX != 0)
2091                 {
2092                     //Aligned Tile width & frame height
2093                     uint32_t numOfSBs = tileStartYInSBs * frameWidthInSBs + tileStartXInSBs * tileHeightInSBs;
2094                     //max LCU size is 64, min Cu size is 8
2095                     uint32_t maxNumOfCUInSB = (CODEC_VP9_SUPER_BLOCK_HEIGHT / CODEC_VP9_MIN_BLOCK_HEIGHT) * (CODEC_VP9_SUPER_BLOCK_WIDTH / CODEC_VP9_MIN_BLOCK_WIDTH);
2096                     //(num of SBs in a tile) *  (num of cachelines needed per SB)
2097                     tileLCUStreamOutOffsetInCachelines = numOfSBs * (MOS_ROUNDUP_DIVIDE((2 * BYTES_PER_DWORD * (NUM_PAK_DWS_PER_LCU + maxNumOfCUInSB * NUM_DWS_PER_CU)), MHW_CACHELINE_SIZE));
2098                 }
2099 
2100                 cmd.DW9.LcuStreamOutOffsetEnable = 1;
2101                 cmd.DW9.TileLcuStreamOutOffset = tileLCUStreamOutOffsetInCachelines;
2102 
2103                 if (cmd.DW4.TileStartCtbY == 0)
2104                 {
2105                     //RowStore Offset Computation
2106                     uint32_t num32x32sInX = (cmd.DW4.TileStartCtbX) / 32;
2107                     cmd.DW7.RowStoreOffsetEnable = 1;
2108                     cmd.DW7.TileRowstoreOffset = num32x32sInX;
2109                 }
2110             }
2111         }
2112 
2113         MHW_MI_CHK_STATUS(this->m_osInterface->pfnAddCommand(cmdBuffer, &cmd, sizeof(cmd)));
2114 
2115         return MOS_STATUS_SUCCESS;
2116     }
2117 
AddVdencAvcWeightsOffsetsStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_AVC_WEIGHTOFFSET_PARAMS params)2118     MOS_STATUS AddVdencAvcWeightsOffsetsStateCmd(
2119         PMOS_COMMAND_BUFFER                cmdBuffer,
2120         PMHW_VDBOX_AVC_WEIGHTOFFSET_PARAMS params) override
2121     {
2122         MHW_FUNCTION_ENTER;
2123 
2124         MHW_MI_CHK_NULL(this->m_osInterface);
2125         MHW_MI_CHK_NULL(cmdBuffer);
2126         MHW_MI_CHK_NULL(params);
2127         MHW_MI_CHK_NULL(params->pAvcPicParams);
2128 
2129         typename TVdencCmds::VDENC_WEIGHTSOFFSETS_STATE_CMD cmd;
2130 
2131         auto avcPicParams = params->pAvcPicParams;
2132 
2133         if (avcPicParams->weighted_pred_flag == 1)
2134         {
2135             cmd.DW1.WeightsForwardReference0 = params->Weights[0][0][0][0];
2136             cmd.DW1.OffsetForwardReference0  = params->Weights[0][0][0][1];
2137             cmd.DW1.WeightsForwardReference1 = params->Weights[0][1][0][0];
2138             cmd.DW1.OffsetForwardReference1  = params->Weights[0][1][0][1];
2139             cmd.DW2.WeightsForwardReference2 = params->Weights[0][2][0][0];
2140             cmd.DW2.OffsetForwardReference2  = params->Weights[0][2][0][1];
2141         }
2142         //set to default value when weighted prediction not enabled
2143         else
2144         {
2145             cmd.DW1.WeightsForwardReference0 = 1;
2146             cmd.DW1.OffsetForwardReference0  = 0;
2147             cmd.DW1.WeightsForwardReference1 = 1;
2148             cmd.DW1.OffsetForwardReference1  = 0;
2149             cmd.DW2.WeightsForwardReference2 = 1;
2150             cmd.DW2.OffsetForwardReference2  = 0;
2151         }
2152 
2153         MHW_MI_CHK_STATUS(this->m_osInterface->pfnAddCommand(cmdBuffer, &cmd, sizeof(cmd)));
2154 
2155         return MOS_STATUS_SUCCESS;
2156     }
2157 
AddVdencWeightsOffsetsStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_BATCH_BUFFER batchBuffer,PMHW_VDBOX_VDENC_WEIGHT_OFFSET_PARAMS params)2158     MOS_STATUS AddVdencWeightsOffsetsStateCmd(
2159         PMOS_COMMAND_BUFFER                   cmdBuffer,
2160         PMHW_BATCH_BUFFER                     batchBuffer,
2161         PMHW_VDBOX_VDENC_WEIGHT_OFFSET_PARAMS params) override
2162     {
2163         MHW_FUNCTION_ENTER;
2164 
2165         MHW_MI_CHK_NULL(params);
2166 
2167         typename TVdencCmds::VDENC_WEIGHTSOFFSETS_STATE_CMD cmd;
2168 
2169         cmd.DW1.WeightsForwardReference0         = 1;
2170         cmd.DW1.OffsetForwardReference0          = 0;
2171         cmd.DW1.WeightsForwardReference1         = 1;
2172         cmd.DW1.OffsetForwardReference1          = 0;
2173         cmd.DW2.WeightsForwardReference2         = 1;
2174         cmd.DW2.OffsetForwardReference2          = 0;
2175         cmd.DW2.HevcVp9WeightsBackwardReference0 = 1;
2176         cmd.DW2.HevcVp9OffsetBackwardReference0  = 0;
2177 
2178         // Luma Offsets and Weights
2179         if (params->bWeightedPredEnabled)
2180         {
2181             uint32_t  refPicListNum = 0;
2182             // DWORD 1
2183             cmd.DW1.WeightsForwardReference0 = CodecHal_Clip3(-128, 127,
2184                 params->LumaWeights[refPicListNum][0] + params->dwDenom);
2185             cmd.DW1.OffsetForwardReference0  = params->LumaOffsets[refPicListNum][0];
2186             cmd.DW1.WeightsForwardReference1 = CodecHal_Clip3(-128, 127,
2187                 params->LumaWeights[refPicListNum][1] + params->dwDenom);
2188             cmd.DW1.OffsetForwardReference1  = params->LumaOffsets[refPicListNum][1];
2189 
2190             // DWORD 2
2191             cmd.DW2.WeightsForwardReference2 = CodecHal_Clip3(-128, 127,
2192                 params->LumaWeights[refPicListNum][2] + params->dwDenom);
2193             cmd.DW2.OffsetForwardReference2  = params->LumaOffsets[refPicListNum][2];
2194             if (!params->isLowDelay)
2195             {
2196                 refPicListNum = 1;
2197                 cmd.DW2.HevcVp9WeightsBackwardReference0 = CodecHal_Clip3(-128, 127,
2198                     params->LumaWeights[refPicListNum][0] + params->dwDenom);
2199                 cmd.DW2.HevcVp9OffsetBackwardReference0 = params->LumaOffsets[refPicListNum][0];
2200             }
2201             else
2202             {
2203                 cmd.DW2.HevcVp9WeightsBackwardReference0 = cmd.DW1.WeightsForwardReference0;
2204                 cmd.DW2.HevcVp9OffsetBackwardReference0 = cmd.DW1.OffsetForwardReference0;
2205             }
2206         }
2207 
2208         if (cmdBuffer == nullptr && batchBuffer == nullptr)
2209         {
2210             MHW_ASSERTMESSAGE("There was no valid buffer to add the HW command to.");
2211             return MOS_STATUS_NULL_POINTER;
2212         }
2213 
2214         MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(this->m_osInterface, cmdBuffer, batchBuffer, &cmd, sizeof(cmd)));
2215 
2216         return MOS_STATUS_SUCCESS;
2217     }
2218 
AddVdencCmd1Cmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_BATCH_BUFFER batchBuffer,PMHW_VDBOX_VDENC_CMD1_PARAMS params)2219    MOS_STATUS AddVdencCmd1Cmd(
2220         PMOS_COMMAND_BUFFER                  cmdBuffer,
2221         PMHW_BATCH_BUFFER                    batchBuffer,
2222         PMHW_VDBOX_VDENC_CMD1_PARAMS  params) override
2223     {
2224         return MOS_STATUS_SUCCESS;
2225     }
2226 
AddVdencCmd2Cmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_BATCH_BUFFER batchBuffer,PMHW_VDBOX_VDENC_CMD2_STATE params)2227     MOS_STATUS AddVdencCmd2Cmd(
2228         PMOS_COMMAND_BUFFER                 cmdBuffer,
2229         PMHW_BATCH_BUFFER                   batchBuffer,
2230         PMHW_VDBOX_VDENC_CMD2_STATE params) override
2231     {
2232         return MOS_STATUS_SUCCESS;
2233     }
2234 
2235     //!
2236     //! \brief    Adds VDEnc Pipe Control State command in command buffer
2237     //! \details  Client facing function to add VDEnc Pipe Control State command in command buffer
2238     //! \param    PMOS_COMMAND_BUFFER  cmdBuffer
2239     //!           [in] Command buffer to which HW command is added
2240     //! \param    PMHW_VDBOX_VDENC_CONTROL_STATE_PARAMS params
2241     //!           [in] Params structure used to populate the HW command
2242     //! \return   MOS_STATUS
2243     //!           MOS_STATUS_SUCCESS if success, else fail reason
2244     //!
AddVdencControlStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_VDENC_CONTROL_STATE_PARAMS params)2245     MOS_STATUS AddVdencControlStateCmd(
2246         PMOS_COMMAND_BUFFER                   cmdBuffer,
2247         PMHW_VDBOX_VDENC_CONTROL_STATE_PARAMS params)
2248     {
2249         MHW_FUNCTION_ENTER;
2250 
2251         MHW_MI_CHK_NULL(this->m_osInterface);
2252         MHW_MI_CHK_NULL(cmdBuffer);
2253         MHW_MI_CHK_NULL(params);
2254 
2255         typename TVdencCmds::VDENC_CONTROL_STATE_CMD    cmd;
2256 
2257 
2258         if (params->bVdencInitialization)
2259         {
2260             cmd.DW1.VdencInitialization     = 1;
2261         }
2262         else
2263         {
2264             MHW_ASSERTMESSAGE("Invalid parameter for VDENC_CONTROL_STATE.");
2265             return MOS_STATUS_INVALID_PARAMETER;
2266         }
2267 
2268         MHW_MI_CHK_STATUS(this->m_osInterface->pfnAddCommand(cmdBuffer, &cmd, sizeof(cmd)));
2269 
2270         return MOS_STATUS_SUCCESS;
2271     }
2272 
CreateMhwVdboxPipeModeSelectParams()2273     PMHW_VDBOX_PIPE_MODE_SELECT_PARAMS CreateMhwVdboxPipeModeSelectParams() override
2274     {
2275         auto pipeModeSelectParams = MOS_New(MHW_VDBOX_PIPE_MODE_SELECT_PARAMS_G12);
2276 
2277         return pipeModeSelectParams;
2278     }
2279 
ReleaseMhwVdboxPipeModeSelectParams(PMHW_VDBOX_PIPE_MODE_SELECT_PARAMS pipeModeSelectParams)2280     void ReleaseMhwVdboxPipeModeSelectParams(PMHW_VDBOX_PIPE_MODE_SELECT_PARAMS pipeModeSelectParams) override
2281     {
2282         MOS_Delete(pipeModeSelectParams);
2283     }
2284 };
2285 
2286 //!  MHW Vdbox Vdenc interface for Gen12 X
2287 /*!
2288 This class defines the Vdenc command construction functions for Gen12 common platforms
2289 */
2290 class MhwVdboxVdencInterfaceG12X : public MhwVdboxVdencInterfaceG12<mhw_vdbox_vdenc_g12_X>
2291 {
2292 public:
2293         //!
2294     //! \brief  Constructor
2295     //!
MhwVdboxVdencInterfaceG12X(PMOS_INTERFACE osInterface)2296     MhwVdboxVdencInterfaceG12X(PMOS_INTERFACE osInterface) : MhwVdboxVdencInterfaceG12(osInterface)
2297     {
2298         MHW_FUNCTION_ENTER;
2299     }
2300 
GetVdencCmd1Size()2301     inline uint32_t GetVdencCmd1Size() override
2302     {
2303         return mhw_vdbox_vdenc_g12_X::VDENC_CMD1_CMD::byteSize;
2304     }
2305 
GetVdencCmd2Size()2306     inline uint32_t GetVdencCmd2Size() override
2307     {
2308         return mhw_vdbox_vdenc_g12_X::VDENC_CMD2_CMD::byteSize;
2309     }
2310 
2311     //!
2312     //! \brief    Destructor
2313     //!
~MhwVdboxVdencInterfaceG12X()2314     virtual ~MhwVdboxVdencInterfaceG12X()
2315     {
2316         MHW_FUNCTION_ENTER;
2317     }
2318 
AddVdencCmd1Cmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_BATCH_BUFFER batchBuffer,PMHW_VDBOX_VDENC_CMD1_PARAMS params)2319     MOS_STATUS AddVdencCmd1Cmd(
2320         PMOS_COMMAND_BUFFER                  cmdBuffer,
2321         PMHW_BATCH_BUFFER                    batchBuffer,
2322         PMHW_VDBOX_VDENC_CMD1_PARAMS  params) override
2323     {
2324         MHW_FUNCTION_ENTER;
2325 
2326         MHW_MI_CHK_NULL(params);
2327 
2328         typename mhw_vdbox_vdenc_g12_X::VDENC_CMD1_CMD cmd;
2329 
2330         cmd.DW22.Value = 0x10101010;
2331         cmd.DW23.Value = 0x10101010;
2332         cmd.DW24.Value = 0x10101010;
2333         cmd.DW25.Value = 0x10101010;
2334         cmd.DW26.Value = 0x10101010;
2335         cmd.DW27.Value = 0x10101010;
2336         cmd.DW28.Value = 0x10101010;
2337         cmd.DW29.Value = 0x10101010;
2338         if (params->Mode == CODECHAL_ENCODE_MODE_HEVC)
2339         {
2340             MHW_MI_CHK_NULL(params->pHevcEncPicParams);
2341             auto hevcPicParams = params->pHevcEncPicParams;
2342             MHW_MI_CHK_NULL(params->pHevcEncSlcParams);
2343             auto hevcSlcParams = params->pHevcEncSlcParams;
2344 
2345             const uint32_t table1[3] = {0x5030200,0x5030200,0x5030200};
2346             const uint8_t indexTable1[3] = {0,1,2};
2347             cmd.DW1.Value = table1[indexTable1[hevcPicParams->CodingType - 1]];
2348             const uint32_t table2[3] = {0xb090806,0xb090806,0xb090806};
2349             const uint8_t indexTable2[3] = {0,1,2};
2350             cmd.DW2.Value = table2[indexTable2[hevcPicParams->CodingType - 1]];
2351 
2352             cmd.DW3.Value = 0x1c140c04;
2353             cmd.DW4.Value = 0x3c342c24;
2354             cmd.DW5.Value = 0x5c544c44;
2355             cmd.DW6.Value = 0x1c140c04;
2356             cmd.DW7.Value = 0x3c342c24;
2357             cmd.DW8.Value = 0x5c544c44;
2358             cmd.DW14.Value = 0x0;
2359             cmd.DW15.Value = 0x0;
2360             cmd.DW16.Value &= 0xffff0000;
2361             cmd.DW19.Value = (cmd.DW19.Value & 0xff0000ff) | 0x140400;
2362             cmd.DW20.Value = 0x14141414;
2363             cmd.DW21.Value = 0x14141414;
2364             if (params->bHevcVisualQualityImprovement)
2365             {
2366                 auto qpPrimeYac = CodecHal_Clip3(10, 51, hevcPicParams->QpY + hevcSlcParams->slice_qp_delta);
2367                 if (qpPrimeYac >= 22 && qpPrimeYac <= 51)
2368                 {
2369                     const uint32_t table3[30] = {0x0,0x60000,0xc0000,0x120000,0x190000,0x1f0000,0x250000,0x2c0000,0x320000,0x380000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000,0x3f0000};
2370                     cmd.DW14.Value = (cmd.DW14.Value & 0xff00ffff) |table3[qpPrimeYac - 22];
2371                 }
2372             }
2373 
2374             if (params->pHevcEncPicParams->CodingType == I_TYPE)
2375             {
2376                 cmd.DW10.Value = 0x23131f0f;
2377                 cmd.DW11.Value = (cmd.DW11.Value & 0xffff0000) | 0x2313;
2378                 cmd.DW12.Value = 0x3e5c445c;
2379                 cmd.DW13.Value = (cmd.DW13.Value & 0xff00) | 0x1e040044;
2380                 cmd.DW16.Value = (cmd.DW16.Value & 0xffff) | 0x70000;
2381                 cmd.DW17.Value = 0xd0e1007;
2382                 cmd.DW18.Value = (cmd.DW18.Value & 0xffffff00) | 0x32;
2383                 cmd.DW18.Value = (cmd.DW18.Value & 0xffff00ff) | (hevcPicParams->NumROI ? 0 : 0x1e00);
2384                 cmd.DW30.Value = (cmd.DW30.Value & 0xff000000) | 0x101010;
2385             }
2386             else if (params->pHevcEncPicParams->CodingType == B_TYPE)
2387             {
2388                 cmd.DW10.Value = 0x23131f0f;
2389                 cmd.DW11.Value = 0x331b2313;
2390                 cmd.DW12.Value = 0x476e4d6e;
2391                 cmd.DW13.Value = 0x3604004d;
2392                 cmd.DW16.Value = (cmd.DW16.Value & 0xffff) | 0x4150000;
2393                 cmd.DW17.Value = 0x23231415;
2394                 cmd.DW18.Value = (cmd.DW18.Value & 0xffffff00) | 0x3f;
2395                 cmd.DW18.Value = (cmd.DW18.Value & 0xffff00ff) | (hevcPicParams->NumROI ? 0 : 0x4400);
2396                 cmd.DW30.Value = (cmd.DW30.Value & 0xff000000) | 0x232323;
2397             }
2398         }
2399         else if (params->Mode == CODECHAL_ENCODE_MODE_VP9)
2400         {
2401             MHW_MI_CHK_NULL(params->pVp9EncPicParams);
2402 
2403             auto vp9PicParams = params->pVp9EncPicParams;
2404             auto qp = vp9PicParams->LumaACQIndex;
2405             auto vp9FrameType = vp9PicParams->PicFlags.fields.frame_type;
2406 
2407             const uint32_t table1[2][256] = {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,
2408                                             0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0};
2409             const uint8_t indexTable1[2] = {0,1};
2410             cmd.DW1.Value = table1[indexTable1[vp9FrameType]][qp];
2411             const uint32_t table2[2][256] = {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,
2412                                             0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0};
2413             const uint8_t indexTable2[2] = {0,1};
2414             cmd.DW2.Value = table2[indexTable2[vp9FrameType]][qp];
2415 
2416             cmd.DW3.Value = 0x1a130b04;
2417             cmd.DW4.Value = 0x3f312922;
2418             cmd.DW5.Value = 0x7164584b;
2419             cmd.DW6.Value = 0x1a130b04;
2420             cmd.DW7.Value = 0x3f312922;
2421             cmd.DW8.Value = 0x7164584b;
2422             cmd.DW20.Value = 0xc0c0c0c;
2423             cmd.DW21.Value = 0xc0c0c0c;
2424             cmd.DW22.Value = 0x10101010;
2425             cmd.DW23.Value = 0x10101010;
2426             cmd.DW24.Value = 0x10101010;
2427             cmd.DW25.Value = 0x10101010;
2428             cmd.DW26.Value = 0x10101010;
2429             cmd.DW27.Value = 0x10101010;
2430             cmd.DW28.Value = 0x10101010;
2431             cmd.DW29.Value = 0x10101010;
2432             if(vp9FrameType == CODEC_VP9_KEY_FRAME)
2433             {
2434                 cmd.DW9.Value &= 0xff000000;
2435                 cmd.DW10.Value = 0x0;
2436                 cmd.DW11.Value = 0x0;
2437                 cmd.DW12.Value = 0x0;
2438                 cmd.DW13.Value = 0x32000000;
2439                 cmd.DW14.Value = 0x1f5e0000;
2440                 cmd.DW15.Value = 0x1f5e0000;
2441                 cmd.DW16.Value = (cmd.DW16.Value & 0xff000000) | 0x4b0000;
2442                 cmd.DW17.Value = 0x3219194b;
2443                 cmd.DW18.Value = 0x4b5e0026;
2444                 cmd.DW19.Value = (cmd.DW19.Value & 0xff) | 0x7d7d0000;
2445             }
2446             else
2447             {
2448                 cmd.DW9.Value = (cmd.DW9.Value & 0xff000000) | 0x26191f;
2449                 cmd.DW10.Value = 0x1e0b1e0b;
2450                 cmd.DW11.Value = 0x19001e0b;
2451                 cmd.DW12.Value = 0x19321f4b;
2452                 cmd.DW13.Value = 0x4404001f;
2453                 cmd.DW14.Value = 0x30900000;
2454                 cmd.DW15.Value = 0x30900000;
2455                 cmd.DW16.Value = (cmd.DW16.Value & 0xff000000) | 0x260000;
2456                 cmd.DW17.Value = 0x13194b26;
2457                 cmd.DW18.Value = 0x3f5e0d5e;
2458                 cmd.DW19.Value = (cmd.DW19.Value & 0xff) | 0x4e320f00;
2459             }
2460         }
2461 
2462         if (cmdBuffer == nullptr && batchBuffer == nullptr)
2463         {
2464             MHW_ASSERTMESSAGE("There was no valid buffer to add the HW command to.");
2465             return MOS_STATUS_NULL_POINTER;
2466         }
2467 
2468         MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(this->m_osInterface, cmdBuffer, batchBuffer, &cmd, sizeof(cmd)));
2469 
2470         return MOS_STATUS_SUCCESS;
2471     }
2472 
AddVdencCmd2Cmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_BATCH_BUFFER batchBuffer,PMHW_VDBOX_VDENC_CMD2_STATE params)2473     MOS_STATUS AddVdencCmd2Cmd(
2474         PMOS_COMMAND_BUFFER                 cmdBuffer,
2475         PMHW_BATCH_BUFFER                   batchBuffer,
2476         PMHW_VDBOX_VDENC_CMD2_STATE params) override
2477     {
2478         MHW_FUNCTION_ENTER;
2479 
2480         MHW_MI_CHK_NULL(params);
2481         auto extParams = std::static_pointer_cast<MHW_VDBOX_VDENC_CMD2_STATE>(params);
2482         MHW_MI_CHK_NULL(extParams);
2483 
2484         typename mhw_vdbox_vdenc_g12_X::VDENC_CMD2_CMD cmd;
2485 
2486         cmd.DW2.Value = (cmd.DW2.Value & 0xdff00000) | 0x2005aff3;
2487         cmd.DW3.Value = 0xfe02ff01;
2488         cmd.DW4.Value = 0xfc04fd03;
2489         cmd.DW5.Value = (cmd.DW5.Value & 0xff7e03ff) | 0x80ac00;
2490         cmd.DW7.Value = (cmd.DW7.Value & 0xffd90ff0) | 0x62003;
2491         cmd.DW9.Value = (cmd.DW9.Value & 0xffff) | 0x43840000;
2492         cmd.DW12.Value = 0xffffffff;
2493         cmd.DW15.Value = 0x4e201f40;
2494         cmd.DW16.Value = (cmd.DW16.Value & 0xf0ff0000) | 0xf003300;
2495         cmd.DW17.Value = (cmd.DW17.Value & 0xfff00000) | 0x2710;
2496         cmd.DW19.Value = (cmd.DW19.Value & 0x80ffffff) | 0x18000000;
2497         cmd.DW21.Value &= 0xfffffff;
2498         cmd.DW22.Value = 0x1f001102;
2499         cmd.DW23.Value = 0xaaaa1f00;
2500         cmd.DW27.Value = (cmd.DW27.Value & 0xffff0000) | 0x1a1a;
2501         if (params->pHevcEncPicParams && params->pHevcEncSeqParams)
2502         {
2503             MHW_MI_CHK_NULL(params->pHevcEncSeqParams);
2504             MHW_MI_CHK_NULL(params->pHevcEncPicParams);
2505             MHW_MI_CHK_NULL(params->pHevcEncSlcParams);
2506             auto hevcSeqParams = params->pHevcEncSeqParams;
2507             auto hevcPicParams = params->pHevcEncPicParams;
2508             auto hevcSlcParams = params->pHevcEncSlcParams;
2509 
2510             bool vdencROIEnabled = params->bROIStreamInEnabled;
2511             bool vdencStreamInEnabled = params->bStreamInEnabled;
2512 
2513             cmd.DW1.FrameWidthInPixelsMinusOne = ((hevcSeqParams->wFrameWidthInMinCbMinus1 + 1) <<
2514                 (hevcSeqParams->log2_min_coding_block_size_minus3 + 3)) - 1;
2515             cmd.DW1.FrameHeightInPixelsMinusOne = ((hevcSeqParams->wFrameHeightInMinCbMinus1 + 1) <<
2516                 (hevcSeqParams->log2_min_coding_block_size_minus3 + 3)) - 1;
2517 
2518             cmd.DW2.PictureType = (hevcPicParams->CodingType == I_TYPE) ? 0 : (extParams->bIsLowDelayB ? 3 : 2);
2519             cmd.DW2.TemporalMvpEnableFlag = (hevcPicParams->CodingType == I_TYPE) ? 0 : params->pHevcEncSeqParams->sps_temporal_mvp_enable_flag;
2520             cmd.DW2.TransformSkip = hevcPicParams->transform_skip_enabled_flag;
2521 
2522             cmd.DW5.NumRefIdxL0Minus1 = hevcSlcParams->num_ref_idx_l0_active_minus1;
2523             cmd.DW5.NumRefIdxL1Minus1 = hevcSlcParams->num_ref_idx_l1_active_minus1;
2524 
2525             cmd.DW5.Value = (cmd.DW5.Value & 0xff83ffff) | 0x400000;
2526             cmd.DW14.Value = (cmd.DW14.Value & 0xffff) | 0x7d00000;
2527             cmd.DW15.Value = 0x4e201f40;
2528             cmd.DW17.Value = (cmd.DW17.Value & 0xfff00000) | 0x2710;
2529             cmd.DW18.Value = (cmd.DW18.Value & 0xffff) | 0x600000;
2530             cmd.DW19.Value = (cmd.DW19.Value & 0xffff0000) | 0xc0;
2531             cmd.DW20.Value &= 0xfffeffff;
2532             cmd.DW7.TilingEnable = hevcPicParams->tiles_enabled_flag;
2533             cmd.DW37.TileReplayEnable = extParams->bTileReplayEnable;
2534 
2535             if (hevcPicParams->CodingType != I_TYPE)
2536             {
2537                 uint8_t   refFrameId;
2538                 int8_t    diffPoc;
2539 
2540                 refFrameId = hevcSlcParams->RefPicList[0][0].FrameIdx;
2541                 diffPoc = ((refFrameId >= CODEC_MAX_NUM_REF_FRAME_HEVC) ? 0x0 : hevcPicParams->RefFramePOCList[refFrameId]) - hevcPicParams->CurrPicOrderCnt;
2542                 cmd.DW3.PocNumberForRefid0InL0    = CodecHal_Clip3(-16, 16, -diffPoc);
2543                 cmd.DW2.LongTermReferenceFlagsL0  = (refFrameId >= CODEC_MAX_NUM_REF_FRAME_HEVC) ? 0 : CodecHal_PictureIsLongTermRef(hevcPicParams->RefFrameList[refFrameId]);
2544                 refFrameId = hevcSlcParams->RefPicList[0][1].FrameIdx;
2545                 diffPoc = ((refFrameId >= CODEC_MAX_NUM_REF_FRAME_HEVC) ? 0x0 : hevcPicParams->RefFramePOCList[refFrameId]) - hevcPicParams->CurrPicOrderCnt;
2546                 cmd.DW3.PocNumberForRefid1InL0    = CodecHal_Clip3(-16, 16, -diffPoc);
2547                 cmd.DW2.LongTermReferenceFlagsL0 |= ((refFrameId >= CODEC_MAX_NUM_REF_FRAME_HEVC) ? 0 : CodecHal_PictureIsLongTermRef(hevcPicParams->RefFrameList[refFrameId])) << 1;
2548                 refFrameId = hevcSlcParams->RefPicList[0][2].FrameIdx;
2549                 diffPoc                        = ((refFrameId >= CODEC_MAX_NUM_REF_FRAME_HEVC) ? 0x0 : hevcPicParams->RefFramePOCList[refFrameId]) - hevcPicParams->CurrPicOrderCnt;
2550                 cmd.DW4.PocNumberForRefid2InL0 = CodecHal_Clip3(-16, 16, -diffPoc);
2551                 cmd.DW2.LongTermReferenceFlagsL0 |= ((refFrameId >= CODEC_MAX_NUM_REF_FRAME_HEVC) ? 0 : CodecHal_PictureIsLongTermRef(hevcPicParams->RefFrameList[refFrameId])) << 2;
2552 
2553                 refFrameId = hevcSlcParams->RefPicList[1][0].FrameIdx;
2554                 diffPoc                          = ((refFrameId >= CODEC_MAX_NUM_REF_FRAME_HEVC) ? 0x0 : hevcPicParams->RefFramePOCList[refFrameId]) - hevcPicParams->CurrPicOrderCnt;
2555                 cmd.DW3.PocNumberForRefid0InL1   = CodecHal_Clip3(-16, 16, -diffPoc);
2556                 if (refFrameId >= CODEC_MAX_NUM_REF_FRAME_HEVC)
2557                 {
2558                     return MOS_STATUS_INVALID_PARAMETER;
2559                 }
2560                 cmd.DW2.LongTermReferenceFlagsL1 = CodecHal_PictureIsLongTermRef(hevcPicParams->RefFrameList[refFrameId]);
2561 
2562                 cmd.DW3.PocNumberForRefid1InL1 = cmd.DW3.PocNumberForRefid1InL0;
2563                 cmd.DW4.PocNumberForRefid2InL1 = cmd.DW4.PocNumberForRefid2InL0;
2564                 cmd.DW5.SubPelMode = (params->bEnableSubPelMode) ? params->SubPelMode : 3;
2565             }
2566             else
2567             {
2568                 cmd.DW3.Value = cmd.DW4.Value = 0;
2569             }
2570 
2571             switch (hevcSeqParams->TargetUsage)
2572             {
2573             case 1:                                 // Quality mode
2574                 cmd.DW2.Value &= 0xdfffffff;
2575                 cmd.DW2.Value = (cmd.DW2.Value & 0xfffffffc) | (hevcPicParams->CodingType == I_TYPE ? 2 : 3);
2576                 cmd.DW7.Value &= 0xfffffeff;
2577                 cmd.DW7.Value = (cmd.DW7.Value & 0xfffff7ff) | (hevcPicParams->CodingType == I_TYPE ? 0x800 : 0);
2578                 cmd.DW9.Value = (cmd.DW9.Value & 0xfffff) | 0x43800000;
2579                 cmd.DW12.Value = 0xffffffff;
2580                 cmd.DW34.Value = (cmd.DW34.Value & 0xffffff) | 0x21000000;
2581                 break;
2582             case 4:                                 // Normal mode
2583                 cmd.DW2.Value &= 0xdfffffff;
2584                 cmd.DW7.Value &= 0xfffffeff;
2585                 cmd.DW9.Value = (cmd.DW9.Value & 0xfffff) | 0x43800000;
2586                 cmd.DW12.Value = 0xce4014a0;
2587                 cmd.DW34.Value = (cmd.DW34.Value & 0xffffff) | 0x21000000;
2588                 break;
2589             case 7:                                 // Speed mode
2590                 cmd.DW2.Value = (cmd.DW2.Value & 0xdfffffff) | 0x20000000;
2591                 cmd.DW7.Value = (cmd.DW7.Value & 0xfff7feff) | 0x80100;
2592                 cmd.DW9.Value = (cmd.DW9.Value & 0xffff) | 0x22420000;
2593                 cmd.DW12.Value = 0x89800dc0;
2594                 cmd.DW34.Value = (cmd.DW34.Value & 0xffffff) | 0x20000000;
2595                 break;
2596             default:
2597                 MHW_ASSERTMESSAGE("Invalid TU provided!");
2598                 return MOS_STATUS_INVALID_PARAMETER;
2599             }
2600 
2601             if (hevcSlcParams->num_ref_idx_l0_active_minus1 == 0)
2602             {
2603                 cmd.DW7.Value = (cmd.DW7.Value & 0xfff7ffff) | 0x80000;
2604             }
2605 
2606             if (!extParams->bIsLowDelayB)
2607             {
2608                 cmd.DW7.Value &= 0xfff7feff;
2609             }
2610 
2611             cmd.DW7.VdencStreamInEnable = vdencStreamInEnabled;
2612             cmd.DW7.PakOnlyMultiPassEnable = params->bPakOnlyMultipassEnable;
2613 
2614             if (extParams->bIsLowDelayB)
2615             {
2616                 cmd.DW8.Value = 0;
2617                 cmd.DW9.Value &= 0xffff0000;
2618             }
2619             else
2620             {
2621                 cmd.DW8.Value = 0x54555555;
2622                 cmd.DW9.Value = (cmd.DW9.Value & 0xffff0000) | 0x5555;
2623             }
2624 
2625             cmd.DW16.MinQp = hevcPicParams->BRCMinQp < 0x0a ? 10 : hevcPicParams->BRCMinQp;
2626             cmd.DW16.MaxQp = hevcPicParams->BRCMaxQp < 0x0a ? 51 : (hevcPicParams->BRCMaxQp > 0x33 ? 0x33 : hevcPicParams->BRCMaxQp);
2627             cmd.DW17.TemporalMVEnableForIntegerSearch = cmd.DW2.TemporalMvpEnableFlag & extParams->bIsLowDelayB;
2628 
2629             if (vdencROIEnabled)
2630             {
2631                 int8_t priorityLevelOrDQp[ENCODE_VDENC_HEVC_MAX_STREAMINROI_G10] = { 0 };
2632 
2633                 cmd.DW5.StreaminRoiEnable = vdencROIEnabled;
2634 
2635                 for (uint8_t i = 0; i < ENCODE_VDENC_HEVC_MAX_STREAMINROI_G10; i++)
2636                 {
2637                     priorityLevelOrDQp[i] = (int8_t)CodecHal_Clip3(
2638                         ENCODE_VDENC_HEVC_MIN_ROI_DELTA_QP_G10, ENCODE_VDENC_HEVC_MAX_ROI_DELTA_QP_G10, hevcPicParams->ROIDistinctDeltaQp[i]);
2639                 }
2640 
2641                 cmd.DW13.RoiQpAdjustmentForZone1Stage3 = priorityLevelOrDQp[0];
2642                 cmd.DW13.RoiQpAdjustmentForZone2Stage3 = priorityLevelOrDQp[1];
2643                 cmd.DW13.RoiQpAdjustmentForZone3Stage3 = priorityLevelOrDQp[2];
2644             }
2645 
2646             if ((hevcPicParams->bEnableRollingIntraRefresh) && (hevcPicParams->CodingType != I_TYPE))
2647             {
2648                 uint32_t rollingILimit = (hevcPicParams->bEnableRollingIntraRefresh == ROLLING_I_ROW) ?
2649                     MOS_ROUNDUP_DIVIDE(cmd.DW1.FrameHeightInPixelsMinusOne + 1, 32) :
2650                     MOS_ROUNDUP_DIVIDE(cmd.DW1.FrameWidthInPixelsMinusOne + 1, 32);
2651 
2652                 cmd.DW7.Value = (cmd.DW7.Value & 0xfffffbff) | 0x400;
2653                 cmd.DW7.Value = (cmd.DW7.Value & 0xfffffbff) | ((hevcSeqParams->TargetUsage == 1) ? 0x400 : 0);
2654                 cmd.DW21.Value = (cmd.DW21.Value & 0xfdffffff) | 0x2000000;
2655                 cmd.DW21.QpAdjustmentForRollingI = MOS_CLAMP_MIN_MAX(hevcPicParams->QpDeltaForInsertedIntra, -8, 7);
2656                 cmd.DW21.IntraRefreshMode = (hevcPicParams->bEnableRollingIntraRefresh == ROLLING_I_ROW) ? 0 : 1;
2657                 cmd.DW21.IntraRefreshMBSizeMinusOne = hevcPicParams->IntraInsertionSize - 1;
2658                 cmd.DW21.IntraRefreshPos = hevcPicParams->IntraInsertionLocation;
2659                 cmd.DW36.IntraRefreshBoundaryRef0 = CodecHal_Clip3(0, rollingILimit, hevcPicParams->RollingIntraReferenceLocation[0] - 1);
2660                 cmd.DW36.IntraRefreshBoundaryRef1 = CodecHal_Clip3(0, rollingILimit, hevcPicParams->RollingIntraReferenceLocation[1] - 1);
2661                 cmd.DW36.IntraRefreshBoundaryRef2 = CodecHal_Clip3(0, rollingILimit, hevcPicParams->RollingIntraReferenceLocation[2] - 1);
2662             }
2663 
2664             const uint32_t table1[3][42] = {0x30002,0x30002,0x30002,0x30003,0x40004,0x40005,0x50006,0x60008,0x6000a,0x7000c,0x8000f,0x90013,0xa0018,0xb001e,0xc0026,0xe0030,0x10003d,0x12004d,0x140061,0x16007a,0x19009a,0x1c00c2,0x1f00f4,0x230133,0x270183,0x2c01e8,0x320266,0x380306,0x3e03cf,0x4604cd,0x4f060c,0x58079f,0x63099a,0x6f0c18,0x7d0f3d,0x8c1333,0x9d1831,0xb11e7a,0xc62666,0xdf3062,0xfa3cf5,0x1184ccd,
2665                                            0x30003,0x30003,0x30003,0x40003,0x40004,0x50005,0x50007,0x60008,0x6000a,0x7000d,0x80011,0x90015,0xa001a,0xb0021,0xd002a,0xe0034,0x100042,0x120053,0x140069,0x170084,0x1a00a6,0x1d00d2,0x210108,0x24014d,0x2901a3,0x2e0210,0x34029a,0x3a0347,0x410421,0x490533,0x52068d,0x5c0841,0x670a66,0x740d1a,0x821082,0x9214cd,0xa41a35,0xb82105,0xce299a,0xe8346a,0x1044209,0x1245333,
2666                                            0x30003,0x30003,0x30003,0x40003,0x40004,0x50005,0x50007,0x60008,0x6000a,0x7000d,0x80011,0x90015,0xa001a,0xb0021,0xd002a,0xe0034,0x100042,0x120053,0x140069,0x170084,0x1a00a6,0x1d00d2,0x210108,0x24014d,0x2901a3,0x2e0210,0x34029a,0x3a0347,0x410421,0x490533,0x52068d,0x5c0841,0x670a66,0x740d1a,0x821082,0x9214cd,0xa41a35,0xb82105,0xce299a,0xe8346a,0x1044209,0x1245333};
2667             const uint8_t indexTable1[3] = {0,1,2};
2668             cmd.DW26.Value = (cmd.DW26.Value & 0xfe000000) | table1[indexTable1[hevcPicParams->CodingType - 1]][hevcPicParams->QpY + hevcSlcParams->slice_qp_delta - 10];
2669 
2670             if (params->bHevcVisualQualityImprovement)
2671             {
2672                 auto qpPrimeYac = CodecHal_Clip3(10, 51, hevcPicParams->QpY + hevcSlcParams->slice_qp_delta);
2673                 if (qpPrimeYac >= 22 && qpPrimeYac <= 51 && hevcSlcParams->slice_type == SLICE_I)
2674                 {
2675                     const uint32_t table2[3][30] = {0xa,0xb,0xd,0xf,0x11,0x14,0x17,0x1a,0x1e,0x22,0x27,0x2d,0x33,0x3b,0x43,0x4d,0x57,0x64,0x72,0x82,0x95,0xa7,0xbb,0xd2,0xec,0x109,0x129,0x14e,0x177,0x1a5,
2676                                                     0xa,0xc,0xe,0x10,0x12,0x15,0x18,0x1b,0x1f,0x23,0x29,0x2f,0x35,0x3d,0x46,0x50,0x5b,0x68,0x77,0x88,0x9b,0xae,0xc3,0xdb,0xf6,0x114,0x136,0x15c,0x186,0x1b6,
2677                                                     0xa,0xc,0xe,0x10,0x12,0x15,0x18,0x1b,0x1f,0x23,0x29,0x2f,0x35,0x3d,0x46,0x50,0x5b,0x68,0x77,0x88,0x9b,0xae,0xc3,0xdb,0xf6,0x114,0x136,0x15c,0x186,0x1b6};
2678                     const uint8_t indexTable2[3] = {0,1,2};
2679                     cmd.DW26.SadQpLambda  = table2[indexTable2[hevcPicParams->CodingType - 1]][qpPrimeYac - 22];
2680                 }
2681 
2682                 if (hevcPicParams->QpY >= 22 && hevcPicParams->QpY <= 51)
2683                 {
2684                     cmd.DW6.Value = (cmd.DW6.Value & 0xc00fffff) | 0x1fb00000;
2685                 }
2686             }
2687             cmd.DW27.QpPrimeYAc = hevcPicParams->QpY + hevcSlcParams->slice_qp_delta;
2688             cmd.DW27.Value &= 0xffffff00;
2689             cmd.DW35.Value = (cmd.DW35.Value & 0xfffff0ff) | 0x700;
2690 
2691             if (params->bUseDefaultQpDeltas)
2692             {
2693                 cmd.DW13.Value = (cmd.DW13.Value & 0xffff) | 0xf0120000;
2694                 if (hevcPicParams->CodingType == I_TYPE)
2695                 {
2696                     cmd.DW14.Value = (cmd.DW14.Value & 0xffff0000) | 0x21db;
2697                     cmd.DW16.Value = (cmd.DW16.Value & 0xf00ffff) | 0x10000;
2698                     cmd.DW18.Value = 0x600000;
2699                     cmd.DW19.Value = (cmd.DW19.Value & 0xffff0000) | 0xc0;
2700                 }
2701                 else // LDB frames
2702                 {
2703                     cmd.DW14.Value = (cmd.DW14.Value & 0xffff0000) | 0x21ed;
2704                     cmd.DW16.Value = (cmd.DW16.Value & 0xf00ffff) | 0xd0010000;
2705                     cmd.DW18.Value = 0x60010f;
2706                     cmd.DW19.Value = (cmd.DW19.Value & 0xffff0000) | 0xc0;
2707                 }
2708             }
2709 
2710             if (params->bRoundingEnabled)
2711             {
2712                 cmd.DW28.Value = 0x7d00fa0;
2713                 cmd.DW29.Value = 0x2bc0bb8;
2714                 cmd.DW30.Value = 0x32003e8;
2715                 cmd.DW31.Value = 0x1f4012c;
2716                 cmd.DW32.Value = (cmd.DW32.Value & 0xffff0000) | 0x190;
2717 
2718                 const uint32_t table3[3][3] = {0x88220000,0x99220000,0xaa220000,
2719                                               0x88330000,0x99330000,0xaa330000,
2720                                               0x88440000,0x99440000,0xaa440000};
2721                 cmd.DW32.Value = (cmd.DW32.Value & 0xffff) | table3[params->roundInterValue - 2][params->roundIntraValue - 8];
2722 
2723                 const uint32_t table4[3][3] = {0x22882222,0x22992222,0x22aa2222,
2724                                               0x33883333,0x33993333,0x33aa3333,
2725                                               0x44884444,0x44994444,0x44aa4444};
2726                 cmd.DW33.Value = table4[params->roundInterValue - 2][params->roundIntraValue - 8];
2727 
2728                 const uint32_t table5[3][3] = {0x228822,0x229922,0x22aa22,
2729                                               0x338833,0x339933,0x33aa33,
2730                                               0x448844,0x449944,0x44aa44};
2731                 cmd.DW34.Value = (cmd.DW34.Value & 0xff000000) | table5[params->roundInterValue - 2][params->roundIntraValue - 8];
2732             }
2733 
2734             if (hevcPicParams->pps_curr_pic_ref_enabled_flag)
2735             {
2736                 cmd.DW5.NumRefIdxL0Minus1++;
2737                 cmd.DW35.Value &= 0xffff1fff;
2738                 cmd.DW37.Value = (cmd.DW37.Value & 0xffffff9f) | 0x40;
2739 
2740                 if (hevcPicParams->CodingType == I_TYPE)
2741                 {
2742                     cmd.DW2.Value = (cmd.DW2.Value & 0xf8fffffc) | 0x1000002;
2743                     cmd.DW3.Value &= 0xffffff00;
2744                     cmd.DW5.Value &= 0xf0ffffff;
2745                 }
2746                 else
2747                 {
2748                     switch (cmd.DW5.NumRefIdxL0Minus1)
2749                     {
2750                     case 0:
2751                         cmd.DW2.Value |= 0x1000000;
2752                         cmd.DW3.Value &= 0xffffff00;
2753                         break;
2754                     case 1:
2755                         cmd.DW2.Value |= 0x2000000;
2756                         cmd.DW3.Value &= 0xff00ffff;
2757                         break;
2758                     case 2:
2759                         cmd.DW2.Value |= 0x4000000;
2760                         cmd.DW4.Value &= 0xffffff00;
2761                         break;
2762                     case 3:
2763                         cmd.DW2.Value |= 0x0;
2764                         cmd.DW4.Value &= 0xff00ffff;
2765                         break;
2766                     default:
2767                         MHW_ASSERTMESSAGE("Invalid NumRefIdxL0");
2768                         return MOS_STATUS_INVALID_PARAMETER;
2769                     }
2770                 }
2771             }
2772             if (hevcSeqParams->palette_mode_enabled_flag)
2773             {
2774                 cmd.DW37.Value &= 0xffe0ffe0;
2775                 cmd.DW38.Value &= 0xffffffbf;
2776                 uint32_t index = hevcSeqParams->bit_depth_luma_minus8 == 0 ? 0 : 1;
2777                 const uint32_t table1[2] = {0x8000fc,0x20003f0};
2778                 cmd.DW39.Value = table1[index];
2779 
2780                 const uint32_t table2[2] = {0xb10080,0x2c40200};
2781                 cmd.DW40.Value = table2[index];
2782 
2783                 const uint32_t table3[2] = {0x300aa,0xc02a8};
2784                 cmd.DW41.Value = table3[index];
2785 
2786                 const uint32_t table4[2] = {0xd30069,0x34c01a4};
2787                 cmd.DW42.Value = table4[index];
2788                 const uint32_t table5[2] = {0xe000e9,0x38003a4};
2789                 cmd.DW43.Value = table5[index];
2790 
2791                 const uint32_t table6[2] = {0x940003,0x250000c};
2792                 cmd.DW44.Value = table6[index];
2793 
2794                 const uint32_t table7[2] = {0x56004d,0x1580134};
2795                 cmd.DW45.Value = table7[index];
2796                 const uint32_t table8[2] = {0x9500fd,0x25403f4};
2797                 cmd.DW46.Value = table8[index];
2798 
2799                 const uint32_t table9[2] = {0x17002d,0x5c00b4};
2800                 cmd.DW47.Value = table9[index];
2801 
2802                 const uint32_t table10[2] = {0xfd001f,0x3f4007c};
2803                 cmd.DW48.Value = table10[index];
2804                 const uint32_t table11[2] = {0x2006c,0x801b0};
2805                 cmd.DW49.Value = table11[index];
2806 
2807                 const uint32_t table12[2] = {0x800080,0x2000200};
2808                 cmd.DW50.Value = table12[index];
2809             }
2810 
2811             MHW_MI_CHK_NULL(extParams->pRefIdxMapping);
2812             for (int i = 0; i < params->ucNumRefIdxL0ActiveMinus1 + 1; i++)
2813             {
2814                 uint8_t refFrameIDx = hevcSlcParams->RefPicList[0][i].FrameIdx;
2815                 if (refFrameIDx < CODEC_MAX_NUM_REF_FRAME_HEVC)
2816                 {
2817                     *((uint8_t *)&cmd.DW11.Value + i) = *(extParams->pRefIdxMapping + refFrameIDx);
2818                 }
2819             }
2820             for (int i = params->ucNumRefIdxL0ActiveMinus1 + 1; i < 3; i++)
2821             {
2822                 *((uint8_t *)&cmd.DW11.Value + i) = 0x7;
2823             }
2824             if (hevcPicParams->pps_curr_pic_ref_enabled_flag)
2825             {
2826                 *((uint8_t *)&cmd.DW11.Value + params->ucNumRefIdxL0ActiveMinus1 + 1) = extParams->recNotFilteredID;
2827             }
2828             if (!extParams->bIsLowDelayB)
2829             {
2830                  uint8_t refFrameIDx = hevcSlcParams->RefPicList[1][0].FrameIdx;
2831                  if (refFrameIDx < CODEC_MAX_NUM_REF_FRAME_HEVC)
2832                  {
2833                      const uint8_t bwdOffset = 3;
2834                      *((uint8_t *)&cmd.DW11.Value + bwdOffset) = *(extParams->pRefIdxMapping + refFrameIDx);
2835                  }
2836             }
2837             cmd.DW11.Value = (cmd.DW11.Value & 0x7fffffff) | 0x80000000;
2838         }
2839         else if (params->pVp9EncPicParams)
2840         {
2841             MHW_MI_CHK_NULL(params->pVp9EncPicParams);
2842             auto vp9PicParams = params->pVp9EncPicParams;
2843             MHW_MI_CHK_NULL(params->pVp9EncSeqParams);
2844             auto vp9SeqParams = params->pVp9EncSeqParams;
2845 
2846             cmd.DW1.FrameWidthInPixelsMinusOne = MOS_ALIGN_CEIL(vp9PicParams->SrcFrameWidthMinus1 + 1, CODEC_VP9_MIN_BLOCK_WIDTH) - 1;
2847             cmd.DW1.FrameHeightInPixelsMinusOne = MOS_ALIGN_CEIL(vp9PicParams->SrcFrameHeightMinus1 + 1, CODEC_VP9_MIN_BLOCK_WIDTH) - 1;
2848 
2849             cmd.DW2.Value = (cmd.DW2.Value & 0x8ff00000) | 0x5aff3;
2850             cmd.DW5.Value = (cmd.DW5.Value & 0xf000300) | 0x80ac00;
2851             cmd.DW6.Value = 0x20080200;
2852             cmd.DW7.Value = (cmd.DW7.Value & 0x190fd0) | 0x62003;
2853             cmd.DW9.Value = (cmd.DW9.Value & 0xfff0ffff) | 0x40000;
2854             cmd.DW14.Value = (cmd.DW14.Value & 0xffff) | 0x1f40000;
2855             cmd.DW15.Value = 0x138807d0;
2856             cmd.DW16.Value = (cmd.DW16.Value & 0xff0000) | 0xf00ff00;
2857             cmd.DW17.Value = (cmd.DW17.Value & 0xfff00000) | 0x2710;
2858             cmd.DW18.Value = 0x80000;
2859             cmd.DW19.Value = (cmd.DW19.Value & 0xffff0000) | 0x40;
2860             cmd.DW22.Value = 0x1f001f00;
2861             cmd.DW23.Value = 0x6a1a1f00;
2862             cmd.DW28.Value = 0x7d00fa0;
2863             cmd.DW29.Value = 0x2bc0bb8;
2864             cmd.DW30.Value = 0x32003e8;
2865             cmd.DW31.Value = 0x1f4012c;
2866             cmd.DW32.Value = 0x55220190;
2867             cmd.DW33.Value = 0x22552222;
2868             cmd.DW34.Value = 0x21225522;
2869             cmd.DW2.PictureType = vp9PicParams->PicFlags.fields.frame_type;
2870             cmd.DW2.TemporalMvpEnableFlag = params->temporalMVpEnable;
2871 
2872             if (vp9PicParams->PicFlags.fields.frame_type) // P_FRAME
2873             {
2874                 cmd.DW5.NumRefIdxL0Minus1 = params->ucNumRefIdxL0ActiveMinus1;
2875                 cmd.DW7.Value = (cmd.DW7.Value & 0xfff7ffff) | 0x80000;
2876             }
2877             else // I_FRAME
2878             {
2879                 cmd.DW5.Value &= 0xf0ffffff;
2880                 cmd.DW7.Value &= 0xfff7ffff;
2881             }
2882 
2883             cmd.DW7.SegmentationEnable = (vp9PicParams->PicFlags.fields.frame_type == 0) ? 0 : vp9PicParams->PicFlags.fields.segmentation_enabled;
2884             cmd.DW7.TilingEnable = (vp9PicParams->log2_tile_columns != 0) || (vp9PicParams->log2_tile_rows != 0);
2885             cmd.DW7.PakOnlyMultiPassEnable = params->bPakOnlyMultipassEnable;
2886             cmd.DW7.VdencStreamInEnable = params->bStreamInEnabled;
2887 
2888             if (params->bSegmentationEnabled)
2889             {
2890                 cmd.DW7.SegmentationEnable = true;
2891                 cmd.DW7.SegmentationMapTemporalPredictionEnable = vp9PicParams->PicFlags.fields.frame_type ? (params->bPrevFrameSegEnabled ? 1 : 0) : 0;
2892                 cmd.DW7.VdencStreamInEnable = params->bStreamInEnabled;
2893 
2894                 MHW_MI_CHK_NULL(params->pVp9SegmentState);
2895                 MHW_MI_CHK_NULL(params->pVp9SegmentState->pVp9EncodeSegmentParams);
2896 
2897                 cmd.DW24.QpForSeg0 = vp9PicParams->LumaACQIndex + params->pVp9SegmentState->pVp9EncodeSegmentParams->SegData[0].SegmentQIndexDelta;
2898                 cmd.DW24.QpForSeg1 = vp9PicParams->LumaACQIndex + params->pVp9SegmentState->pVp9EncodeSegmentParams->SegData[1].SegmentQIndexDelta;
2899                 cmd.DW24.QpForSeg2 = vp9PicParams->LumaACQIndex + params->pVp9SegmentState->pVp9EncodeSegmentParams->SegData[2].SegmentQIndexDelta;
2900                 cmd.DW24.QpForSeg3 = vp9PicParams->LumaACQIndex + params->pVp9SegmentState->pVp9EncodeSegmentParams->SegData[3].SegmentQIndexDelta;
2901 
2902                 cmd.DW25.QpForSeg4 = vp9PicParams->LumaACQIndex + params->pVp9SegmentState->pVp9EncodeSegmentParams->SegData[4].SegmentQIndexDelta;
2903                 cmd.DW25.QpForSeg5 = vp9PicParams->LumaACQIndex + params->pVp9SegmentState->pVp9EncodeSegmentParams->SegData[5].SegmentQIndexDelta;
2904                 cmd.DW25.QpForSeg6 = vp9PicParams->LumaACQIndex + params->pVp9SegmentState->pVp9EncodeSegmentParams->SegData[6].SegmentQIndexDelta;
2905                 cmd.DW25.QpForSeg7 = vp9PicParams->LumaACQIndex + params->pVp9SegmentState->pVp9EncodeSegmentParams->SegData[7].SegmentQIndexDelta;
2906             }
2907             else
2908             {
2909                 cmd.DW24.QpForSeg0 = vp9PicParams->LumaACQIndex + vp9PicParams->LumaDCQIndexDelta;
2910                 cmd.DW24.QpForSeg1 = vp9PicParams->LumaACQIndex + vp9PicParams->LumaDCQIndexDelta;
2911                 cmd.DW24.QpForSeg2 = vp9PicParams->LumaACQIndex + vp9PicParams->LumaDCQIndexDelta;
2912                 cmd.DW24.QpForSeg3 = vp9PicParams->LumaACQIndex + vp9PicParams->LumaDCQIndexDelta;
2913 
2914                 cmd.DW25.QpForSeg4 = vp9PicParams->LumaACQIndex + vp9PicParams->LumaDCQIndexDelta;
2915                 cmd.DW25.QpForSeg5 = vp9PicParams->LumaACQIndex + vp9PicParams->LumaDCQIndexDelta;
2916                 cmd.DW25.QpForSeg6 = vp9PicParams->LumaACQIndex + vp9PicParams->LumaDCQIndexDelta;
2917                 cmd.DW25.QpForSeg7 = vp9PicParams->LumaACQIndex + vp9PicParams->LumaDCQIndexDelta;
2918             }
2919 
2920             cmd.DW26.SadQpLambda = params->usSADQPLambda;
2921             cmd.DW26.RdQpLambda = params->usRDQPLambda;
2922             cmd.DW26.Vp9DynamicSliceEnable = params->bDynamicScalingEnabled;
2923 
2924             cmd.DW27.QpPrimeYAc = vp9PicParams->LumaACQIndex;
2925             cmd.DW27.QpPrimeYDc = cmd.DW27.QpPrimeYAc + vp9PicParams->LumaDCQIndexDelta;
2926 
2927             switch (vp9SeqParams->TargetUsage)
2928             {
2929             case 1:     // Quality mode
2930             case 4:     // Normal mode
2931                 cmd.DW2.Value &= 0xdfffffff;
2932                 cmd.DW7.Value &= 0xfff7feff;
2933                 cmd.DW9.Value = (cmd.DW9.Value & 0xfffff) | 0x43800000;
2934                 cmd.DW34.Value = (cmd.DW34.Value & 0xffffff) | 0x21000000;
2935                 break;
2936             case 7:     // Speed mode
2937                 cmd.DW2.Value = (cmd.DW2.Value & 0xdfffffff) | 0x20000000;
2938                 cmd.DW7.Value = (cmd.DW7.Value & 0xfff7feff) | 0x80100;
2939                 cmd.DW9.Value = (cmd.DW9.Value & 0xffff) | 0x22420000;
2940                 cmd.DW34.Value = (cmd.DW34.Value & 0xffffff) | 0x20000000;
2941                 break;
2942             default:
2943                 MHW_ASSERTMESSAGE("Invalid TU provided!");
2944                 return MOS_STATUS_INVALID_PARAMETER;
2945             }
2946 
2947             if (params->ucNumRefIdxL0ActiveMinus1 == 0)
2948             {
2949                 cmd.DW7.Value = (cmd.DW7.Value & 0xfff7ffff) | 0x80000;
2950             }
2951         }
2952 
2953         if (cmdBuffer == nullptr && batchBuffer == nullptr)
2954         {
2955             MHW_ASSERTMESSAGE("There was no valid buffer to add the HW command to.");
2956             return MOS_STATUS_NULL_POINTER;
2957         }
2958 
2959         MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(this->m_osInterface, cmdBuffer, batchBuffer, &cmd, sizeof(cmd)));
2960 
2961         return MOS_STATUS_SUCCESS;
2962     }
2963 };
2964 
2965 struct MHW_VDBOX_VDENC_HEVC_VP9_TILE_SLICE_STATE_PARAMS
2966 {
2967     uint32_t ctbSize          = 0;
2968     uint32_t widthInPix       = 0;
2969     uint32_t heightInPix      = 0;
2970     uint32_t minCodingBlkSize = 0;
2971 
2972     PMHW_VDBOX_HCP_TILE_CODING_PARAMS_G12 pTileCodingParams     = nullptr;
2973     uint32_t                              dwNumberOfPipes       = 0;
2974     uint32_t                              dwTileId              = 0;
2975     uint32_t                              IBCControl            = 0;
2976     uint32_t                              PaletteModeEnable     = 0;
2977     uint32_t                              sliceQP               = 0;
2978     uint32_t                              bit_depth_luma_minus8 = 0;
2979     uint32_t                              RowStaticInfo_31_0    = 0;
2980     uint32_t                              RowStaticInfo_63_32   = 0;
2981     uint32_t                              RowStaticInfo_95_64   = 0;
2982     uint32_t                              RowStaticInfo_127_96  = 0;
2983     uint32_t                              Log2WeightDenomLuma   = 0;
2984     uint32_t                              Log2WeightDenomChroma = 0;
2985     uint8_t                               TargetUsage           = 0;
~MHW_VDBOX_VDENC_HEVC_VP9_TILE_SLICE_STATE_PARAMSMHW_VDBOX_VDENC_HEVC_VP9_TILE_SLICE_STATE_PARAMS2986     virtual ~MHW_VDBOX_VDENC_HEVC_VP9_TILE_SLICE_STATE_PARAMS() {}
2987 };
2988 using PMHW_VDBOX_VDENC_HEVC_VP9_TILE_SLICE_STATE_PARAMS = MHW_VDBOX_VDENC_HEVC_VP9_TILE_SLICE_STATE_PARAMS *;
2989 
2990 #endif // __MHW_VDBOX_VDENC_G12_X_H__
2991