1 /*
2 * Copyright 2014 The Chromium OS Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
7 #ifdef DRV_ROCKCHIP
8
9 #include <drm_fourcc.h>
10 #include <errno.h>
11 #include <inttypes.h>
12 #include <rockchip_drm.h>
13 #include <stdio.h>
14 #include <string.h>
15 #include <sys/mman.h>
16 #include <xf86drm.h>
17
18 #include "drv_helpers.h"
19 #include "drv_priv.h"
20 #include "util.h"
21
22 #define DRM_FORMAT_MOD_ROCKCHIP_AFBC \
23 DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 | AFBC_FORMAT_MOD_SPARSE | \
24 AFBC_FORMAT_MOD_YTR)
25
26 struct rockchip_private_map_data {
27 void *cached_addr;
28 void *gem_addr;
29 };
30
31 static const uint32_t scanout_render_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888,
32 DRM_FORMAT_BGR888, DRM_FORMAT_RGB565,
33 DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB8888 };
34
35 static const uint32_t texture_only_formats[] = { DRM_FORMAT_NV12, DRM_FORMAT_YVU420,
36 DRM_FORMAT_YVU420_ANDROID };
37
afbc_bo_from_format(struct bo * bo,uint32_t width,uint32_t height,uint32_t format,uint64_t modifier)38 static int afbc_bo_from_format(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
39 uint64_t modifier)
40 {
41 /* We've restricted ourselves to four bytes per pixel. */
42 const uint32_t pixel_size = 4;
43
44 const uint32_t clump_width = 4;
45 const uint32_t clump_height = 4;
46
47 #define AFBC_NARROW 1
48 #if AFBC_NARROW == 1
49 const uint32_t block_width = 4 * clump_width;
50 const uint32_t block_height = 4 * clump_height;
51 #else
52 const uint32_t block_width = 8 * clump_width;
53 const uint32_t block_height = 2 * clump_height;
54 #endif
55
56 const uint32_t header_block_size = 16;
57 const uint32_t body_block_size = block_width * block_height * pixel_size;
58 const uint32_t width_in_blocks = DIV_ROUND_UP(width, block_width);
59 const uint32_t height_in_blocks = DIV_ROUND_UP(height, block_height);
60 const uint32_t total_blocks = width_in_blocks * height_in_blocks;
61
62 const uint32_t header_plane_size = total_blocks * header_block_size;
63 const uint32_t body_plane_size = total_blocks * body_block_size;
64
65 /* GPU requires 64 bytes, but EGL import code expects 1024 byte
66 * alignement for the body plane. */
67 const uint32_t body_plane_alignment = 1024;
68
69 const uint32_t body_plane_offset = ALIGN(header_plane_size, body_plane_alignment);
70 const uint32_t total_size = body_plane_offset + body_plane_size;
71
72 bo->meta.strides[0] = width_in_blocks * block_width * pixel_size;
73 bo->meta.sizes[0] = total_size;
74 bo->meta.offsets[0] = 0;
75
76 bo->meta.total_size = total_size;
77
78 bo->meta.format_modifier = modifier;
79
80 return 0;
81 }
82
rockchip_init(struct driver * drv)83 static int rockchip_init(struct driver *drv)
84 {
85 struct format_metadata metadata;
86
87 metadata.tiling = 0;
88 metadata.priority = 1;
89 metadata.modifier = DRM_FORMAT_MOD_LINEAR;
90
91 drv_add_combinations(drv, scanout_render_formats, ARRAY_SIZE(scanout_render_formats),
92 &metadata, BO_USE_RENDER_MASK | BO_USE_SCANOUT);
93
94 drv_add_combinations(drv, texture_only_formats, ARRAY_SIZE(texture_only_formats), &metadata,
95 BO_USE_TEXTURE_MASK);
96
97 /* NV12 format for camera, display, decoding and encoding. */
98 /* Camera ISP supports only NV12 output. */
99 drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
100 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_SCANOUT |
101 BO_USE_HW_VIDEO_DECODER | BO_USE_HW_VIDEO_ENCODER);
102
103 drv_modify_linear_combinations(drv);
104 /*
105 * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots
106 * from camera and input/output from hardware decoder/encoder.
107 */
108 drv_add_combination(drv, DRM_FORMAT_R8, &metadata,
109 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_SW_MASK |
110 BO_USE_LINEAR | BO_USE_HW_VIDEO_DECODER | BO_USE_HW_VIDEO_ENCODER |
111 BO_USE_GPU_DATA_BUFFER | BO_USE_SENSOR_DIRECT_DATA);
112
113 return 0;
114 }
115
rockchip_bo_create_with_modifiers(struct bo * bo,uint32_t width,uint32_t height,uint32_t format,const uint64_t * modifiers,uint32_t count)116 static int rockchip_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint32_t height,
117 uint32_t format, const uint64_t *modifiers,
118 uint32_t count)
119 {
120 int ret;
121 struct drm_rockchip_gem_create gem_create = { 0 };
122 uint64_t afbc_modifier;
123
124 if (drv_has_modifier(modifiers, count, DRM_FORMAT_MOD_ROCKCHIP_AFBC))
125 afbc_modifier = DRM_FORMAT_MOD_ROCKCHIP_AFBC;
126 else if (drv_has_modifier(modifiers, count, DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC))
127 afbc_modifier = DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC;
128 else
129 afbc_modifier = 0;
130
131 if (format == DRM_FORMAT_NV12) {
132 uint32_t w_mbs = DIV_ROUND_UP(width, 16);
133 uint32_t h_mbs = DIV_ROUND_UP(height, 16);
134
135 uint32_t aligned_width = w_mbs * 16;
136 uint32_t aligned_height = h_mbs * 16;
137
138 drv_bo_from_format(bo, aligned_width, 1, aligned_height, format);
139 /*
140 * drv_bo_from_format updates total_size. Add an extra data space for rockchip video
141 * driver to store motion vectors.
142 */
143 bo->meta.total_size += w_mbs * h_mbs * 128;
144 } else if (width <= 2560 && afbc_modifier && bo->drv->compression) {
145 /* If the caller has decided they can use AFBC, always
146 * pick that */
147 afbc_bo_from_format(bo, width, height, format, afbc_modifier);
148 } else {
149 if (!drv_has_modifier(modifiers, count, DRM_FORMAT_MOD_LINEAR)) {
150 errno = EINVAL;
151 drv_loge("no usable modifier found\n");
152 return -errno;
153 }
154
155 uint32_t stride;
156 /*
157 * Since the ARM L1 cache line size is 64 bytes, align to that
158 * as a performance optimization. For YV12, the Mali cmem allocator
159 * requires that chroma planes are aligned to 64-bytes, so align the
160 * luma plane to 128 bytes.
161 */
162 stride = drv_stride_from_format(format, width, 0);
163 if (format == DRM_FORMAT_YVU420 || format == DRM_FORMAT_YVU420_ANDROID)
164 stride = ALIGN(stride, 128);
165 else
166 stride = ALIGN(stride, 64);
167
168 drv_bo_from_format(bo, stride, 1, height, format);
169 }
170
171 gem_create.size = bo->meta.total_size;
172 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_CREATE, &gem_create);
173
174 if (ret) {
175 drv_loge("DRM_IOCTL_ROCKCHIP_GEM_CREATE failed (size=%" PRIu64 ")\n",
176 gem_create.size);
177 return -errno;
178 }
179
180 bo->handle.u32 = gem_create.handle;
181
182 return 0;
183 }
184
rockchip_bo_create(struct bo * bo,uint32_t width,uint32_t height,uint32_t format,uint64_t use_flags)185 static int rockchip_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
186 uint64_t use_flags)
187 {
188 uint64_t modifiers[] = { DRM_FORMAT_MOD_LINEAR };
189 return rockchip_bo_create_with_modifiers(bo, width, height, format, modifiers,
190 ARRAY_SIZE(modifiers));
191 }
192
rockchip_bo_map(struct bo * bo,struct vma * vma,uint32_t map_flags)193 static void *rockchip_bo_map(struct bo *bo, struct vma *vma, uint32_t map_flags)
194 {
195 int ret;
196 struct rockchip_private_map_data *priv;
197 struct drm_rockchip_gem_map_off gem_map = { 0 };
198 void *addr = NULL;
199
200 /* We can only map buffers created with SW access flags, which should
201 * have no modifiers (ie, not AFBC). */
202 if (bo->meta.format_modifier == DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC ||
203 bo->meta.format_modifier == DRM_FORMAT_MOD_ROCKCHIP_AFBC)
204 return MAP_FAILED;
205
206 gem_map.handle = bo->handle.u32;
207 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET, &gem_map);
208 if (ret) {
209 drv_loge("DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET failed\n");
210 return MAP_FAILED;
211 }
212
213 addr = mmap(0, bo->meta.total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
214 gem_map.offset);
215 if (addr == MAP_FAILED)
216 return MAP_FAILED;
217
218 vma->length = bo->meta.total_size;
219
220 if (bo->meta.use_flags & BO_USE_RENDERSCRIPT) {
221 priv = calloc(1, sizeof(*priv));
222 if (!priv)
223 goto out_unmap_addr;
224
225 priv->cached_addr = calloc(1, bo->meta.total_size);
226 if (!priv->cached_addr)
227 goto out_free_priv;
228
229 priv->gem_addr = addr;
230 vma->priv = priv;
231 addr = priv->cached_addr;
232 }
233
234 return addr;
235
236 out_free_priv:
237 free(priv);
238 out_unmap_addr:
239 munmap(addr, bo->meta.total_size);
240 return MAP_FAILED;
241 }
242
rockchip_bo_unmap(struct bo * bo,struct vma * vma)243 static int rockchip_bo_unmap(struct bo *bo, struct vma *vma)
244 {
245 if (vma->priv) {
246 struct rockchip_private_map_data *priv = vma->priv;
247 vma->addr = priv->gem_addr;
248 free(priv->cached_addr);
249 free(priv);
250 vma->priv = NULL;
251 }
252
253 return munmap(vma->addr, vma->length);
254 }
255
rockchip_bo_invalidate(struct bo * bo,struct mapping * mapping)256 static int rockchip_bo_invalidate(struct bo *bo, struct mapping *mapping)
257 {
258 if (mapping->vma->priv) {
259 struct rockchip_private_map_data *priv = mapping->vma->priv;
260 memcpy(priv->cached_addr, priv->gem_addr, bo->meta.total_size);
261 }
262
263 return 0;
264 }
265
rockchip_bo_flush(struct bo * bo,struct mapping * mapping)266 static int rockchip_bo_flush(struct bo *bo, struct mapping *mapping)
267 {
268 struct rockchip_private_map_data *priv = mapping->vma->priv;
269 if (priv && (mapping->vma->map_flags & BO_MAP_WRITE))
270 memcpy(priv->gem_addr, priv->cached_addr, bo->meta.total_size);
271
272 return 0;
273 }
274
275 const struct backend backend_rockchip = {
276 .name = "rockchip",
277 .init = rockchip_init,
278 .bo_create = rockchip_bo_create,
279 .bo_create_with_modifiers = rockchip_bo_create_with_modifiers,
280 .bo_destroy = drv_gem_bo_destroy,
281 .bo_import = drv_prime_bo_import,
282 .bo_map = rockchip_bo_map,
283 .bo_unmap = rockchip_bo_unmap,
284 .bo_invalidate = rockchip_bo_invalidate,
285 .bo_flush = rockchip_bo_flush,
286 .resolve_format_and_use_flags = drv_resolve_format_and_use_flags_helper,
287 };
288
289 #endif
290