1 /*
2 * Copyright (c) 2008-2024 Broadcom. All Rights Reserved.
3 * The term “Broadcom” refers to Broadcom Inc.
4 * and/or its subsidiaries.
5 * SPDX-License-Identifier: MIT
6 */
7
8 /**
9 * @file svga_cmd_vgpu10.c
10 *
11 * Command construction utility for the vgpu10 SVGA3D protocol.
12 *
13 * \author Mingcheng Chen
14 * \author Brian Paul
15 */
16
17
18 #include "svga_winsys.h"
19 #include "svga_resource_buffer.h"
20 #include "svga_resource_texture.h"
21 #include "svga_surface.h"
22 #include "svga_cmd.h"
23
24
25 /**
26 * Emit a surface relocation for RenderTargetViewId
27 */
28 static void
view_relocation(struct svga_winsys_context * swc,struct pipe_surface * surface,SVGA3dRenderTargetViewId * id,unsigned flags)29 view_relocation(struct svga_winsys_context *swc, // IN
30 struct pipe_surface *surface, // IN
31 SVGA3dRenderTargetViewId *id, // OUT
32 unsigned flags)
33 {
34 if (surface) {
35 struct svga_surface *s = svga_surface(surface);
36 assert(s->handle);
37 swc->surface_relocation(swc, id, NULL, s->handle, flags);
38 }
39 else {
40 swc->surface_relocation(swc, id, NULL, NULL, flags);
41 }
42 }
43
44
45 /**
46 * Emit a surface relocation for a ResourceId.
47 */
48 static void
surface_to_resourceid(struct svga_winsys_context * swc,struct svga_winsys_surface * surface,SVGA3dSurfaceId * sid,unsigned flags)49 surface_to_resourceid(struct svga_winsys_context *swc, // IN
50 struct svga_winsys_surface *surface, // IN
51 SVGA3dSurfaceId *sid, // OUT
52 unsigned flags) // IN
53 {
54 if (surface) {
55 swc->surface_relocation(swc, sid, NULL, surface, flags);
56 }
57 else {
58 swc->surface_relocation(swc, sid, NULL, NULL, flags);
59 }
60 }
61
62
63 #define SVGA3D_CREATE_COMMAND(CommandName, CommandCode) \
64 SVGA3dCmdDX##CommandName *cmd; \
65 { \
66 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_##CommandCode, \
67 sizeof(SVGA3dCmdDX##CommandName), 0); \
68 if (!cmd) \
69 return PIPE_ERROR_OUT_OF_MEMORY; \
70 }
71
72 #define SVGA3D_CREATE_CMD_COUNT(CommandName, CommandCode, ElementClassName) \
73 SVGA3dCmdDX##CommandName *cmd; \
74 { \
75 assert(count > 0); \
76 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_##CommandCode, \
77 sizeof(SVGA3dCmdDX##CommandName) + \
78 count * sizeof(ElementClassName), 0); \
79 if (!cmd) \
80 return PIPE_ERROR_OUT_OF_MEMORY; \
81 }
82
83 #define SVGA3D_COPY_BASIC(VariableName) \
84 { \
85 cmd->VariableName = VariableName; \
86 }
87
88 #define SVGA3D_COPY_BASIC_2(VariableName1, VariableName2) \
89 { \
90 SVGA3D_COPY_BASIC(VariableName1); \
91 SVGA3D_COPY_BASIC(VariableName2); \
92 }
93
94 #define SVGA3D_COPY_BASIC_3(VariableName1, VariableName2, VariableName3) \
95 { \
96 SVGA3D_COPY_BASIC_2(VariableName1, VariableName2); \
97 SVGA3D_COPY_BASIC(VariableName3); \
98 }
99
100 #define SVGA3D_COPY_BASIC_4(VariableName1, VariableName2, VariableName3, \
101 VariableName4) \
102 { \
103 SVGA3D_COPY_BASIC_2(VariableName1, VariableName2); \
104 SVGA3D_COPY_BASIC_2(VariableName3, VariableName4); \
105 }
106
107 #define SVGA3D_COPY_BASIC_5(VariableName1, VariableName2, VariableName3, \
108 VariableName4, VariableName5) \
109 {\
110 SVGA3D_COPY_BASIC_3(VariableName1, VariableName2, VariableName3); \
111 SVGA3D_COPY_BASIC_2(VariableName4, VariableName5); \
112 }
113
114 #define SVGA3D_COPY_BASIC_6(VariableName1, VariableName2, VariableName3, \
115 VariableName4, VariableName5, VariableName6) \
116 {\
117 SVGA3D_COPY_BASIC_3(VariableName1, VariableName2, VariableName3); \
118 SVGA3D_COPY_BASIC_3(VariableName4, VariableName5, VariableName6); \
119 }
120
121 #define SVGA3D_COPY_BASIC_7(VariableName1, VariableName2, VariableName3, \
122 VariableName4, VariableName5, VariableName6, \
123 VariableName7) \
124 {\
125 SVGA3D_COPY_BASIC_4(VariableName1, VariableName2, VariableName3, \
126 VariableName4); \
127 SVGA3D_COPY_BASIC_3(VariableName5, VariableName6, VariableName7); \
128 }
129
130 #define SVGA3D_COPY_BASIC_8(VariableName1, VariableName2, VariableName3, \
131 VariableName4, VariableName5, VariableName6, \
132 VariableName7, VariableName8) \
133 {\
134 SVGA3D_COPY_BASIC_4(VariableName1, VariableName2, VariableName3, \
135 VariableName4); \
136 SVGA3D_COPY_BASIC_4(VariableName5, VariableName6, VariableName7, \
137 VariableName8); \
138 }
139
140 #define SVGA3D_COPY_BASIC_9(VariableName1, VariableName2, VariableName3, \
141 VariableName4, VariableName5, VariableName6, \
142 VariableName7, VariableName8, VariableName9) \
143 {\
144 SVGA3D_COPY_BASIC_5(VariableName1, VariableName2, VariableName3, \
145 VariableName4, VariableName5); \
146 SVGA3D_COPY_BASIC_4(VariableName6, VariableName7, VariableName8, \
147 VariableName9); \
148 }
149
150
151 enum pipe_error
SVGA3D_vgpu10_PredCopyRegion(struct svga_winsys_context * swc,struct svga_winsys_surface * dstSurf,uint32 dstSubResource,struct svga_winsys_surface * srcSurf,uint32 srcSubResource,const SVGA3dCopyBox * box)152 SVGA3D_vgpu10_PredCopyRegion(struct svga_winsys_context *swc,
153 struct svga_winsys_surface *dstSurf,
154 uint32 dstSubResource,
155 struct svga_winsys_surface *srcSurf,
156 uint32 srcSubResource,
157 const SVGA3dCopyBox *box)
158 {
159 SVGA3dCmdDXPredCopyRegion *cmd =
160 SVGA3D_FIFOReserve(swc,
161 SVGA_3D_CMD_DX_PRED_COPY_REGION,
162 sizeof(SVGA3dCmdDXPredCopyRegion),
163 2); /* two relocations */
164 if (!cmd)
165 return PIPE_ERROR_OUT_OF_MEMORY;
166
167 swc->surface_relocation(swc, &cmd->dstSid, NULL, dstSurf, SVGA_RELOC_WRITE);
168 swc->surface_relocation(swc, &cmd->srcSid, NULL, srcSurf, SVGA_RELOC_READ);
169 cmd->dstSubResource = dstSubResource;
170 cmd->srcSubResource = srcSubResource;
171 cmd->box = *box;
172
173 swc->commit(swc);
174
175 return PIPE_OK;
176 }
177
178
179 enum pipe_error
SVGA3D_vgpu10_PredCopy(struct svga_winsys_context * swc,struct svga_winsys_surface * dstSurf,struct svga_winsys_surface * srcSurf)180 SVGA3D_vgpu10_PredCopy(struct svga_winsys_context *swc,
181 struct svga_winsys_surface *dstSurf,
182 struct svga_winsys_surface *srcSurf)
183 {
184 SVGA3dCmdDXPredCopy *cmd =
185 SVGA3D_FIFOReserve(swc,
186 SVGA_3D_CMD_DX_PRED_COPY,
187 sizeof(SVGA3dCmdDXPredCopy),
188 2); /* two relocations */
189 if (!cmd)
190 return PIPE_ERROR_OUT_OF_MEMORY;
191
192 swc->surface_relocation(swc, &cmd->dstSid, NULL, dstSurf, SVGA_RELOC_WRITE);
193 swc->surface_relocation(swc, &cmd->srcSid, NULL, srcSurf, SVGA_RELOC_READ);
194
195 swc->commit(swc);
196
197 return PIPE_OK;
198 }
199
200 enum pipe_error
SVGA3D_vgpu10_SetViewports(struct svga_winsys_context * swc,unsigned count,const SVGA3dViewport * viewports)201 SVGA3D_vgpu10_SetViewports(struct svga_winsys_context *swc,
202 unsigned count,
203 const SVGA3dViewport *viewports)
204 {
205 SVGA3D_CREATE_CMD_COUNT(SetViewports, SET_VIEWPORTS, SVGA3dViewport);
206
207 cmd->pad0 = 0;
208 memcpy(cmd + 1, viewports, count * sizeof(SVGA3dViewport));
209
210 swc->commit(swc);
211 return PIPE_OK;
212 }
213
214
215 enum pipe_error
SVGA3D_vgpu10_SetShader(struct svga_winsys_context * swc,SVGA3dShaderType type,struct svga_winsys_gb_shader * gbshader,SVGA3dShaderId shaderId)216 SVGA3D_vgpu10_SetShader(struct svga_winsys_context *swc,
217 SVGA3dShaderType type,
218 struct svga_winsys_gb_shader *gbshader,
219 SVGA3dShaderId shaderId)
220 {
221 SVGA3dCmdDXSetShader *cmd = SVGA3D_FIFOReserve(swc,
222 SVGA_3D_CMD_DX_SET_SHADER,
223 sizeof *cmd,
224 1); /* one relocation */
225 if (!cmd)
226 return PIPE_ERROR_OUT_OF_MEMORY;
227
228 swc->shader_relocation(swc, &cmd->shaderId, NULL, NULL, gbshader, 0);
229
230 cmd->type = type;
231 cmd->shaderId = shaderId;
232 swc->commit(swc);
233
234 return PIPE_OK;
235 }
236
237
238 enum pipe_error
SVGA3D_vgpu10_SetShaderResources(struct svga_winsys_context * swc,SVGA3dShaderType type,uint32 startView,unsigned count,const SVGA3dShaderResourceViewId ids[],struct svga_winsys_surface ** views)239 SVGA3D_vgpu10_SetShaderResources(struct svga_winsys_context *swc,
240 SVGA3dShaderType type,
241 uint32 startView,
242 unsigned count,
243 const SVGA3dShaderResourceViewId ids[],
244 struct svga_winsys_surface **views)
245 {
246 SVGA3dCmdDXSetShaderResources *cmd;
247 SVGA3dShaderResourceViewId *cmd_ids;
248 unsigned i;
249
250 cmd = SVGA3D_FIFOReserve(swc,
251 SVGA_3D_CMD_DX_SET_SHADER_RESOURCES,
252 sizeof(SVGA3dCmdDXSetShaderResources) +
253 count * sizeof(SVGA3dShaderResourceViewId),
254 count); /* 'count' relocations */
255 if (!cmd)
256 return PIPE_ERROR_OUT_OF_MEMORY;
257
258
259 cmd->type = type;
260 cmd->startView = startView;
261
262 cmd_ids = (SVGA3dShaderResourceViewId *) (cmd + 1);
263 for (i = 0; i < count; i++) {
264 swc->surface_relocation(swc, cmd_ids + i, NULL, views[i],
265 SVGA_RELOC_READ);
266 cmd_ids[i] = ids[i];
267 }
268
269 swc->commit(swc);
270 return PIPE_OK;
271 }
272
273
274 enum pipe_error
SVGA3D_vgpu10_SetSamplers(struct svga_winsys_context * swc,unsigned count,uint32 startSampler,SVGA3dShaderType type,const SVGA3dSamplerId * samplerIds)275 SVGA3D_vgpu10_SetSamplers(struct svga_winsys_context *swc,
276 unsigned count,
277 uint32 startSampler,
278 SVGA3dShaderType type,
279 const SVGA3dSamplerId *samplerIds)
280 {
281 SVGA3D_CREATE_CMD_COUNT(SetSamplers, SET_SAMPLERS, SVGA3dSamplerId);
282
283 SVGA3D_COPY_BASIC_2(startSampler, type);
284 memcpy(cmd + 1, samplerIds, count * sizeof(SVGA3dSamplerId));
285
286 swc->commit(swc);
287 return PIPE_OK;
288 }
289
290
291 enum pipe_error
SVGA3D_vgpu10_ClearRenderTargetView(struct svga_winsys_context * swc,struct pipe_surface * color_surf,const float * rgba)292 SVGA3D_vgpu10_ClearRenderTargetView(struct svga_winsys_context *swc,
293 struct pipe_surface *color_surf,
294 const float *rgba)
295 {
296 SVGA3dCmdDXClearRenderTargetView *cmd;
297 struct svga_surface *ss = svga_surface(color_surf);
298
299 cmd = SVGA3D_FIFOReserve(swc,
300 SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW,
301 sizeof(SVGA3dCmdDXClearRenderTargetView),
302 1); /* one relocation */
303 if (!cmd)
304 return PIPE_ERROR_OUT_OF_MEMORY;
305
306
307 /* NOTE: The following is pretty tricky. We need to emit a view/surface
308 * relocation and we have to provide a pointer to an ID which lies in
309 * the bounds of the command space which we just allocated. However,
310 * we then need to overwrite it with the original RenderTargetViewId.
311 */
312 view_relocation(swc, color_surf, &cmd->renderTargetViewId,
313 SVGA_RELOC_WRITE);
314 cmd->renderTargetViewId = ss->view_id;
315
316 COPY_4V(cmd->rgba.value, rgba);
317
318 swc->commit(swc);
319 return PIPE_OK;
320 }
321
322
323 enum pipe_error
SVGA3D_vgpu10_SetRenderTargets(struct svga_winsys_context * swc,unsigned color_count,struct pipe_surface ** color_surfs,struct pipe_surface * depth_stencil_surf)324 SVGA3D_vgpu10_SetRenderTargets(struct svga_winsys_context *swc,
325 unsigned color_count,
326 struct pipe_surface **color_surfs,
327 struct pipe_surface *depth_stencil_surf)
328 {
329 const unsigned surf_count = color_count + 1;
330 SVGA3dCmdDXSetRenderTargets *cmd;
331 SVGA3dRenderTargetViewId *ctarget;
332 struct svga_surface *ss;
333 unsigned i;
334
335 assert(surf_count > 0);
336
337 cmd = SVGA3D_FIFOReserve(swc,
338 SVGA_3D_CMD_DX_SET_RENDERTARGETS,
339 sizeof(SVGA3dCmdDXSetRenderTargets) +
340 color_count * sizeof(SVGA3dRenderTargetViewId),
341 surf_count); /* 'surf_count' relocations */
342 if (!cmd)
343 return PIPE_ERROR_OUT_OF_MEMORY;
344
345 /* NOTE: See earlier comment about the tricky handling of the ViewIds.
346 */
347
348 /* Depth / Stencil buffer */
349 if (depth_stencil_surf) {
350 ss = svga_surface(depth_stencil_surf);
351 view_relocation(swc, depth_stencil_surf, &cmd->depthStencilViewId,
352 SVGA_RELOC_WRITE);
353 cmd->depthStencilViewId = ss->view_id;
354 }
355 else {
356 /* no depth/stencil buffer - still need a relocation */
357 view_relocation(swc, NULL, &cmd->depthStencilViewId,
358 SVGA_RELOC_WRITE);
359 cmd->depthStencilViewId = SVGA3D_INVALID_ID;
360 }
361
362 /* Color buffers */
363 ctarget = (SVGA3dRenderTargetViewId *) &cmd[1];
364 for (i = 0; i < color_count; i++) {
365 if (color_surfs[i]) {
366 ss = svga_surface(color_surfs[i]);
367 view_relocation(swc, color_surfs[i], ctarget + i, SVGA_RELOC_WRITE);
368 ctarget[i] = ss->view_id;
369 }
370 else {
371 view_relocation(swc, NULL, ctarget + i, SVGA_RELOC_WRITE);
372 ctarget[i] = SVGA3D_INVALID_ID;
373 }
374 }
375
376 swc->commit(swc);
377 return PIPE_OK;
378 }
379
380
381 enum pipe_error
SVGA3D_vgpu10_SetBlendState(struct svga_winsys_context * swc,SVGA3dBlendStateId blendId,const float * blendFactor,uint32 sampleMask)382 SVGA3D_vgpu10_SetBlendState(struct svga_winsys_context *swc,
383 SVGA3dBlendStateId blendId,
384 const float *blendFactor,
385 uint32 sampleMask)
386 {
387 SVGA3D_CREATE_COMMAND(SetBlendState, SET_BLEND_STATE);
388
389 SVGA3D_COPY_BASIC_2(blendId, sampleMask);
390 memcpy(cmd->blendFactor, blendFactor, sizeof(float) * 4);
391
392 swc->commit(swc);
393 return PIPE_OK;
394 }
395
396 enum pipe_error
SVGA3D_vgpu10_SetDepthStencilState(struct svga_winsys_context * swc,SVGA3dDepthStencilStateId depthStencilId,uint32 stencilRef)397 SVGA3D_vgpu10_SetDepthStencilState(struct svga_winsys_context *swc,
398 SVGA3dDepthStencilStateId depthStencilId,
399 uint32 stencilRef)
400 {
401 SVGA3D_CREATE_COMMAND(SetDepthStencilState, SET_DEPTHSTENCIL_STATE);
402
403 SVGA3D_COPY_BASIC_2(depthStencilId, stencilRef);
404
405 swc->commit(swc);
406 return PIPE_OK;
407 }
408
409 enum pipe_error
SVGA3D_vgpu10_SetRasterizerState(struct svga_winsys_context * swc,SVGA3dRasterizerStateId rasterizerId)410 SVGA3D_vgpu10_SetRasterizerState(struct svga_winsys_context *swc,
411 SVGA3dRasterizerStateId rasterizerId)
412 {
413 SVGA3D_CREATE_COMMAND(SetRasterizerState, SET_RASTERIZER_STATE);
414
415 cmd->rasterizerId = rasterizerId;
416
417 swc->commit(swc);
418 return PIPE_OK;
419 }
420
421 enum pipe_error
SVGA3D_vgpu10_SetPredication(struct svga_winsys_context * swc,SVGA3dQueryId queryId,uint32 predicateValue)422 SVGA3D_vgpu10_SetPredication(struct svga_winsys_context *swc,
423 SVGA3dQueryId queryId,
424 uint32 predicateValue)
425 {
426 SVGA3dCmdDXSetPredication *cmd;
427
428 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_PREDICATION,
429 sizeof *cmd, 0);
430
431 if (!cmd)
432 return PIPE_ERROR_OUT_OF_MEMORY;
433
434 cmd->queryId = queryId;
435 cmd->predicateValue = predicateValue;
436 swc->commit(swc);
437 return PIPE_OK;
438 }
439
440 enum pipe_error
SVGA3D_vgpu10_SetSOTargets(struct svga_winsys_context * swc,unsigned count,const SVGA3dSoTarget * targets,struct svga_winsys_surface ** surfaces)441 SVGA3D_vgpu10_SetSOTargets(struct svga_winsys_context *swc,
442 unsigned count,
443 const SVGA3dSoTarget *targets,
444 struct svga_winsys_surface **surfaces)
445 {
446 SVGA3dCmdDXSetSOTargets *cmd;
447 SVGA3dSoTarget *sot;
448 unsigned i;
449
450 cmd = SVGA3D_FIFOReserve(swc,
451 SVGA_3D_CMD_DX_SET_SOTARGETS,
452 sizeof(SVGA3dCmdDXSetSOTargets) +
453 count * sizeof(SVGA3dSoTarget),
454 count);
455
456 if (!cmd)
457 return PIPE_ERROR_OUT_OF_MEMORY;
458
459 cmd->pad0 = 0;
460 sot = (SVGA3dSoTarget *)(cmd + 1);
461 for (i = 0; i < count; i++, sot++) {
462 if (surfaces[i]) {
463 sot->offset = targets[i].offset;
464 sot->sizeInBytes = targets[i].sizeInBytes;
465 swc->surface_relocation(swc, &sot->sid, NULL, surfaces[i],
466 SVGA_RELOC_WRITE);
467 }
468 else {
469 sot->offset = 0;
470 sot->sizeInBytes = ~0u;
471 swc->surface_relocation(swc, &sot->sid, NULL, NULL,
472 SVGA_RELOC_WRITE);
473 }
474 }
475 swc->commit(swc);
476 return PIPE_OK;
477 }
478
479 enum pipe_error
SVGA3D_vgpu10_SetScissorRects(struct svga_winsys_context * swc,unsigned count,const SVGASignedRect * rects)480 SVGA3D_vgpu10_SetScissorRects(struct svga_winsys_context *swc,
481 unsigned count,
482 const SVGASignedRect *rects)
483 {
484 SVGA3dCmdDXSetScissorRects *cmd;
485
486 assert(count > 0);
487 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_SCISSORRECTS,
488 sizeof(SVGA3dCmdDXSetScissorRects) +
489 count * sizeof(SVGASignedRect),
490 0);
491 if (!cmd)
492 return PIPE_ERROR_OUT_OF_MEMORY;
493
494 cmd->pad0 = 0;
495 memcpy(cmd + 1, rects, count * sizeof(SVGASignedRect));
496
497 swc->commit(swc);
498 return PIPE_OK;
499 }
500
501 enum pipe_error
SVGA3D_vgpu10_SetStreamOutput(struct svga_winsys_context * swc,SVGA3dStreamOutputId soid)502 SVGA3D_vgpu10_SetStreamOutput(struct svga_winsys_context *swc,
503 SVGA3dStreamOutputId soid)
504 {
505 SVGA3D_CREATE_COMMAND(SetStreamOutput, SET_STREAMOUTPUT);
506
507 cmd->soid = soid;
508
509 swc->commit(swc);
510 return PIPE_OK;
511 }
512
513 enum pipe_error
SVGA3D_vgpu10_Draw(struct svga_winsys_context * swc,uint32 vertexCount,uint32 startVertexLocation)514 SVGA3D_vgpu10_Draw(struct svga_winsys_context *swc,
515 uint32 vertexCount,
516 uint32 startVertexLocation)
517 {
518 SVGA3D_CREATE_COMMAND(Draw, DRAW);
519
520 SVGA3D_COPY_BASIC_2(vertexCount, startVertexLocation);
521
522 swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
523 swc->commit(swc);
524 swc->num_draw_commands++;
525 return PIPE_OK;
526 }
527
528 enum pipe_error
SVGA3D_vgpu10_DrawIndexed(struct svga_winsys_context * swc,uint32 indexCount,uint32 startIndexLocation,int32 baseVertexLocation)529 SVGA3D_vgpu10_DrawIndexed(struct svga_winsys_context *swc,
530 uint32 indexCount,
531 uint32 startIndexLocation,
532 int32 baseVertexLocation)
533 {
534 SVGA3D_CREATE_COMMAND(DrawIndexed, DRAW_INDEXED);
535
536 SVGA3D_COPY_BASIC_3(indexCount, startIndexLocation,
537 baseVertexLocation);
538
539 swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
540 swc->commit(swc);
541 swc->num_draw_commands++;
542 return PIPE_OK;
543 }
544
545 enum pipe_error
SVGA3D_vgpu10_DrawInstanced(struct svga_winsys_context * swc,uint32 vertexCountPerInstance,uint32 instanceCount,uint32 startVertexLocation,uint32 startInstanceLocation)546 SVGA3D_vgpu10_DrawInstanced(struct svga_winsys_context *swc,
547 uint32 vertexCountPerInstance,
548 uint32 instanceCount,
549 uint32 startVertexLocation,
550 uint32 startInstanceLocation)
551 {
552 SVGA3D_CREATE_COMMAND(DrawInstanced, DRAW_INSTANCED);
553
554 SVGA3D_COPY_BASIC_4(vertexCountPerInstance, instanceCount,
555 startVertexLocation, startInstanceLocation);
556
557 swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
558 swc->commit(swc);
559 swc->num_draw_commands++;
560 return PIPE_OK;
561 }
562
563 enum pipe_error
SVGA3D_vgpu10_DrawIndexedInstanced(struct svga_winsys_context * swc,uint32 indexCountPerInstance,uint32 instanceCount,uint32 startIndexLocation,int32 baseVertexLocation,uint32 startInstanceLocation)564 SVGA3D_vgpu10_DrawIndexedInstanced(struct svga_winsys_context *swc,
565 uint32 indexCountPerInstance,
566 uint32 instanceCount,
567 uint32 startIndexLocation,
568 int32 baseVertexLocation,
569 uint32 startInstanceLocation)
570 {
571 SVGA3D_CREATE_COMMAND(DrawIndexedInstanced, DRAW_INDEXED_INSTANCED);
572
573 SVGA3D_COPY_BASIC_5(indexCountPerInstance, instanceCount,
574 startIndexLocation, baseVertexLocation,
575 startInstanceLocation);
576
577
578 swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
579 swc->commit(swc);
580 swc->num_draw_commands++;
581 return PIPE_OK;
582 }
583
584 enum pipe_error
SVGA3D_vgpu10_DrawAuto(struct svga_winsys_context * swc)585 SVGA3D_vgpu10_DrawAuto(struct svga_winsys_context *swc)
586 {
587 SVGA3D_CREATE_COMMAND(DrawAuto, DRAW_AUTO);
588
589 cmd->pad0 = 0;
590 swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
591 swc->commit(swc);
592 swc->num_draw_commands++;
593 return PIPE_OK;
594 }
595
596 enum pipe_error
SVGA3D_vgpu10_DefineQuery(struct svga_winsys_context * swc,SVGA3dQueryId queryId,SVGA3dQueryType type,SVGA3dDXQueryFlags flags)597 SVGA3D_vgpu10_DefineQuery(struct svga_winsys_context *swc,
598 SVGA3dQueryId queryId,
599 SVGA3dQueryType type,
600 SVGA3dDXQueryFlags flags)
601 {
602 SVGA3D_CREATE_COMMAND(DefineQuery, DEFINE_QUERY);
603
604 SVGA3D_COPY_BASIC_3(queryId, type, flags);
605
606 swc->commit(swc);
607 return PIPE_OK;
608 }
609
610 enum pipe_error
SVGA3D_vgpu10_DestroyQuery(struct svga_winsys_context * swc,SVGA3dQueryId queryId)611 SVGA3D_vgpu10_DestroyQuery(struct svga_winsys_context *swc,
612 SVGA3dQueryId queryId)
613 {
614 SVGA3D_CREATE_COMMAND(DestroyQuery, DESTROY_QUERY);
615
616 cmd->queryId = queryId;
617
618 swc->commit(swc);
619 return PIPE_OK;
620 }
621
622 enum pipe_error
SVGA3D_vgpu10_BindQuery(struct svga_winsys_context * swc,struct svga_winsys_gb_query * gbQuery,SVGA3dQueryId queryId)623 SVGA3D_vgpu10_BindQuery(struct svga_winsys_context *swc,
624 struct svga_winsys_gb_query *gbQuery,
625 SVGA3dQueryId queryId)
626 {
627 SVGA3dCmdDXBindQuery *cmd = SVGA3D_FIFOReserve(swc,
628 SVGA_3D_CMD_DX_BIND_QUERY,
629 sizeof *cmd,
630 1);
631 if (!cmd)
632 return PIPE_ERROR_OUT_OF_MEMORY;
633
634 cmd->queryId = queryId;
635 swc->query_relocation(swc, &cmd->mobid, gbQuery);
636
637 swc->commit(swc);
638 return PIPE_OK;
639 }
640
641 enum pipe_error
SVGA3D_vgpu10_SetQueryOffset(struct svga_winsys_context * swc,SVGA3dQueryId queryId,uint32 mobOffset)642 SVGA3D_vgpu10_SetQueryOffset(struct svga_winsys_context *swc,
643 SVGA3dQueryId queryId,
644 uint32 mobOffset)
645 {
646 SVGA3D_CREATE_COMMAND(SetQueryOffset, SET_QUERY_OFFSET);
647 SVGA3D_COPY_BASIC_2(queryId, mobOffset);
648 swc->commit(swc);
649 return PIPE_OK;
650 }
651
652 enum pipe_error
SVGA3D_vgpu10_BeginQuery(struct svga_winsys_context * swc,SVGA3dQueryId queryId)653 SVGA3D_vgpu10_BeginQuery(struct svga_winsys_context *swc,
654 SVGA3dQueryId queryId)
655 {
656 SVGA3D_CREATE_COMMAND(BeginQuery, BEGIN_QUERY);
657 cmd->queryId = queryId;
658 swc->commit(swc);
659 return PIPE_OK;
660 }
661
662 enum pipe_error
SVGA3D_vgpu10_EndQuery(struct svga_winsys_context * swc,SVGA3dQueryId queryId)663 SVGA3D_vgpu10_EndQuery(struct svga_winsys_context *swc,
664 SVGA3dQueryId queryId)
665 {
666 SVGA3D_CREATE_COMMAND(EndQuery, END_QUERY);
667 cmd->queryId = queryId;
668 swc->commit(swc);
669 return PIPE_OK;
670 }
671
672
673 enum pipe_error
SVGA3D_vgpu10_ClearDepthStencilView(struct svga_winsys_context * swc,struct pipe_surface * ds_surf,uint16 flags,uint16 stencil,float depth)674 SVGA3D_vgpu10_ClearDepthStencilView(struct svga_winsys_context *swc,
675 struct pipe_surface *ds_surf,
676 uint16 flags,
677 uint16 stencil,
678 float depth)
679 {
680 SVGA3dCmdDXClearDepthStencilView *cmd;
681 struct svga_surface *ss = svga_surface(ds_surf);
682
683 cmd = SVGA3D_FIFOReserve(swc,
684 SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW,
685 sizeof(SVGA3dCmdDXClearDepthStencilView),
686 1); /* one relocation */
687 if (!cmd)
688 return PIPE_ERROR_OUT_OF_MEMORY;
689
690 /* NOTE: The following is pretty tricky. We need to emit a view/surface
691 * relocation and we have to provide a pointer to an ID which lies in
692 * the bounds of the command space which we just allocated. However,
693 * we then need to overwrite it with the original DepthStencilViewId.
694 */
695 view_relocation(swc, ds_surf, &cmd->depthStencilViewId,
696 SVGA_RELOC_WRITE);
697 cmd->depthStencilViewId = ss->view_id;
698 cmd->flags = flags;
699 cmd->stencil = stencil;
700 cmd->depth = depth;
701
702 swc->commit(swc);
703 return PIPE_OK;
704 }
705
706 enum pipe_error
SVGA3D_vgpu10_DefineShaderResourceView(struct svga_winsys_context * swc,SVGA3dShaderResourceViewId shaderResourceViewId,struct svga_winsys_surface * surface,SVGA3dSurfaceFormat format,SVGA3dResourceType resourceDimension,const SVGA3dShaderResourceViewDesc * desc)707 SVGA3D_vgpu10_DefineShaderResourceView(struct svga_winsys_context *swc,
708 SVGA3dShaderResourceViewId shaderResourceViewId,
709 struct svga_winsys_surface *surface,
710 SVGA3dSurfaceFormat format,
711 SVGA3dResourceType resourceDimension,
712 const SVGA3dShaderResourceViewDesc *desc)
713 {
714 SVGA3dCmdDXDefineShaderResourceView *cmd;
715
716 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_SHADERRESOURCE_VIEW,
717 sizeof(SVGA3dCmdDXDefineShaderResourceView),
718 1); /* one relocation */
719 if (!cmd)
720 return PIPE_ERROR_OUT_OF_MEMORY;
721
722 SVGA3D_COPY_BASIC_3(shaderResourceViewId, format, resourceDimension);
723
724 swc->surface_relocation(swc, &cmd->sid, NULL, surface,
725 SVGA_RELOC_READ);
726
727 cmd->desc = *desc;
728
729 swc->commit(swc);
730 return PIPE_OK;
731 }
732
733 enum pipe_error
SVGA3D_vgpu10_DestroyShaderResourceView(struct svga_winsys_context * swc,SVGA3dShaderResourceViewId shaderResourceViewId)734 SVGA3D_vgpu10_DestroyShaderResourceView(struct svga_winsys_context *swc,
735 SVGA3dShaderResourceViewId shaderResourceViewId)
736 {
737 SVGA3D_CREATE_COMMAND(DestroyShaderResourceView,
738 DESTROY_SHADERRESOURCE_VIEW);
739
740 cmd->shaderResourceViewId = shaderResourceViewId;
741
742 swc->commit(swc);
743 return PIPE_OK;
744 }
745
746
747 enum pipe_error
SVGA3D_vgpu10_DefineRenderTargetView(struct svga_winsys_context * swc,SVGA3dRenderTargetViewId renderTargetViewId,struct svga_winsys_surface * surface,SVGA3dSurfaceFormat format,SVGA3dResourceType resourceDimension,const SVGA3dRenderTargetViewDesc * desc)748 SVGA3D_vgpu10_DefineRenderTargetView(struct svga_winsys_context *swc,
749 SVGA3dRenderTargetViewId renderTargetViewId,
750 struct svga_winsys_surface *surface,
751 SVGA3dSurfaceFormat format,
752 SVGA3dResourceType resourceDimension,
753 const SVGA3dRenderTargetViewDesc *desc)
754 {
755 SVGA3dCmdDXDefineRenderTargetView *cmd;
756
757 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_RENDERTARGET_VIEW,
758 sizeof(SVGA3dCmdDXDefineRenderTargetView),
759 1); /* one relocation */
760 if (!cmd)
761 return PIPE_ERROR_OUT_OF_MEMORY;
762
763 SVGA3D_COPY_BASIC_3(renderTargetViewId, format, resourceDimension);
764 cmd->desc = *desc;
765
766 surface_to_resourceid(swc, surface,
767 &cmd->sid,
768 SVGA_RELOC_READ | SVGA_RELOC_WRITE);
769
770 swc->commit(swc);
771 return PIPE_OK;
772 }
773
774 enum pipe_error
SVGA3D_vgpu10_DestroyRenderTargetView(struct svga_winsys_context * swc,SVGA3dRenderTargetViewId renderTargetViewId)775 SVGA3D_vgpu10_DestroyRenderTargetView(struct svga_winsys_context *swc,
776 SVGA3dRenderTargetViewId renderTargetViewId)
777 {
778 SVGA3D_CREATE_COMMAND(DestroyRenderTargetView, DESTROY_RENDERTARGET_VIEW);
779
780 cmd->renderTargetViewId = renderTargetViewId;
781
782 swc->commit(swc);
783 return PIPE_OK;
784 }
785
786
787 enum pipe_error
SVGA3D_vgpu10_DefineDepthStencilView(struct svga_winsys_context * swc,SVGA3dDepthStencilViewId depthStencilViewId,struct svga_winsys_surface * surface,SVGA3dSurfaceFormat format,SVGA3dResourceType resourceDimension,const SVGA3dRenderTargetViewDesc * desc)788 SVGA3D_vgpu10_DefineDepthStencilView(struct svga_winsys_context *swc,
789 SVGA3dDepthStencilViewId depthStencilViewId,
790 struct svga_winsys_surface *surface,
791 SVGA3dSurfaceFormat format,
792 SVGA3dResourceType resourceDimension,
793 const SVGA3dRenderTargetViewDesc *desc)
794 {
795 SVGA3dCmdDXDefineDepthStencilView *cmd;
796
797 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW,
798 sizeof(SVGA3dCmdDXDefineDepthStencilView),
799 1); /* one relocation */
800 if (!cmd)
801 return PIPE_ERROR_OUT_OF_MEMORY;
802
803 SVGA3D_COPY_BASIC_3(depthStencilViewId, format, resourceDimension);
804 cmd->mipSlice = desc->tex.mipSlice;
805 cmd->firstArraySlice = desc->tex.firstArraySlice;
806 cmd->arraySize = desc->tex.arraySize;
807 cmd->flags = 0;
808 cmd->pad0 = 0;
809 cmd->pad1 = 0;
810
811 surface_to_resourceid(swc, surface,
812 &cmd->sid,
813 SVGA_RELOC_READ | SVGA_RELOC_WRITE);
814
815 swc->commit(swc);
816 return PIPE_OK;
817 }
818
819 enum pipe_error
SVGA3D_vgpu10_DestroyDepthStencilView(struct svga_winsys_context * swc,SVGA3dDepthStencilViewId depthStencilViewId)820 SVGA3D_vgpu10_DestroyDepthStencilView(struct svga_winsys_context *swc,
821 SVGA3dDepthStencilViewId depthStencilViewId)
822 {
823 SVGA3D_CREATE_COMMAND(DestroyDepthStencilView, DESTROY_DEPTHSTENCIL_VIEW);
824
825 cmd->depthStencilViewId = depthStencilViewId;
826
827 swc->commit(swc);
828 return PIPE_OK;
829 }
830
831 enum pipe_error
SVGA3D_vgpu10_DefineElementLayout(struct svga_winsys_context * swc,unsigned count,SVGA3dElementLayoutId elementLayoutId,const SVGA3dInputElementDesc * elements)832 SVGA3D_vgpu10_DefineElementLayout(struct svga_winsys_context *swc,
833 unsigned count,
834 SVGA3dElementLayoutId elementLayoutId,
835 const SVGA3dInputElementDesc *elements)
836 {
837 SVGA3dCmdDXDefineElementLayout *cmd;
838
839 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_ELEMENTLAYOUT,
840 sizeof(SVGA3dCmdDXDefineElementLayout) +
841 count * sizeof(SVGA3dInputElementDesc), 0);
842 if (!cmd)
843 return PIPE_ERROR_OUT_OF_MEMORY;
844
845 cmd->elementLayoutId = elementLayoutId;
846 memcpy(cmd + 1, elements, count * sizeof(SVGA3dInputElementDesc));
847
848 swc->commit(swc);
849 return PIPE_OK;
850 }
851
852 enum pipe_error
SVGA3D_vgpu10_DestroyElementLayout(struct svga_winsys_context * swc,SVGA3dElementLayoutId elementLayoutId)853 SVGA3D_vgpu10_DestroyElementLayout(struct svga_winsys_context *swc,
854 SVGA3dElementLayoutId elementLayoutId)
855 {
856 SVGA3D_CREATE_COMMAND(DestroyElementLayout, DESTROY_ELEMENTLAYOUT);
857
858 cmd->elementLayoutId = elementLayoutId;
859
860 swc->commit(swc);
861 return PIPE_OK;
862 }
863
864 enum pipe_error
SVGA3D_vgpu10_DefineBlendState(struct svga_winsys_context * swc,SVGA3dBlendStateId blendId,uint8 alphaToCoverageEnable,uint8 independentBlendEnable,const SVGA3dDXBlendStatePerRT * perRT)865 SVGA3D_vgpu10_DefineBlendState(struct svga_winsys_context *swc,
866 SVGA3dBlendStateId blendId,
867 uint8 alphaToCoverageEnable,
868 uint8 independentBlendEnable,
869 const SVGA3dDXBlendStatePerRT *perRT)
870 {
871 int i;
872
873 SVGA3D_CREATE_COMMAND(DefineBlendState, DEFINE_BLEND_STATE);
874
875 for (i = 0; i < SVGA3D_MAX_RENDER_TARGETS; i++) {
876 /* At most, one of blend or logicop can be enabled */
877 assert(perRT[i].blendEnable == 0 || perRT[i].logicOpEnable == 0);
878 }
879
880 cmd->blendId = blendId;
881 cmd->alphaToCoverageEnable = alphaToCoverageEnable;
882 cmd->independentBlendEnable = independentBlendEnable;
883 memcpy(cmd->perRT, perRT, sizeof(cmd->perRT));
884 cmd->pad0 = 0;
885
886 swc->commit(swc);
887 return PIPE_OK;
888 }
889
890 enum pipe_error
SVGA3D_vgpu10_DestroyBlendState(struct svga_winsys_context * swc,SVGA3dBlendStateId blendId)891 SVGA3D_vgpu10_DestroyBlendState(struct svga_winsys_context *swc,
892 SVGA3dBlendStateId blendId)
893 {
894 SVGA3D_CREATE_COMMAND(DestroyBlendState, DESTROY_BLEND_STATE);
895
896 cmd->blendId = blendId;
897
898 swc->commit(swc);
899 return PIPE_OK;
900 }
901
902 enum pipe_error
SVGA3D_vgpu10_DefineDepthStencilState(struct svga_winsys_context * swc,SVGA3dDepthStencilStateId depthStencilId,uint8 depthEnable,SVGA3dDepthWriteMask depthWriteMask,SVGA3dComparisonFunc depthFunc,uint8 stencilEnable,uint8 frontEnable,uint8 backEnable,uint8 stencilReadMask,uint8 stencilWriteMask,uint8 frontStencilFailOp,uint8 frontStencilDepthFailOp,uint8 frontStencilPassOp,SVGA3dComparisonFunc frontStencilFunc,uint8 backStencilFailOp,uint8 backStencilDepthFailOp,uint8 backStencilPassOp,SVGA3dComparisonFunc backStencilFunc)903 SVGA3D_vgpu10_DefineDepthStencilState(struct svga_winsys_context *swc,
904 SVGA3dDepthStencilStateId depthStencilId,
905 uint8 depthEnable,
906 SVGA3dDepthWriteMask depthWriteMask,
907 SVGA3dComparisonFunc depthFunc,
908 uint8 stencilEnable,
909 uint8 frontEnable,
910 uint8 backEnable,
911 uint8 stencilReadMask,
912 uint8 stencilWriteMask,
913 uint8 frontStencilFailOp,
914 uint8 frontStencilDepthFailOp,
915 uint8 frontStencilPassOp,
916 SVGA3dComparisonFunc frontStencilFunc,
917 uint8 backStencilFailOp,
918 uint8 backStencilDepthFailOp,
919 uint8 backStencilPassOp,
920 SVGA3dComparisonFunc backStencilFunc)
921 {
922 SVGA3D_CREATE_COMMAND(DefineDepthStencilState, DEFINE_DEPTHSTENCIL_STATE);
923
924 SVGA3D_COPY_BASIC_9(depthStencilId, depthEnable,
925 depthWriteMask, depthFunc,
926 stencilEnable, frontEnable,
927 backEnable, stencilReadMask,
928 stencilWriteMask);
929 SVGA3D_COPY_BASIC_8(frontStencilFailOp, frontStencilDepthFailOp,
930 frontStencilPassOp, frontStencilFunc,
931 backStencilFailOp, backStencilDepthFailOp,
932 backStencilPassOp, backStencilFunc);
933
934 swc->commit(swc);
935 return PIPE_OK;
936 }
937
938 enum pipe_error
SVGA3D_vgpu10_DestroyDepthStencilState(struct svga_winsys_context * swc,SVGA3dDepthStencilStateId depthStencilId)939 SVGA3D_vgpu10_DestroyDepthStencilState(struct svga_winsys_context *swc,
940 SVGA3dDepthStencilStateId depthStencilId)
941 {
942 SVGA3D_CREATE_COMMAND(DestroyDepthStencilState,
943 DESTROY_DEPTHSTENCIL_STATE);
944
945 cmd->depthStencilId = depthStencilId;
946
947 swc->commit(swc);
948 return PIPE_OK;
949 }
950
951 enum pipe_error
SVGA3D_vgpu10_DefineRasterizerState(struct svga_winsys_context * swc,SVGA3dRasterizerStateId rasterizerId,uint8 fillMode,SVGA3dCullMode cullMode,uint8 frontCounterClockwise,int32 depthBias,float depthBiasClamp,float slopeScaledDepthBias,uint8 depthClipEnable,uint8 scissorEnable,uint8 multisampleEnable,uint8 antialiasedLineEnable,float lineWidth,uint8 lineStippleEnable,uint8 lineStippleFactor,uint16 lineStipplePattern,uint8 provokingVertexLast)952 SVGA3D_vgpu10_DefineRasterizerState(struct svga_winsys_context *swc,
953 SVGA3dRasterizerStateId rasterizerId,
954 uint8 fillMode,
955 SVGA3dCullMode cullMode,
956 uint8 frontCounterClockwise,
957 int32 depthBias,
958 float depthBiasClamp,
959 float slopeScaledDepthBias,
960 uint8 depthClipEnable,
961 uint8 scissorEnable,
962 uint8 multisampleEnable,
963 uint8 antialiasedLineEnable,
964 float lineWidth,
965 uint8 lineStippleEnable,
966 uint8 lineStippleFactor,
967 uint16 lineStipplePattern,
968 uint8 provokingVertexLast)
969 {
970 SVGA3D_CREATE_COMMAND(DefineRasterizerState, DEFINE_RASTERIZER_STATE);
971
972 SVGA3D_COPY_BASIC_5(rasterizerId, fillMode,
973 cullMode, frontCounterClockwise,
974 depthBias);
975 SVGA3D_COPY_BASIC_6(depthBiasClamp, slopeScaledDepthBias,
976 depthClipEnable, scissorEnable,
977 multisampleEnable, antialiasedLineEnable);
978 cmd->lineWidth = lineWidth;
979 cmd->lineStippleEnable = lineStippleEnable;
980 cmd->lineStippleFactor = lineStippleFactor;
981 cmd->lineStipplePattern = lineStipplePattern;
982 cmd->provokingVertexLast = provokingVertexLast;
983
984 swc->commit(swc);
985 return PIPE_OK;
986 }
987
988 enum pipe_error
SVGA3D_vgpu10_DestroyRasterizerState(struct svga_winsys_context * swc,SVGA3dRasterizerStateId rasterizerId)989 SVGA3D_vgpu10_DestroyRasterizerState(struct svga_winsys_context *swc,
990 SVGA3dRasterizerStateId rasterizerId)
991 {
992 SVGA3D_CREATE_COMMAND(DestroyRasterizerState, DESTROY_RASTERIZER_STATE);
993
994 cmd->rasterizerId = rasterizerId;
995
996 swc->commit(swc);
997 return PIPE_OK;
998 }
999
1000 enum pipe_error
SVGA3D_vgpu10_DefineSamplerState(struct svga_winsys_context * swc,SVGA3dSamplerId samplerId,SVGA3dFilter filter,uint8 addressU,uint8 addressV,uint8 addressW,float mipLODBias,uint8 maxAnisotropy,uint8 comparisonFunc,SVGA3dRGBAFloat borderColor,float minLOD,float maxLOD)1001 SVGA3D_vgpu10_DefineSamplerState(struct svga_winsys_context *swc,
1002 SVGA3dSamplerId samplerId,
1003 SVGA3dFilter filter,
1004 uint8 addressU,
1005 uint8 addressV,
1006 uint8 addressW,
1007 float mipLODBias,
1008 uint8 maxAnisotropy,
1009 uint8 comparisonFunc,
1010 SVGA3dRGBAFloat borderColor,
1011 float minLOD,
1012 float maxLOD)
1013 {
1014 SVGA3D_CREATE_COMMAND(DefineSamplerState, DEFINE_SAMPLER_STATE);
1015
1016 SVGA3D_COPY_BASIC_6(samplerId, filter,
1017 addressU, addressV,
1018 addressW, mipLODBias);
1019 SVGA3D_COPY_BASIC_5(maxAnisotropy, comparisonFunc,
1020 borderColor, minLOD,
1021 maxLOD);
1022 cmd->pad0 = 0;
1023 cmd->pad1 = 0;
1024
1025 swc->commit(swc);
1026 return PIPE_OK;
1027 }
1028
1029 enum pipe_error
SVGA3D_vgpu10_DestroySamplerState(struct svga_winsys_context * swc,SVGA3dSamplerId samplerId)1030 SVGA3D_vgpu10_DestroySamplerState(struct svga_winsys_context *swc,
1031 SVGA3dSamplerId samplerId)
1032 {
1033 SVGA3D_CREATE_COMMAND(DestroySamplerState, DESTROY_SAMPLER_STATE);
1034
1035 cmd->samplerId = samplerId;
1036
1037 swc->commit(swc);
1038 return PIPE_OK;
1039 }
1040
1041
1042 enum pipe_error
SVGA3D_vgpu10_DefineAndBindShader(struct svga_winsys_context * swc,struct svga_winsys_gb_shader * gbshader,SVGA3dShaderId shaderId,SVGA3dShaderType type,uint32 sizeInBytes)1043 SVGA3D_vgpu10_DefineAndBindShader(struct svga_winsys_context *swc,
1044 struct svga_winsys_gb_shader *gbshader,
1045 SVGA3dShaderId shaderId,
1046 SVGA3dShaderType type,
1047 uint32 sizeInBytes)
1048 {
1049 SVGA3dCmdHeader *header;
1050 SVGA3dCmdDXDefineShader *dcmd;
1051 SVGA3dCmdDXBindShader *bcmd;
1052 unsigned totalSize = 2 * sizeof(*header) +
1053 sizeof(*dcmd) + sizeof(*bcmd);
1054
1055 /* Make sure there is room for both commands */
1056 header = swc->reserve(swc, totalSize, 2);
1057 if (!header)
1058 return PIPE_ERROR_OUT_OF_MEMORY;
1059
1060 /* DXDefineShader command */
1061 header->id = SVGA_3D_CMD_DX_DEFINE_SHADER;
1062 header->size = sizeof(*dcmd);
1063 dcmd = (SVGA3dCmdDXDefineShader *)(header + 1);
1064 dcmd->shaderId = shaderId;
1065 dcmd->type = type;
1066 dcmd->sizeInBytes = sizeInBytes;
1067
1068 /* DXBindShader command */
1069 header = (SVGA3dCmdHeader *)(dcmd + 1);
1070
1071 header->id = SVGA_3D_CMD_DX_BIND_SHADER;
1072 header->size = sizeof(*bcmd);
1073 bcmd = (SVGA3dCmdDXBindShader *)(header + 1);
1074
1075 bcmd->cid = swc->cid;
1076 swc->shader_relocation(swc, NULL, &bcmd->mobid,
1077 &bcmd->offsetInBytes, gbshader, 0);
1078
1079 bcmd->shid = shaderId;
1080
1081 swc->commit(swc);
1082 return PIPE_OK;
1083 }
1084
1085 enum pipe_error
SVGA3D_vgpu10_DestroyShader(struct svga_winsys_context * swc,SVGA3dShaderId shaderId)1086 SVGA3D_vgpu10_DestroyShader(struct svga_winsys_context *swc,
1087 SVGA3dShaderId shaderId)
1088 {
1089 SVGA3D_CREATE_COMMAND(DestroyShader, DESTROY_SHADER);
1090
1091 cmd->shaderId = shaderId;
1092
1093 swc->commit(swc);
1094 return PIPE_OK;
1095 }
1096
1097 enum pipe_error
SVGA3D_vgpu10_DefineStreamOutput(struct svga_winsys_context * swc,SVGA3dStreamOutputId soid,uint32 numOutputStreamEntries,uint32 streamOutputStrideInBytes[SVGA3D_DX_MAX_SOTARGETS],const SVGA3dStreamOutputDeclarationEntry decl[SVGA3D_MAX_STREAMOUT_DECLS])1098 SVGA3D_vgpu10_DefineStreamOutput(struct svga_winsys_context *swc,
1099 SVGA3dStreamOutputId soid,
1100 uint32 numOutputStreamEntries,
1101 uint32 streamOutputStrideInBytes[SVGA3D_DX_MAX_SOTARGETS],
1102 const SVGA3dStreamOutputDeclarationEntry decl[SVGA3D_MAX_STREAMOUT_DECLS])
1103 {
1104 unsigned i;
1105 SVGA3D_CREATE_COMMAND(DefineStreamOutput, DEFINE_STREAMOUTPUT);
1106
1107 cmd->soid = soid;
1108 cmd->numOutputStreamEntries = numOutputStreamEntries;
1109
1110 for (i = 0; i < ARRAY_SIZE(cmd->streamOutputStrideInBytes); i++)
1111 cmd->streamOutputStrideInBytes[i] = streamOutputStrideInBytes[i];
1112
1113 memcpy(cmd->decl, decl,
1114 sizeof(SVGA3dStreamOutputDeclarationEntry)
1115 * SVGA3D_MAX_DX10_STREAMOUT_DECLS);
1116
1117 cmd->rasterizedStream = 0;
1118 swc->commit(swc);
1119 return PIPE_OK;
1120 }
1121
1122 enum pipe_error
SVGA3D_vgpu10_DestroyStreamOutput(struct svga_winsys_context * swc,SVGA3dStreamOutputId soid)1123 SVGA3D_vgpu10_DestroyStreamOutput(struct svga_winsys_context *swc,
1124 SVGA3dStreamOutputId soid)
1125 {
1126 SVGA3D_CREATE_COMMAND(DestroyStreamOutput, DESTROY_STREAMOUTPUT);
1127
1128 cmd->soid = soid;
1129
1130 swc->commit(swc);
1131 return PIPE_OK;
1132 }
1133
1134 enum pipe_error
SVGA3D_vgpu10_SetInputLayout(struct svga_winsys_context * swc,SVGA3dElementLayoutId elementLayoutId)1135 SVGA3D_vgpu10_SetInputLayout(struct svga_winsys_context *swc,
1136 SVGA3dElementLayoutId elementLayoutId)
1137 {
1138 SVGA3D_CREATE_COMMAND(SetInputLayout, SET_INPUT_LAYOUT);
1139
1140 cmd->elementLayoutId = elementLayoutId;
1141
1142 swc->commit(swc);
1143 return PIPE_OK;
1144 }
1145
1146 enum pipe_error
SVGA3D_vgpu10_SetVertexBuffers(struct svga_winsys_context * swc,unsigned count,uint32 startBuffer,const SVGA3dVertexBuffer_v2 * bufferInfo,struct svga_winsys_surface ** surfaces)1147 SVGA3D_vgpu10_SetVertexBuffers(struct svga_winsys_context *swc,
1148 unsigned count,
1149 uint32 startBuffer,
1150 const SVGA3dVertexBuffer_v2 *bufferInfo,
1151 struct svga_winsys_surface **surfaces)
1152 {
1153 SVGA3dCmdDXSetVertexBuffers *cmd;
1154 SVGA3dVertexBuffer *bufs;
1155 unsigned i;
1156
1157 assert(count > 0);
1158
1159 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS,
1160 sizeof(SVGA3dCmdDXSetVertexBuffers) +
1161 count * sizeof(SVGA3dVertexBuffer),
1162 count); /* 'count' relocations */
1163 if (!cmd)
1164 return PIPE_ERROR_OUT_OF_MEMORY;
1165
1166 cmd->startBuffer = startBuffer;
1167
1168 bufs = (SVGA3dVertexBuffer *) &cmd[1];
1169 for (i = 0; i < count; i++) {
1170 bufs[i].stride = bufferInfo[i].stride;
1171 bufs[i].offset = bufferInfo[i].offset;
1172 swc->surface_relocation(swc, &bufs[i].sid, NULL, surfaces[i],
1173 SVGA_RELOC_READ);
1174 }
1175
1176 swc->commit(swc);
1177 return PIPE_OK;
1178 }
1179
1180 enum pipe_error
SVGA3D_vgpu10_SetVertexBuffersOffsetAndSize(struct svga_winsys_context * swc,unsigned count,uint32 startBuffer,const SVGA3dVertexBuffer_v2 * bufferInfo)1181 SVGA3D_vgpu10_SetVertexBuffersOffsetAndSize(struct svga_winsys_context *swc,
1182 unsigned count,
1183 uint32 startBuffer,
1184 const SVGA3dVertexBuffer_v2 *bufferInfo)
1185 {
1186 SVGA3dCmdDXSetVertexBuffersOffsetAndSize *cmd;
1187 SVGA3dVertexBufferOffsetAndSize *bufs;
1188 unsigned i;
1189
1190 assert(count > 0);
1191
1192 cmd = SVGA3D_FIFOReserve(swc,
1193 SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS_OFFSET_AND_SIZE,
1194 sizeof(SVGA3dCmdDXSetVertexBuffersOffsetAndSize) +
1195 count * sizeof(SVGA3dVertexBufferOffsetAndSize),
1196 0); /* no relocation */
1197 if (!cmd)
1198 return PIPE_ERROR_OUT_OF_MEMORY;
1199
1200 cmd->startBuffer = startBuffer;
1201
1202 bufs = (SVGA3dVertexBufferOffsetAndSize *) &cmd[1];
1203 for (i = 0; i < count; i++) {
1204 bufs[i].stride = bufferInfo[i].stride;
1205 bufs[i].offset = bufferInfo[i].offset;
1206 bufs[i].sizeInBytes = bufferInfo[i].sizeInBytes;
1207 }
1208
1209 swc->commit(swc);
1210 return PIPE_OK;
1211 }
1212
1213 enum pipe_error
SVGA3D_vgpu10_SetTopology(struct svga_winsys_context * swc,SVGA3dPrimitiveType topology)1214 SVGA3D_vgpu10_SetTopology(struct svga_winsys_context *swc,
1215 SVGA3dPrimitiveType topology)
1216 {
1217 SVGA3D_CREATE_COMMAND(SetTopology, SET_TOPOLOGY);
1218
1219 cmd->topology = topology;
1220
1221 swc->commit(swc);
1222 return PIPE_OK;
1223 }
1224
1225 enum pipe_error
SVGA3D_vgpu10_SetIndexBuffer(struct svga_winsys_context * swc,struct svga_winsys_surface * indexes,SVGA3dSurfaceFormat format,uint32 offset)1226 SVGA3D_vgpu10_SetIndexBuffer(struct svga_winsys_context *swc,
1227 struct svga_winsys_surface *indexes,
1228 SVGA3dSurfaceFormat format,
1229 uint32 offset)
1230 {
1231 SVGA3dCmdDXSetIndexBuffer *cmd;
1232
1233 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_INDEX_BUFFER,
1234 sizeof(SVGA3dCmdDXSetIndexBuffer),
1235 1); /* one relocations */
1236 if (!cmd)
1237 return PIPE_ERROR_OUT_OF_MEMORY;
1238
1239 swc->surface_relocation(swc, &cmd->sid, NULL, indexes, SVGA_RELOC_READ);
1240 SVGA3D_COPY_BASIC_2(format, offset);
1241
1242 swc->commit(swc);
1243 return PIPE_OK;
1244 }
1245
1246 enum pipe_error
SVGA3D_vgpu10_SetIndexBuffer_v2(struct svga_winsys_context * swc,struct svga_winsys_surface * indexes,SVGA3dSurfaceFormat format,uint32 offset,uint32 sizeInBytes)1247 SVGA3D_vgpu10_SetIndexBuffer_v2(struct svga_winsys_context *swc,
1248 struct svga_winsys_surface *indexes,
1249 SVGA3dSurfaceFormat format,
1250 uint32 offset,
1251 uint32 sizeInBytes)
1252 {
1253 SVGA3dCmdDXSetIndexBuffer_v2 *cmd;
1254
1255 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_INDEX_BUFFER_V2,
1256 sizeof(SVGA3dCmdDXSetIndexBuffer),
1257 1); /* one relocations */
1258 if (!cmd)
1259 return PIPE_ERROR_OUT_OF_MEMORY;
1260
1261 swc->surface_relocation(swc, &cmd->sid, NULL, indexes, SVGA_RELOC_READ);
1262 SVGA3D_COPY_BASIC_3(format, offset, sizeInBytes);
1263
1264 swc->commit(swc);
1265 return PIPE_OK;
1266 }
1267
1268 enum pipe_error
SVGA3D_vgpu10_SetIndexBufferOffsetAndSize(struct svga_winsys_context * swc,SVGA3dSurfaceFormat format,uint32 offset,uint32 sizeInBytes)1269 SVGA3D_vgpu10_SetIndexBufferOffsetAndSize(struct svga_winsys_context *swc,
1270 SVGA3dSurfaceFormat format,
1271 uint32 offset,
1272 uint32 sizeInBytes)
1273 {
1274 SVGA3dCmdDXSetIndexBufferOffsetAndSize *cmd;
1275
1276 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_INDEX_BUFFER_OFFSET_AND_SIZE,
1277 sizeof(SVGA3dCmdDXSetIndexBufferOffsetAndSize),
1278 0); /* one relocations */
1279 if (!cmd)
1280 return PIPE_ERROR_OUT_OF_MEMORY;
1281
1282 SVGA3D_COPY_BASIC_3(format, offset, sizeInBytes);
1283
1284 swc->commit(swc);
1285 return PIPE_OK;
1286 }
1287
1288 enum pipe_error
SVGA3D_vgpu10_SetSingleConstantBuffer(struct svga_winsys_context * swc,unsigned slot,SVGA3dShaderType type,struct svga_winsys_surface * surface,uint32 offsetInBytes,uint32 sizeInBytes)1289 SVGA3D_vgpu10_SetSingleConstantBuffer(struct svga_winsys_context *swc,
1290 unsigned slot,
1291 SVGA3dShaderType type,
1292 struct svga_winsys_surface *surface,
1293 uint32 offsetInBytes,
1294 uint32 sizeInBytes)
1295 {
1296 SVGA3dCmdDXSetSingleConstantBuffer *cmd;
1297
1298 assert(offsetInBytes % 256 == 0);
1299 if (!surface)
1300 assert(sizeInBytes == 0);
1301 else
1302 assert(sizeInBytes > 0);
1303
1304 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER,
1305 sizeof(SVGA3dCmdDXSetSingleConstantBuffer),
1306 1); /* one relocation */
1307 if (!cmd)
1308 return PIPE_ERROR_OUT_OF_MEMORY;
1309
1310 cmd->slot = slot;
1311 cmd->type = type;
1312 swc->surface_relocation(swc, &cmd->sid, NULL, surface, SVGA_RELOC_READ);
1313 cmd->offsetInBytes = offsetInBytes;
1314 cmd->sizeInBytes = sizeInBytes;
1315
1316 swc->commit(swc);
1317
1318 return PIPE_OK;
1319 }
1320
1321
1322 enum pipe_error
SVGA3D_vgpu10_SetConstantBufferOffset(struct svga_winsys_context * swc,unsigned command,unsigned slot,uint32 offsetInBytes)1323 SVGA3D_vgpu10_SetConstantBufferOffset(struct svga_winsys_context *swc,
1324 unsigned command,
1325 unsigned slot,
1326 uint32 offsetInBytes)
1327 {
1328 SVGA3dCmdDXSetConstantBufferOffset *cmd;
1329
1330 assert(offsetInBytes % 256 == 0);
1331
1332 cmd = SVGA3D_FIFOReserve(swc, command,
1333 sizeof(SVGA3dCmdDXSetConstantBufferOffset),
1334 0); /* one relocation */
1335 if (!cmd)
1336 return PIPE_ERROR_OUT_OF_MEMORY;
1337
1338 cmd->slot = slot;
1339 cmd->offsetInBytes = offsetInBytes;
1340
1341 swc->commit(swc);
1342
1343 return PIPE_OK;
1344 }
1345
1346
1347 enum pipe_error
SVGA3D_vgpu10_ReadbackSubResource(struct svga_winsys_context * swc,struct svga_winsys_surface * surface,unsigned subResource)1348 SVGA3D_vgpu10_ReadbackSubResource(struct svga_winsys_context *swc,
1349 struct svga_winsys_surface *surface,
1350 unsigned subResource)
1351 {
1352 SVGA3dCmdDXReadbackSubResource *cmd;
1353
1354 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_READBACK_SUBRESOURCE,
1355 sizeof(SVGA3dCmdDXReadbackSubResource),
1356 1);
1357 if (!cmd)
1358 return PIPE_ERROR_OUT_OF_MEMORY;
1359
1360 swc->surface_relocation(swc, &cmd->sid, NULL, surface,
1361 SVGA_RELOC_READ | SVGA_RELOC_INTERNAL);
1362 cmd->subResource = subResource;
1363
1364 swc->commit(swc);
1365 return PIPE_OK;
1366 }
1367
1368 enum pipe_error
SVGA3D_vgpu10_UpdateSubResource(struct svga_winsys_context * swc,struct svga_winsys_surface * surface,const SVGA3dBox * box,unsigned subResource)1369 SVGA3D_vgpu10_UpdateSubResource(struct svga_winsys_context *swc,
1370 struct svga_winsys_surface *surface,
1371 const SVGA3dBox *box,
1372 unsigned subResource)
1373 {
1374 SVGA3dCmdDXUpdateSubResource *cmd;
1375
1376 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE,
1377 sizeof(SVGA3dCmdDXUpdateSubResource),
1378 1);
1379 if (!cmd)
1380 return PIPE_ERROR_OUT_OF_MEMORY;
1381
1382 swc->surface_relocation(swc, &cmd->sid, NULL, surface,
1383 SVGA_RELOC_WRITE | SVGA_RELOC_INTERNAL);
1384 cmd->subResource = subResource;
1385 cmd->box = *box;
1386
1387 swc->commit(swc);
1388 return PIPE_OK;
1389 }
1390
1391 enum pipe_error
SVGA3D_vgpu10_GenMips(struct svga_winsys_context * swc,SVGA3dShaderResourceViewId shaderResourceViewId,struct svga_winsys_surface * view)1392 SVGA3D_vgpu10_GenMips(struct svga_winsys_context *swc,
1393 SVGA3dShaderResourceViewId shaderResourceViewId,
1394 struct svga_winsys_surface *view)
1395 {
1396 SVGA3dCmdDXGenMips *cmd;
1397
1398 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_GENMIPS,
1399 sizeof(SVGA3dCmdDXGenMips), 1);
1400
1401 if (!cmd)
1402 return PIPE_ERROR_OUT_OF_MEMORY;
1403
1404 swc->surface_relocation(swc, &cmd->shaderResourceViewId, NULL, view,
1405 SVGA_RELOC_WRITE);
1406 cmd->shaderResourceViewId = shaderResourceViewId;
1407
1408 swc->commit(swc);
1409 return PIPE_OK;
1410 }
1411
1412
1413 enum pipe_error
SVGA3D_vgpu10_BufferCopy(struct svga_winsys_context * swc,struct svga_winsys_surface * src,struct svga_winsys_surface * dst,unsigned srcx,unsigned dstx,unsigned width)1414 SVGA3D_vgpu10_BufferCopy(struct svga_winsys_context *swc,
1415 struct svga_winsys_surface *src,
1416 struct svga_winsys_surface *dst,
1417 unsigned srcx, unsigned dstx, unsigned width)
1418 {
1419 SVGA3dCmdDXBufferCopy *cmd;
1420
1421 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_BUFFER_COPY, sizeof *cmd, 2);
1422
1423 if (!cmd)
1424 return PIPE_ERROR_OUT_OF_MEMORY;
1425
1426 swc->surface_relocation(swc, &cmd->dest, NULL, dst, SVGA_RELOC_WRITE);
1427 swc->surface_relocation(swc, &cmd->src, NULL, src, SVGA_RELOC_READ);
1428 cmd->destX = dstx;
1429 cmd->srcX = srcx;
1430 cmd->width = width;
1431
1432 swc->commit(swc);
1433 return PIPE_OK;
1434 }
1435
1436 enum pipe_error
SVGA3D_vgpu10_TransferFromBuffer(struct svga_winsys_context * swc,struct svga_winsys_surface * src,unsigned srcOffset,unsigned srcPitch,unsigned srcSlicePitch,struct svga_winsys_surface * dst,unsigned dstSubResource,SVGA3dBox * dstBox)1437 SVGA3D_vgpu10_TransferFromBuffer(struct svga_winsys_context *swc,
1438 struct svga_winsys_surface *src,
1439 unsigned srcOffset, unsigned srcPitch,
1440 unsigned srcSlicePitch,
1441 struct svga_winsys_surface *dst,
1442 unsigned dstSubResource,
1443 SVGA3dBox *dstBox)
1444 {
1445 SVGA3dCmdDXTransferFromBuffer *cmd;
1446
1447 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER,
1448 sizeof(SVGA3dCmdDXTransferFromBuffer), 2);
1449
1450 if (!cmd)
1451 return PIPE_ERROR_OUT_OF_MEMORY;
1452
1453 swc->surface_relocation(swc, &cmd->srcSid, NULL, src, SVGA_RELOC_READ);
1454 swc->surface_relocation(swc, &cmd->destSid, NULL, dst, SVGA_RELOC_WRITE);
1455 cmd->srcOffset = srcOffset;
1456 cmd->srcPitch = srcPitch;
1457 cmd->srcSlicePitch = srcSlicePitch;
1458 cmd->destSubResource = dstSubResource;
1459 cmd->destBox = *dstBox;
1460
1461 swc->commit(swc);
1462 return PIPE_OK;
1463 }
1464
1465 enum pipe_error
SVGA3D_vgpu10_IntraSurfaceCopy(struct svga_winsys_context * swc,struct svga_winsys_surface * surface,unsigned level,unsigned face,const SVGA3dCopyBox * box)1466 SVGA3D_vgpu10_IntraSurfaceCopy(struct svga_winsys_context *swc,
1467 struct svga_winsys_surface *surface,
1468 unsigned level, unsigned face,
1469 const SVGA3dCopyBox *box)
1470 {
1471 SVGA3dCmdIntraSurfaceCopy *cmd =
1472 SVGA3D_FIFOReserve(swc,
1473 SVGA_3D_CMD_INTRA_SURFACE_COPY,
1474 sizeof(SVGA3dCmdIntraSurfaceCopy),
1475 1); /* one relocation */
1476 if (!cmd)
1477 return PIPE_ERROR_OUT_OF_MEMORY;
1478
1479 swc->surface_relocation(swc, &cmd->surface.sid, NULL, surface, SVGA_RELOC_READ | SVGA_RELOC_WRITE);
1480 cmd->surface.face = face;
1481 cmd->surface.mipmap = level;
1482 cmd->box = *box;
1483
1484 swc->commit(swc);
1485
1486 return PIPE_OK;
1487 }
1488
1489 enum pipe_error
SVGA3D_vgpu10_ResolveCopy(struct svga_winsys_context * swc,unsigned dstSubResource,struct svga_winsys_surface * dst,unsigned srcSubResource,struct svga_winsys_surface * src,const SVGA3dSurfaceFormat copyFormat)1490 SVGA3D_vgpu10_ResolveCopy(struct svga_winsys_context *swc,
1491 unsigned dstSubResource,
1492 struct svga_winsys_surface *dst,
1493 unsigned srcSubResource,
1494 struct svga_winsys_surface *src,
1495 const SVGA3dSurfaceFormat copyFormat)
1496 {
1497 SVGA3dCmdDXResolveCopy *cmd =
1498 SVGA3D_FIFOReserve(swc,
1499 SVGA_3D_CMD_DX_RESOLVE_COPY,
1500 sizeof(SVGA3dCmdDXResolveCopy),
1501 2); /* two relocations */
1502 if (!cmd)
1503 return PIPE_ERROR_OUT_OF_MEMORY;
1504
1505 cmd->dstSubResource = dstSubResource;
1506 swc->surface_relocation(swc, &cmd->dstSid, NULL, dst, SVGA_RELOC_WRITE);
1507 cmd->srcSubResource = srcSubResource;
1508 swc->surface_relocation(swc, &cmd->srcSid, NULL, src, SVGA_RELOC_READ);
1509 cmd->copyFormat = copyFormat;
1510
1511 swc->commit(swc);
1512
1513 return PIPE_OK;
1514 }
1515
1516
1517 enum pipe_error
SVGA3D_sm5_DrawIndexedInstancedIndirect(struct svga_winsys_context * swc,struct svga_winsys_surface * argBuffer,unsigned argOffset)1518 SVGA3D_sm5_DrawIndexedInstancedIndirect(struct svga_winsys_context *swc,
1519 struct svga_winsys_surface *argBuffer,
1520 unsigned argOffset)
1521 {
1522 SVGA3dCmdDXDrawIndexedInstancedIndirect *cmd =
1523 SVGA3D_FIFOReserve(swc,
1524 SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED_INDIRECT,
1525 sizeof(SVGA3dCmdDXDrawIndexedInstancedIndirect),
1526 1); /* one relocation */
1527 if (!cmd)
1528 return PIPE_ERROR_OUT_OF_MEMORY;
1529
1530 swc->surface_relocation(swc, &cmd->argsBufferSid, NULL, argBuffer,
1531 SVGA_RELOC_READ);
1532 cmd->byteOffsetForArgs = argOffset;
1533
1534 swc->commit(swc);
1535
1536 return PIPE_OK;
1537 }
1538
1539
1540 enum pipe_error
SVGA3D_sm5_DrawInstancedIndirect(struct svga_winsys_context * swc,struct svga_winsys_surface * argBuffer,unsigned argOffset)1541 SVGA3D_sm5_DrawInstancedIndirect(struct svga_winsys_context *swc,
1542 struct svga_winsys_surface *argBuffer,
1543 unsigned argOffset)
1544 {
1545 SVGA3dCmdDXDrawInstancedIndirect *cmd =
1546 SVGA3D_FIFOReserve(swc,
1547 SVGA_3D_CMD_DX_DRAW_INSTANCED_INDIRECT,
1548 sizeof(SVGA3dCmdDXDrawInstancedIndirect),
1549 1); /* one relocation */
1550 if (!cmd)
1551 return PIPE_ERROR_OUT_OF_MEMORY;
1552
1553 swc->surface_relocation(swc, &cmd->argsBufferSid, NULL, argBuffer,
1554 SVGA_RELOC_READ);
1555 cmd->byteOffsetForArgs = argOffset;
1556
1557 swc->commit(swc);
1558
1559 return PIPE_OK;
1560 }
1561
1562
1563 enum pipe_error
SVGA3D_sm5_DefineUAView(struct svga_winsys_context * swc,SVGA3dUAViewId uaViewId,struct svga_winsys_surface * surface,SVGA3dSurfaceFormat format,SVGA3dResourceType resourceDimension,const SVGA3dUAViewDesc * desc)1564 SVGA3D_sm5_DefineUAView(struct svga_winsys_context *swc,
1565 SVGA3dUAViewId uaViewId,
1566 struct svga_winsys_surface *surface,
1567 SVGA3dSurfaceFormat format,
1568 SVGA3dResourceType resourceDimension,
1569 const SVGA3dUAViewDesc *desc)
1570 {
1571 SVGA3dCmdDXDefineUAView *cmd;
1572
1573 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_UA_VIEW,
1574 sizeof(SVGA3dCmdDXDefineUAView),
1575 1); /* one relocation */
1576 if (!cmd)
1577 return PIPE_ERROR_OUT_OF_MEMORY;
1578
1579 SVGA3D_COPY_BASIC_3(uaViewId, format, resourceDimension);
1580
1581 swc->surface_relocation(swc, &cmd->sid, NULL, surface,
1582 SVGA_RELOC_READ | SVGA_RELOC_WRITE);
1583
1584 cmd->desc = *desc;
1585
1586 swc->commit(swc);
1587 return PIPE_OK;
1588 }
1589
1590
1591 enum pipe_error
SVGA3D_sm5_DestroyUAView(struct svga_winsys_context * swc,SVGA3dUAViewId uaViewId)1592 SVGA3D_sm5_DestroyUAView(struct svga_winsys_context *swc,
1593 SVGA3dUAViewId uaViewId)
1594 {
1595 SVGA3D_CREATE_COMMAND(DestroyUAView, DESTROY_UA_VIEW);
1596 cmd->uaViewId = uaViewId;
1597 swc->commit(swc);
1598 return PIPE_OK;
1599 }
1600
1601
1602 enum pipe_error
SVGA3D_sm5_SetUAViews(struct svga_winsys_context * swc,uint32 uavSpliceIndex,unsigned count,const SVGA3dUAViewId ids[],struct svga_winsys_surface ** uaViews)1603 SVGA3D_sm5_SetUAViews(struct svga_winsys_context *swc,
1604 uint32 uavSpliceIndex,
1605 unsigned count,
1606 const SVGA3dUAViewId ids[],
1607 struct svga_winsys_surface **uaViews)
1608 {
1609 SVGA3dCmdDXSetUAViews *cmd;
1610 SVGA3dUAViewId *cmd_uavIds;
1611 unsigned i;
1612
1613 cmd = SVGA3D_FIFOReserve(swc,
1614 SVGA_3D_CMD_DX_SET_UA_VIEWS,
1615 sizeof(SVGA3dCmdDXSetUAViews) +
1616 count * sizeof(SVGA3dUAViewId),
1617 count); /* 'count' relocations */
1618 if (!cmd)
1619 return PIPE_ERROR_OUT_OF_MEMORY;
1620
1621 cmd->uavSpliceIndex = uavSpliceIndex;
1622 cmd_uavIds = (SVGA3dUAViewId *) (cmd + 1);
1623
1624 for (i = 0; i < count; i++, cmd_uavIds++) {
1625 swc->surface_relocation(swc, cmd_uavIds, NULL,
1626 uaViews[i],
1627 SVGA_RELOC_READ | SVGA_RELOC_WRITE);
1628 *cmd_uavIds = ids[i];
1629 }
1630
1631 swc->commit(swc);
1632 return PIPE_OK;
1633 }
1634
1635
1636 enum pipe_error
SVGA3D_sm5_Dispatch(struct svga_winsys_context * swc,const uint32 threadGroupCount[3])1637 SVGA3D_sm5_Dispatch(struct svga_winsys_context *swc,
1638 const uint32 threadGroupCount[3])
1639 {
1640 SVGA3dCmdDXDispatch *cmd;
1641
1642 cmd = SVGA3D_FIFOReserve(swc,
1643 SVGA_3D_CMD_DX_DISPATCH,
1644 sizeof(SVGA3dCmdDXDispatch),
1645 0);
1646 if (!cmd)
1647 return PIPE_ERROR_OUT_OF_MEMORY;
1648
1649 cmd->threadGroupCountX = threadGroupCount[0];
1650 cmd->threadGroupCountY = threadGroupCount[1];
1651 cmd->threadGroupCountZ = threadGroupCount[2];
1652
1653 swc->commit(swc);
1654 return PIPE_OK;
1655 }
1656
1657
1658 enum pipe_error
SVGA3D_sm5_DispatchIndirect(struct svga_winsys_context * swc,struct svga_winsys_surface * argBuffer,uint32 argOffset)1659 SVGA3D_sm5_DispatchIndirect(struct svga_winsys_context *swc,
1660 struct svga_winsys_surface *argBuffer,
1661 uint32 argOffset)
1662 {
1663 SVGA3dCmdDXDispatchIndirect *cmd;
1664
1665 cmd = SVGA3D_FIFOReserve(swc,
1666 SVGA_3D_CMD_DX_DISPATCH_INDIRECT,
1667 sizeof(SVGA3dCmdDXDispatchIndirect),
1668 1);
1669 if (!cmd)
1670 return PIPE_ERROR_OUT_OF_MEMORY;
1671
1672 swc->surface_relocation(swc, &cmd->argsBufferSid, NULL, argBuffer,
1673 SVGA_RELOC_READ);
1674 cmd->byteOffsetForArgs = argOffset;
1675
1676 swc->commit(swc);
1677 return PIPE_OK;
1678 }
1679
1680
1681 enum pipe_error
SVGA3D_sm5_SetCSUAViews(struct svga_winsys_context * swc,unsigned count,const SVGA3dUAViewId ids[],struct svga_winsys_surface ** uaViews)1682 SVGA3D_sm5_SetCSUAViews(struct svga_winsys_context *swc,
1683 unsigned count,
1684 const SVGA3dUAViewId ids[],
1685 struct svga_winsys_surface **uaViews)
1686 {
1687 SVGA3dCmdDXSetCSUAViews *cmd;
1688 SVGA3dUAViewId *cmd_uavIds;
1689 unsigned i;
1690
1691 cmd = SVGA3D_FIFOReserve(swc,
1692 SVGA_3D_CMD_DX_SET_CS_UA_VIEWS,
1693 sizeof(SVGA3dCmdDXSetCSUAViews) +
1694 count * sizeof(SVGA3dUAViewId),
1695 count); /* 'count' relocations */
1696 if (!cmd)
1697 return PIPE_ERROR_OUT_OF_MEMORY;
1698
1699 cmd->startIndex = 0;
1700 cmd_uavIds = (SVGA3dUAViewId *) (cmd + 1);
1701
1702 for (i = 0; i < count; i++, cmd_uavIds++) {
1703 swc->surface_relocation(swc, cmd_uavIds, NULL,
1704 uaViews[i],
1705 SVGA_RELOC_READ | SVGA_RELOC_WRITE);
1706 *cmd_uavIds = ids[i];
1707 }
1708
1709 swc->commit(swc);
1710 return PIPE_OK;
1711 }
1712
1713 /**
1714 * We don't want any flush between DefineStreamOutputWithMob and
1715 * BindStreamOutput because it will cause partial state in command
1716 * buffer. This function make that sure there is enough room for
1717 * both commands before issuing them
1718 */
1719
1720 enum pipe_error
SVGA3D_sm5_DefineAndBindStreamOutput(struct svga_winsys_context * swc,SVGA3dStreamOutputId soid,uint32 numOutputStreamEntries,uint32 numOutputStreamStrides,uint32 streamOutputStrideInBytes[SVGA3D_DX_MAX_SOTARGETS],struct svga_winsys_buffer * declBuf,uint32 rasterizedStream,uint32 sizeInBytes)1721 SVGA3D_sm5_DefineAndBindStreamOutput(struct svga_winsys_context *swc,
1722 SVGA3dStreamOutputId soid,
1723 uint32 numOutputStreamEntries,
1724 uint32 numOutputStreamStrides,
1725 uint32 streamOutputStrideInBytes[SVGA3D_DX_MAX_SOTARGETS],
1726 struct svga_winsys_buffer *declBuf,
1727 uint32 rasterizedStream,
1728 uint32 sizeInBytes)
1729 {
1730 unsigned i;
1731 SVGA3dCmdHeader *header;
1732 SVGA3dCmdDXDefineStreamOutputWithMob *dcmd;
1733 SVGA3dCmdDXBindStreamOutput *bcmd;
1734
1735 unsigned totalSize = 2 * sizeof(*header) +
1736 sizeof(*dcmd) + sizeof(*bcmd);
1737
1738 /* Make sure there is room for both commands */
1739 header = swc->reserve(swc, totalSize, 2);
1740 if (!header)
1741 return PIPE_ERROR_OUT_OF_MEMORY;
1742
1743 /* DXDefineStreamOutputWithMob command */
1744 header->id = SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT_WITH_MOB;
1745 header->size = sizeof(*dcmd);
1746 dcmd = (SVGA3dCmdDXDefineStreamOutputWithMob *)(header + 1);
1747 dcmd->soid= soid;
1748 dcmd->numOutputStreamEntries = numOutputStreamEntries;
1749 dcmd->numOutputStreamStrides = numOutputStreamStrides;
1750 dcmd->rasterizedStream = rasterizedStream;
1751
1752 for (i = 0; i < ARRAY_SIZE(dcmd->streamOutputStrideInBytes); i++)
1753 dcmd->streamOutputStrideInBytes[i] = streamOutputStrideInBytes[i];
1754
1755
1756 /* DXBindStreamOutput command */
1757 header = (SVGA3dCmdHeader *)(dcmd + 1);
1758
1759 header->id = SVGA_3D_CMD_DX_BIND_STREAMOUTPUT;
1760 header->size = sizeof(*bcmd);
1761 bcmd = (SVGA3dCmdDXBindStreamOutput *)(header + 1);
1762
1763 bcmd->soid = soid;
1764 bcmd->offsetInBytes = 0;
1765 swc->mob_relocation(swc, &bcmd->mobid,
1766 &bcmd->offsetInBytes, declBuf, 0,
1767 SVGA_RELOC_WRITE);
1768
1769 bcmd->sizeInBytes = sizeInBytes;
1770 bcmd->offsetInBytes = 0;
1771
1772
1773 swc->commit(swc);
1774 return PIPE_OK;
1775 }
1776
1777
1778 enum pipe_error
SVGA3D_sm5_DefineRasterizerState_v2(struct svga_winsys_context * swc,SVGA3dRasterizerStateId rasterizerId,uint8 fillMode,SVGA3dCullMode cullMode,uint8 frontCounterClockwise,int32 depthBias,float depthBiasClamp,float slopeScaledDepthBias,uint8 depthClipEnable,uint8 scissorEnable,uint8 multisampleEnable,uint8 antialiasedLineEnable,float lineWidth,uint8 lineStippleEnable,uint8 lineStippleFactor,uint16 lineStipplePattern,uint8 provokingVertexLast,uint32 forcedSampleCount)1779 SVGA3D_sm5_DefineRasterizerState_v2(struct svga_winsys_context *swc,
1780 SVGA3dRasterizerStateId rasterizerId,
1781 uint8 fillMode,
1782 SVGA3dCullMode cullMode,
1783 uint8 frontCounterClockwise,
1784 int32 depthBias,
1785 float depthBiasClamp,
1786 float slopeScaledDepthBias,
1787 uint8 depthClipEnable,
1788 uint8 scissorEnable,
1789 uint8 multisampleEnable,
1790 uint8 antialiasedLineEnable,
1791 float lineWidth,
1792 uint8 lineStippleEnable,
1793 uint8 lineStippleFactor,
1794 uint16 lineStipplePattern,
1795 uint8 provokingVertexLast,
1796 uint32 forcedSampleCount)
1797 {
1798 SVGA3D_CREATE_COMMAND(DefineRasterizerState_v2, DEFINE_RASTERIZER_STATE_V2);
1799
1800 SVGA3D_COPY_BASIC_5(rasterizerId, fillMode,
1801 cullMode, frontCounterClockwise,
1802 depthBias);
1803 SVGA3D_COPY_BASIC_6(depthBiasClamp, slopeScaledDepthBias,
1804 depthClipEnable, scissorEnable,
1805 multisampleEnable, antialiasedLineEnable);
1806 cmd->lineWidth = lineWidth;
1807 cmd->lineStippleEnable = lineStippleEnable;
1808 cmd->lineStippleFactor = lineStippleFactor;
1809 cmd->lineStipplePattern = lineStipplePattern;
1810 cmd->provokingVertexLast = provokingVertexLast;
1811 cmd->forcedSampleCount = forcedSampleCount;
1812
1813 swc->commit(swc);
1814 return PIPE_OK;
1815 }
1816