1 /*
2 * Copyright © 2017 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23 #include <stdio.h>
24 #include <time.h>
25 #include "pipe/p_defines.h"
26 #include "pipe/p_state.h"
27 #include "util/ralloc.h"
28 #include "util/u_inlines.h"
29 #include "util/format/u_format.h"
30 #include "util/u_upload_mgr.h"
31 #include "drm-uapi/i915_drm.h"
32 #include "crocus_context.h"
33 #include "crocus_perf.h"
34 #include "crocus_resource.h"
35 #include "crocus_screen.h"
36 #include "common/i915/intel_defines.h"
37 #include "common/intel_debug_identifier.h"
38 #include "common/intel_sample_positions.h"
39
40 /**
41 * The pipe->set_debug_callback() driver hook.
42 */
43 static void
crocus_set_debug_callback(struct pipe_context * ctx,const struct util_debug_callback * cb)44 crocus_set_debug_callback(struct pipe_context *ctx,
45 const struct util_debug_callback *cb)
46 {
47 struct crocus_context *ice = (struct crocus_context *)ctx;
48
49 if (cb)
50 ice->dbg = *cb;
51 else
52 memset(&ice->dbg, 0, sizeof(ice->dbg));
53 }
54
55 static bool
crocus_init_identifier_bo(struct crocus_context * ice)56 crocus_init_identifier_bo(struct crocus_context *ice)
57 {
58 void *bo_map;
59
60 bo_map = crocus_bo_map(NULL, ice->workaround_bo, MAP_READ | MAP_WRITE);
61 if (!bo_map)
62 return false;
63
64 ice->workaround_bo->kflags |= EXEC_OBJECT_CAPTURE;
65 ice->workaround_offset = ALIGN(
66 intel_debug_write_identifiers(bo_map, 4096, "Crocus"), 32);
67
68 crocus_bo_unmap(ice->workaround_bo);
69
70 return true;
71 }
72
73 /**
74 * Called from the batch module when it detects a GPU hang.
75 *
76 * In this case, we've lost our GEM context, and can't rely on any existing
77 * state on the GPU. We must mark everything dirty and wipe away any saved
78 * assumptions about the last known state of the GPU.
79 */
80 void
crocus_lost_context_state(struct crocus_batch * batch)81 crocus_lost_context_state(struct crocus_batch *batch)
82 {
83 /* The batch module doesn't have an crocus_context, because we want to
84 * avoid introducing lots of layering violations. Unfortunately, here
85 * we do need to inform the context of batch catastrophe. We know the
86 * batch is one of our context's, so hackily claw our way back.
87 */
88 struct crocus_context *ice = batch->ice;
89 struct crocus_screen *screen = batch->screen;
90 if (batch->name == CROCUS_BATCH_RENDER) {
91 screen->vtbl.init_render_context(batch);
92 } else if (batch->name == CROCUS_BATCH_COMPUTE) {
93 screen->vtbl.init_compute_context(batch);
94 } else {
95 unreachable("unhandled batch reset");
96 }
97
98 ice->state.dirty = ~0ull;
99 memset(ice->state.last_grid, 0, sizeof(ice->state.last_grid));
100 batch->state_base_address_emitted = false;
101 screen->vtbl.lost_genx_state(ice, batch);
102 }
103
104 static enum pipe_reset_status
crocus_get_device_reset_status(struct pipe_context * ctx)105 crocus_get_device_reset_status(struct pipe_context *ctx)
106 {
107 struct crocus_context *ice = (struct crocus_context *)ctx;
108
109 enum pipe_reset_status worst_reset = PIPE_NO_RESET;
110
111 /* Check the reset status of each batch's hardware context, and take the
112 * worst status (if one was guilty, proclaim guilt).
113 */
114 for (int i = 0; i < ice->batch_count; i++) {
115 /* This will also recreate the hardware contexts as necessary, so any
116 * future queries will show no resets. We only want to report once.
117 */
118 enum pipe_reset_status batch_reset =
119 crocus_batch_check_for_reset(&ice->batches[i]);
120
121 if (batch_reset == PIPE_NO_RESET)
122 continue;
123
124 if (worst_reset == PIPE_NO_RESET) {
125 worst_reset = batch_reset;
126 } else {
127 /* GUILTY < INNOCENT < UNKNOWN */
128 worst_reset = MIN2(worst_reset, batch_reset);
129 }
130 }
131
132 if (worst_reset != PIPE_NO_RESET && ice->reset.reset)
133 ice->reset.reset(ice->reset.data, worst_reset);
134
135 return worst_reset;
136 }
137
138 static void
crocus_set_device_reset_callback(struct pipe_context * ctx,const struct pipe_device_reset_callback * cb)139 crocus_set_device_reset_callback(struct pipe_context *ctx,
140 const struct pipe_device_reset_callback *cb)
141 {
142 struct crocus_context *ice = (struct crocus_context *)ctx;
143
144 if (cb)
145 ice->reset = *cb;
146 else
147 memset(&ice->reset, 0, sizeof(ice->reset));
148 }
149
150 static void
crocus_get_sample_position(struct pipe_context * ctx,unsigned sample_count,unsigned sample_index,float * out_value)151 crocus_get_sample_position(struct pipe_context *ctx,
152 unsigned sample_count,
153 unsigned sample_index,
154 float *out_value)
155 {
156 union {
157 struct {
158 float x[16];
159 float y[16];
160 } a;
161 struct {
162 float _0XOffset, _1XOffset, _2XOffset, _3XOffset,
163 _4XOffset, _5XOffset, _6XOffset, _7XOffset,
164 _8XOffset, _9XOffset, _10XOffset, _11XOffset,
165 _12XOffset, _13XOffset, _14XOffset, _15XOffset;
166 float _0YOffset, _1YOffset, _2YOffset, _3YOffset,
167 _4YOffset, _5YOffset, _6YOffset, _7YOffset,
168 _8YOffset, _9YOffset, _10YOffset, _11YOffset,
169 _12YOffset, _13YOffset, _14YOffset, _15YOffset;
170 } v;
171 } u;
172 switch (sample_count) {
173 case 1: INTEL_SAMPLE_POS_1X(u.v._); break;
174 case 2: INTEL_SAMPLE_POS_2X(u.v._); break;
175 case 4: INTEL_SAMPLE_POS_4X(u.v._); break;
176 case 8: INTEL_SAMPLE_POS_8X(u.v._); break;
177 case 16: INTEL_SAMPLE_POS_16X(u.v._); break;
178 default: unreachable("invalid sample count");
179 }
180
181 out_value[0] = u.a.x[sample_index];
182 out_value[1] = u.a.y[sample_index];
183 }
184
185 /**
186 * Destroy a context, freeing any associated memory.
187 */
188 static void
crocus_destroy_context(struct pipe_context * ctx)189 crocus_destroy_context(struct pipe_context *ctx)
190 {
191 struct crocus_context *ice = (struct crocus_context *)ctx;
192 struct crocus_screen *screen = (struct crocus_screen *)ctx->screen;
193
194 blorp_finish(&ice->blorp);
195
196 intel_perf_free_context(ice->perf_ctx);
197 if (ctx->stream_uploader)
198 u_upload_destroy(ctx->stream_uploader);
199
200 if (ice->blitter)
201 util_blitter_destroy(ice->blitter);
202 screen->vtbl.destroy_state(ice);
203
204 for (unsigned i = 0; i < ARRAY_SIZE(ice->shaders.scratch_bos); i++) {
205 for (unsigned j = 0; j < ARRAY_SIZE(ice->shaders.scratch_bos[i]); j++)
206 crocus_bo_unreference(ice->shaders.scratch_bos[i][j]);
207 }
208
209 crocus_destroy_program_cache(ice);
210 u_upload_destroy(ice->query_buffer_uploader);
211
212 crocus_bo_unreference(ice->workaround_bo);
213
214 slab_destroy_child(&ice->transfer_pool);
215 slab_destroy_child(&ice->transfer_pool_unsync);
216
217 crocus_batch_free(&ice->batches[CROCUS_BATCH_RENDER]);
218 if (ice->batches[CROCUS_BATCH_COMPUTE].ice)
219 crocus_batch_free(&ice->batches[CROCUS_BATCH_COMPUTE]);
220
221 ralloc_free(ice);
222 }
223
224 #define genX_call(devinfo, func, ...) \
225 switch ((devinfo)->verx10) { \
226 case 80: \
227 gfx8_##func(__VA_ARGS__); \
228 break; \
229 case 75: \
230 gfx75_##func(__VA_ARGS__); \
231 break; \
232 case 70: \
233 gfx7_##func(__VA_ARGS__); \
234 break; \
235 case 60: \
236 gfx6_##func(__VA_ARGS__); \
237 break; \
238 case 50: \
239 gfx5_##func(__VA_ARGS__); \
240 break; \
241 case 45: \
242 gfx45_##func(__VA_ARGS__); \
243 break; \
244 case 40: \
245 gfx4_##func(__VA_ARGS__); \
246 break; \
247 default: \
248 unreachable("Unknown hardware generation"); \
249 }
250
251 /**
252 * Create a context.
253 *
254 * This is where each context begins.
255 */
256 struct pipe_context *
crocus_create_context(struct pipe_screen * pscreen,void * priv,unsigned flags)257 crocus_create_context(struct pipe_screen *pscreen, void *priv, unsigned flags)
258 {
259 struct crocus_screen *screen = (struct crocus_screen*)pscreen;
260 const struct intel_device_info *devinfo = &screen->devinfo;
261 struct crocus_context *ice = rzalloc(NULL, struct crocus_context);
262
263 if (!ice)
264 return NULL;
265
266 struct pipe_context *ctx = &ice->ctx;
267
268 ctx->screen = pscreen;
269 ctx->priv = priv;
270
271 ctx->stream_uploader = u_upload_create_default(ctx);
272 if (!ctx->stream_uploader) {
273 ralloc_free(ice);
274 return NULL;
275 }
276 ctx->const_uploader = ctx->stream_uploader;
277
278 ctx->destroy = crocus_destroy_context;
279 ctx->set_debug_callback = crocus_set_debug_callback;
280 ctx->set_device_reset_callback = crocus_set_device_reset_callback;
281 ctx->get_device_reset_status = crocus_get_device_reset_status;
282 ctx->get_sample_position = crocus_get_sample_position;
283
284 ice->shaders.urb_size = devinfo->urb.size;
285
286 crocus_init_context_fence_functions(ctx);
287 crocus_init_blit_functions(ctx);
288 crocus_init_clear_functions(ctx);
289 crocus_init_program_functions(ctx);
290 crocus_init_resource_functions(ctx);
291 crocus_init_flush_functions(ctx);
292 crocus_init_perfquery_functions(ctx);
293
294 crocus_init_program_cache(ice);
295
296 slab_create_child(&ice->transfer_pool, &screen->transfer_pool);
297 slab_create_child(&ice->transfer_pool_unsync, &screen->transfer_pool);
298
299 ice->query_buffer_uploader =
300 u_upload_create(ctx, 4096, PIPE_BIND_CUSTOM, PIPE_USAGE_STAGING,
301 0);
302
303 ice->workaround_bo =
304 crocus_bo_alloc(screen->bufmgr, "workaround", 4096);
305 if (!ice->workaround_bo)
306 return NULL;
307
308 if (!crocus_init_identifier_bo(ice))
309 return NULL;
310
311 genX_call(devinfo, crocus_init_state, ice);
312 genX_call(devinfo, crocus_init_blorp, ice);
313 genX_call(devinfo, crocus_init_query, ice);
314
315 ice->blitter = util_blitter_create(&ice->ctx);
316 if (ice->blitter == NULL)
317 return NULL;
318 int priority = 0;
319 if (flags & PIPE_CONTEXT_HIGH_PRIORITY)
320 priority = INTEL_CONTEXT_HIGH_PRIORITY;
321 if (flags & PIPE_CONTEXT_LOW_PRIORITY)
322 priority = INTEL_CONTEXT_LOW_PRIORITY;
323
324 ice->batch_count = devinfo->ver >= 7 ? CROCUS_BATCH_COUNT : 1;
325 for (int i = 0; i < ice->batch_count; i++) {
326 crocus_init_batch(ice, (enum crocus_batch_name) i,
327 priority);
328 }
329
330 ice->urb.size = devinfo->urb.size;
331 screen->vtbl.init_render_context(&ice->batches[CROCUS_BATCH_RENDER]);
332 if (ice->batch_count > 1)
333 screen->vtbl.init_compute_context(&ice->batches[CROCUS_BATCH_COMPUTE]);
334
335 if (!(flags & PIPE_CONTEXT_PREFER_THREADED))
336 return ctx;
337
338 return threaded_context_create(ctx, &screen->transfer_pool,
339 crocus_replace_buffer_storage,
340 NULL, /* TODO: asynchronous flushes? */
341 &ice->thrctx);
342 }
343
344 bool
crocus_sw_check_cond_render(struct crocus_context * ice)345 crocus_sw_check_cond_render(struct crocus_context *ice)
346 {
347 struct crocus_query *q = ice->condition.query;
348 union pipe_query_result result;
349
350 bool wait = ice->condition.mode == PIPE_RENDER_COND_WAIT ||
351 ice->condition.mode == PIPE_RENDER_COND_BY_REGION_WAIT;
352 if (!q)
353 return true;
354
355 bool ret = ice->ctx.get_query_result(&ice->ctx, (void *)q, wait, &result);
356 if (!ret)
357 return true;
358
359 return ice->condition.condition ? result.u64 == 0 : result.u64 != 0;
360 }
361