1 /*
2 * Copyright © 2017 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23 /**
24 * @file crocus_screen.c
25 *
26 * Screen related driver hooks and capability lists.
27 *
28 * A program may use multiple rendering contexts (crocus_context), but
29 * they all share a common screen (crocus_screen). Global driver state
30 * can be stored in the screen; it may be accessed by multiple threads.
31 */
32
33 #include <stdio.h>
34 #include <errno.h>
35 #include <sys/ioctl.h>
36 #include "pipe/p_defines.h"
37 #include "pipe/p_state.h"
38 #include "pipe/p_context.h"
39 #include "pipe/p_screen.h"
40 #include "util/u_debug.h"
41 #include "util/u_inlines.h"
42 #include "util/format/u_format.h"
43 #include "util/u_transfer_helper.h"
44 #include "util/u_upload_mgr.h"
45 #include "util/ralloc.h"
46 #include "util/xmlconfig.h"
47 #include "drm-uapi/i915_drm.h"
48 #include "crocus_context.h"
49 #include "crocus_defines.h"
50 #include "crocus_fence.h"
51 #include "crocus_perf.h"
52 #include "crocus_pipe.h"
53 #include "crocus_resource.h"
54 #include "crocus_screen.h"
55 #include "intel/compiler/elk/elk_compiler.h"
56 #include "intel/common/intel_debug_identifier.h"
57 #include "intel/common/intel_gem.h"
58 #include "intel/common/intel_l3_config.h"
59 #include "intel/common/intel_uuid.h"
60 #include "crocus_monitor.h"
61
62 #define genX_call(devinfo, func, ...) \
63 switch ((devinfo)->verx10) { \
64 case 80: \
65 gfx8_##func(__VA_ARGS__); \
66 break; \
67 case 75: \
68 gfx75_##func(__VA_ARGS__); \
69 break; \
70 case 70: \
71 gfx7_##func(__VA_ARGS__); \
72 break; \
73 case 60: \
74 gfx6_##func(__VA_ARGS__); \
75 break; \
76 case 50: \
77 gfx5_##func(__VA_ARGS__); \
78 break; \
79 case 45: \
80 gfx45_##func(__VA_ARGS__); \
81 break; \
82 case 40: \
83 gfx4_##func(__VA_ARGS__); \
84 break; \
85 default: \
86 unreachable("Unknown hardware generation"); \
87 }
88
89 static const char *
crocus_get_vendor(struct pipe_screen * pscreen)90 crocus_get_vendor(struct pipe_screen *pscreen)
91 {
92 return "Intel";
93 }
94
95 static const char *
crocus_get_device_vendor(struct pipe_screen * pscreen)96 crocus_get_device_vendor(struct pipe_screen *pscreen)
97 {
98 return "Intel";
99 }
100
101 static void
crocus_get_device_uuid(struct pipe_screen * pscreen,char * uuid)102 crocus_get_device_uuid(struct pipe_screen *pscreen, char *uuid)
103 {
104 struct crocus_screen *screen = (struct crocus_screen *)pscreen;
105
106 intel_uuid_compute_device_id((uint8_t *)uuid, &screen->devinfo, PIPE_UUID_SIZE);
107 }
108
109 static void
crocus_get_driver_uuid(struct pipe_screen * pscreen,char * uuid)110 crocus_get_driver_uuid(struct pipe_screen *pscreen, char *uuid)
111 {
112 struct crocus_screen *screen = (struct crocus_screen *)pscreen;
113 const struct intel_device_info *devinfo = &screen->devinfo;
114
115 intel_uuid_compute_driver_id((uint8_t *)uuid, devinfo, PIPE_UUID_SIZE);
116 }
117
118 static const char *
crocus_get_name(struct pipe_screen * pscreen)119 crocus_get_name(struct pipe_screen *pscreen)
120 {
121 struct crocus_screen *screen = (struct crocus_screen *)pscreen;
122 const struct intel_device_info *devinfo = &screen->devinfo;
123 static char buf[128];
124
125 snprintf(buf, sizeof(buf), "Mesa %s", devinfo->name);
126 return buf;
127 }
128
129 static uint64_t
get_aperture_size(int fd)130 get_aperture_size(int fd)
131 {
132 struct drm_i915_gem_get_aperture aperture = {};
133 intel_ioctl(fd, DRM_IOCTL_I915_GEM_GET_APERTURE, &aperture);
134 return aperture.aper_size;
135 }
136
137 static int
crocus_get_param(struct pipe_screen * pscreen,enum pipe_cap param)138 crocus_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
139 {
140 struct crocus_screen *screen = (struct crocus_screen *)pscreen;
141 const struct intel_device_info *devinfo = &screen->devinfo;
142
143 switch (param) {
144 case PIPE_CAP_NPOT_TEXTURES:
145 case PIPE_CAP_ANISOTROPIC_FILTER:
146 case PIPE_CAP_OCCLUSION_QUERY:
147 case PIPE_CAP_TEXTURE_SWIZZLE:
148 case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
149 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
150 case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
151 case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
152 case PIPE_CAP_PRIMITIVE_RESTART:
153 case PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX:
154 case PIPE_CAP_INDEP_BLEND_ENABLE:
155 case PIPE_CAP_FS_COORD_ORIGIN_UPPER_LEFT:
156 case PIPE_CAP_FS_COORD_PIXEL_CENTER_INTEGER:
157 case PIPE_CAP_DEPTH_CLIP_DISABLE:
158 case PIPE_CAP_VS_INSTANCEID:
159 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
160 case PIPE_CAP_SEAMLESS_CUBE_MAP:
161 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
162 case PIPE_CAP_CONDITIONAL_RENDER:
163 case PIPE_CAP_TEXTURE_BARRIER:
164 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
165 case PIPE_CAP_START_INSTANCE:
166 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
167 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
168 case PIPE_CAP_VS_LAYER_VIEWPORT:
169 case PIPE_CAP_TES_LAYER_VIEWPORT:
170 case PIPE_CAP_ACCELERATED:
171 case PIPE_CAP_UMA:
172 case PIPE_CAP_CLIP_HALFZ:
173 case PIPE_CAP_TGSI_TEXCOORD:
174 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
175 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
176 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
177 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
178 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
179 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
180 case PIPE_CAP_TGSI_TEX_TXF_LZ:
181 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
182 case PIPE_CAP_SHADER_GROUP_VOTE:
183 case PIPE_CAP_VS_WINDOW_SPACE_POSITION:
184 case PIPE_CAP_TEXTURE_GATHER_SM5:
185 case PIPE_CAP_SHADER_ARRAY_COMPONENTS:
186 case PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTS:
187 case PIPE_CAP_FS_POSITION_IS_SYSVAL:
188 case PIPE_CAP_FS_FACE_IS_INTEGER_SYSVAL:
189 case PIPE_CAP_INVALIDATE_BUFFER:
190 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
191 case PIPE_CAP_FENCE_SIGNAL:
192 case PIPE_CAP_DEMOTE_TO_HELPER_INVOCATION:
193 case PIPE_CAP_GL_CLAMP:
194 case PIPE_CAP_LEGACY_MATH_RULES:
195 case PIPE_CAP_NATIVE_FENCE_FD:
196 return true;
197 case PIPE_CAP_INT64:
198 case PIPE_CAP_SHADER_BALLOT:
199 case PIPE_CAP_PACKED_UNIFORMS:
200 return devinfo->ver == 8;
201 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
202 return devinfo->ver <= 5;
203 case PIPE_CAP_TEXTURE_QUERY_LOD:
204 case PIPE_CAP_QUERY_TIME_ELAPSED:
205 return devinfo->ver >= 5;
206 case PIPE_CAP_DRAW_INDIRECT:
207 case PIPE_CAP_MULTI_DRAW_INDIRECT:
208 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
209 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
210 case PIPE_CAP_FS_FINE_DERIVATIVE:
211 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
212 case PIPE_CAP_SHADER_CLOCK:
213 case PIPE_CAP_TEXTURE_QUERY_SAMPLES:
214 case PIPE_CAP_COMPUTE:
215 case PIPE_CAP_SAMPLER_VIEW_TARGET:
216 case PIPE_CAP_SHADER_SAMPLES_IDENTICAL:
217 case PIPE_CAP_SHADER_PACK_HALF_FLOAT:
218 case PIPE_CAP_GL_SPIRV:
219 case PIPE_CAP_GL_SPIRV_VARIABLE_POINTERS:
220 case PIPE_CAP_COMPUTE_SHADER_DERIVATIVES:
221 case PIPE_CAP_DOUBLES:
222 case PIPE_CAP_MEMOBJ:
223 case PIPE_CAP_IMAGE_STORE_FORMATTED:
224 case PIPE_CAP_ALPHA_TO_COVERAGE_DITHER_CONTROL:
225 return devinfo->ver >= 7;
226 case PIPE_CAP_QUERY_BUFFER_OBJECT:
227 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
228 return devinfo->verx10 >= 75;
229 case PIPE_CAP_CULL_DISTANCE:
230 case PIPE_CAP_QUERY_PIPELINE_STATISTICS_SINGLE:
231 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
232 case PIPE_CAP_SAMPLE_SHADING:
233 case PIPE_CAP_CUBE_MAP_ARRAY:
234 case PIPE_CAP_QUERY_SO_OVERFLOW:
235 case PIPE_CAP_TEXTURE_MULTISAMPLE:
236 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
237 case PIPE_CAP_QUERY_TIMESTAMP:
238 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
239 case PIPE_CAP_INDEP_BLEND_FUNC:
240 case PIPE_CAP_TEXTURE_SHADOW_LOD:
241 case PIPE_CAP_LOAD_CONSTBUF:
242 case PIPE_CAP_DRAW_PARAMETERS:
243 case PIPE_CAP_CLEAR_SCISSORED:
244 return devinfo->ver >= 6;
245 case PIPE_CAP_FBFETCH:
246 return devinfo->verx10 >= 45 ? ELK_MAX_DRAW_BUFFERS : 0;
247 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
248 /* in theory CL (965gm) can do this */
249 return devinfo->verx10 >= 45 ? 1 : 0;
250 case PIPE_CAP_MAX_RENDER_TARGETS:
251 return ELK_MAX_DRAW_BUFFERS;
252 case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
253 if (devinfo->ver >= 7)
254 return 16384;
255 else
256 return 8192;
257 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
258 if (devinfo->ver >= 7)
259 return CROCUS_MAX_MIPLEVELS; /* 16384x16384 */
260 else
261 return CROCUS_MAX_MIPLEVELS - 1; /* 8192x8192 */
262 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
263 return 12; /* 2048x2048 */
264 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
265 return (devinfo->ver >= 6) ? 4 : 0;
266 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
267 return devinfo->ver >= 7 ? 2048 : 512;
268 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
269 return ELK_MAX_SOL_BINDINGS / CROCUS_MAX_SOL_BUFFERS;
270 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
271 return ELK_MAX_SOL_BINDINGS;
272 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
273 case PIPE_CAP_GLSL_FEATURE_LEVEL: {
274 if (devinfo->verx10 >= 75)
275 return 460;
276 else if (devinfo->ver >= 7)
277 return 420;
278 else if (devinfo->ver >= 6)
279 return 330;
280 return 140;
281 }
282 case PIPE_CAP_CLIP_PLANES:
283 if (devinfo->verx10 < 45)
284 return 6;
285 else
286 return 1; // defaults to MAX (8)
287 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
288 /* 3DSTATE_CONSTANT_XS requires the start of UBOs to be 32B aligned */
289 return 32;
290 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
291 return CROCUS_MAP_BUFFER_ALIGNMENT;
292 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
293 return devinfo->ver >= 7 ? 4 : 0;
294 case PIPE_CAP_MAX_SHADER_BUFFER_SIZE_UINT:
295 return devinfo->ver >= 7 ? (1 << 27) : 0;
296 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
297 return 16; // XXX: u_screen says 256 is the minimum value...
298 case PIPE_CAP_TEXTURE_TRANSFER_MODES:
299 return PIPE_TEXTURE_TRANSFER_BLIT;
300 case PIPE_CAP_MAX_TEXEL_BUFFER_ELEMENTS_UINT:
301 return CROCUS_MAX_TEXTURE_BUFFER_SIZE;
302 case PIPE_CAP_MAX_VIEWPORTS:
303 return devinfo->ver >= 6 ? 16 : 1;
304 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
305 return devinfo->ver >= 6 ? 256 : 0;
306 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
307 return devinfo->ver >= 6 ? 1024 : 0;
308 case PIPE_CAP_MAX_GS_INVOCATIONS:
309 return devinfo->ver >= 7 ? 32 : 1;
310 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
311 if (devinfo->ver >= 7)
312 return 4;
313 else if (devinfo->ver == 6)
314 return 1;
315 else
316 return 0;
317 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
318 if (devinfo->ver >= 7)
319 return -32;
320 else if (devinfo->ver == 6)
321 return -8;
322 else
323 return 0;
324 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
325 if (devinfo->ver >= 7)
326 return 31;
327 else if (devinfo->ver == 6)
328 return 7;
329 else
330 return 0;
331 case PIPE_CAP_MAX_VERTEX_STREAMS:
332 return devinfo->ver >= 7 ? 4 : 1;
333 case PIPE_CAP_VENDOR_ID:
334 return 0x8086;
335 case PIPE_CAP_DEVICE_ID:
336 return screen->pci_id;
337 case PIPE_CAP_VIDEO_MEMORY: {
338 /* Once a batch uses more than 75% of the maximum mappable size, we
339 * assume that there's some fragmentation, and we start doing extra
340 * flushing, etc. That's the big cliff apps will care about.
341 */
342 const unsigned gpu_mappable_megabytes =
343 (screen->aperture_threshold) / (1024 * 1024);
344
345 const long system_memory_pages = sysconf(_SC_PHYS_PAGES);
346 const long system_page_size = sysconf(_SC_PAGE_SIZE);
347
348 if (system_memory_pages <= 0 || system_page_size <= 0)
349 return -1;
350
351 const uint64_t system_memory_bytes =
352 (uint64_t) system_memory_pages * (uint64_t) system_page_size;
353
354 const unsigned system_memory_megabytes =
355 (unsigned) (system_memory_bytes / (1024 * 1024));
356
357 return MIN2(system_memory_megabytes, gpu_mappable_megabytes);
358 }
359 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
360 case PIPE_CAP_MAX_VARYINGS:
361 return (screen->devinfo.ver >= 6) ? 32 : 16;
362 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
363 /* AMD_pinned_memory assumes the flexibility of using client memory
364 * for any buffer (incl. vertex buffers) which rules out the prospect
365 * of using snooped buffers, as using snooped buffers without
366 * cogniscience is likely to be detrimental to performance and require
367 * extensive checking in the driver for correctness, e.g. to prevent
368 * illegal snoop <-> snoop transfers.
369 */
370 return devinfo->has_llc;
371 case PIPE_CAP_THROTTLE:
372 return screen->driconf.disable_throttling ? 0 : 1;
373
374 case PIPE_CAP_CONTEXT_PRIORITY_MASK:
375 return PIPE_CONTEXT_PRIORITY_LOW |
376 PIPE_CONTEXT_PRIORITY_MEDIUM |
377 PIPE_CONTEXT_PRIORITY_HIGH;
378
379 case PIPE_CAP_FRONTEND_NOOP:
380 return true;
381 // XXX: don't hardcode 00:00:02.0 PCI here
382 case PIPE_CAP_PCI_GROUP:
383 return 0;
384 case PIPE_CAP_PCI_BUS:
385 return 0;
386 case PIPE_CAP_PCI_DEVICE:
387 return 2;
388 case PIPE_CAP_PCI_FUNCTION:
389 return 0;
390
391 case PIPE_CAP_HARDWARE_GL_SELECT:
392 return 0;
393
394 case PIPE_CAP_TIMER_RESOLUTION:
395 return DIV_ROUND_UP(1000000000ull, devinfo->timestamp_frequency);
396
397 default:
398 return u_pipe_screen_get_param_defaults(pscreen, param);
399 }
400 return 0;
401 }
402
403 static float
crocus_get_paramf(struct pipe_screen * pscreen,enum pipe_capf param)404 crocus_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
405 {
406 struct crocus_screen *screen = (struct crocus_screen *)pscreen;
407 const struct intel_device_info *devinfo = &screen->devinfo;
408
409 switch (param) {
410 case PIPE_CAPF_MIN_LINE_WIDTH:
411 case PIPE_CAPF_MIN_LINE_WIDTH_AA:
412 case PIPE_CAPF_MIN_POINT_SIZE:
413 case PIPE_CAPF_MIN_POINT_SIZE_AA:
414 return 1;
415
416 case PIPE_CAPF_POINT_SIZE_GRANULARITY:
417 case PIPE_CAPF_LINE_WIDTH_GRANULARITY:
418 return 0.1;
419
420 case PIPE_CAPF_MAX_LINE_WIDTH:
421 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
422 if (devinfo->ver >= 6)
423 return 7.375f;
424 else
425 return 7.0f;
426
427 case PIPE_CAPF_MAX_POINT_SIZE:
428 case PIPE_CAPF_MAX_POINT_SIZE_AA:
429 return 255.0f;
430
431 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
432 return 16.0f;
433 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
434 return 15.0f;
435 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
436 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
437 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
438 return 0.0f;
439 default:
440 unreachable("unknown param");
441 }
442 }
443
444 static int
crocus_get_shader_param(struct pipe_screen * pscreen,enum pipe_shader_type p_stage,enum pipe_shader_cap param)445 crocus_get_shader_param(struct pipe_screen *pscreen,
446 enum pipe_shader_type p_stage,
447 enum pipe_shader_cap param)
448 {
449 gl_shader_stage stage = stage_from_pipe(p_stage);
450 struct crocus_screen *screen = (struct crocus_screen *)pscreen;
451 const struct intel_device_info *devinfo = &screen->devinfo;
452
453 if (p_stage == PIPE_SHADER_MESH ||
454 p_stage == PIPE_SHADER_TASK)
455 return 0;
456
457 if (devinfo->ver < 6 &&
458 p_stage != PIPE_SHADER_VERTEX &&
459 p_stage != PIPE_SHADER_FRAGMENT)
460 return 0;
461
462 if (devinfo->ver == 6 &&
463 p_stage != PIPE_SHADER_VERTEX &&
464 p_stage != PIPE_SHADER_FRAGMENT &&
465 p_stage != PIPE_SHADER_GEOMETRY)
466 return 0;
467
468 /* this is probably not totally correct.. but it's a start: */
469 switch (param) {
470 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
471 return stage == MESA_SHADER_FRAGMENT ? 1024 : 16384;
472 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
473 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
474 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
475 return stage == MESA_SHADER_FRAGMENT ? 1024 : 0;
476
477 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
478 return UINT_MAX;
479
480 case PIPE_SHADER_CAP_MAX_INPUTS:
481 if (stage == MESA_SHADER_VERTEX ||
482 stage == MESA_SHADER_GEOMETRY)
483 return 16; /* Gen7 vec4 geom backend */
484 return 32;
485 case PIPE_SHADER_CAP_MAX_OUTPUTS:
486 return 32;
487 case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
488 return 16 * 1024 * sizeof(float);
489 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
490 return devinfo->ver >= 6 ? 16 : 1;
491 case PIPE_SHADER_CAP_MAX_TEMPS:
492 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
493 case PIPE_SHADER_CAP_CONT_SUPPORTED:
494 return 0;
495 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
496 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
497 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
498 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
499 /* Lie about these to avoid st/mesa's GLSL IR lowering of indirects,
500 * which we don't want. Our compiler backend will check elk_compiler's
501 * options and call nir_lower_indirect_derefs appropriately anyway.
502 */
503 return true;
504 case PIPE_SHADER_CAP_SUBROUTINES:
505 return 0;
506 case PIPE_SHADER_CAP_INTEGERS:
507 return 1;
508 case PIPE_SHADER_CAP_INT64_ATOMICS:
509 case PIPE_SHADER_CAP_FP16:
510 return 0;
511 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
512 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
513 return (devinfo->verx10 >= 75) ? CROCUS_MAX_TEXTURE_SAMPLERS : 16;
514 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
515 if (devinfo->ver >= 7 &&
516 (p_stage == PIPE_SHADER_FRAGMENT ||
517 p_stage == PIPE_SHADER_COMPUTE))
518 return CROCUS_MAX_TEXTURE_SAMPLERS;
519 return 0;
520 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
521 return devinfo->ver >= 7 ? (CROCUS_MAX_ABOS + CROCUS_MAX_SSBOS) : 0;
522 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
523 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
524 return 0;
525 case PIPE_SHADER_CAP_SUPPORTED_IRS:
526 return 1 << PIPE_SHADER_IR_NIR;
527 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
528 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
529 case PIPE_SHADER_CAP_FP16_DERIVATIVES:
530 case PIPE_SHADER_CAP_INT16:
531 case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS:
532 case PIPE_SHADER_CAP_FP16_CONST_BUFFERS:
533 return 0;
534 default:
535 unreachable("unknown shader param");
536 }
537 }
538
539 static int
crocus_get_compute_param(struct pipe_screen * pscreen,enum pipe_shader_ir ir_type,enum pipe_compute_cap param,void * ret)540 crocus_get_compute_param(struct pipe_screen *pscreen,
541 enum pipe_shader_ir ir_type,
542 enum pipe_compute_cap param,
543 void *ret)
544 {
545 struct crocus_screen *screen = (struct crocus_screen *)pscreen;
546 const struct intel_device_info *devinfo = &screen->devinfo;
547
548 const uint32_t max_invocations = 32 * devinfo->max_cs_workgroup_threads;
549
550 if (devinfo->ver < 7)
551 return 0;
552 #define RET(x) do { \
553 if (ret) \
554 memcpy(ret, x, sizeof(x)); \
555 return sizeof(x); \
556 } while (0)
557
558 switch (param) {
559 case PIPE_COMPUTE_CAP_ADDRESS_BITS:
560 RET((uint32_t []){ 32 });
561
562 case PIPE_COMPUTE_CAP_IR_TARGET:
563 if (ret)
564 strcpy(ret, "gen");
565 return 4;
566
567 case PIPE_COMPUTE_CAP_GRID_DIMENSION:
568 RET((uint64_t []) { 3 });
569
570 case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
571 RET(((uint64_t []) { 65535, 65535, 65535 }));
572
573 case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
574 /* MaxComputeWorkGroupSize[0..2] */
575 RET(((uint64_t []) {max_invocations, max_invocations, max_invocations}));
576
577 case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
578 /* MaxComputeWorkGroupInvocations */
579 RET((uint64_t []) { max_invocations });
580
581 case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
582 /* MaxComputeSharedMemorySize */
583 RET((uint64_t []) { 64 * 1024 });
584
585 case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
586 RET((uint32_t []) { 1 });
587
588 case PIPE_COMPUTE_CAP_SUBGROUP_SIZES:
589 RET((uint32_t []) { ELK_SUBGROUP_SIZE });
590
591 case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
592 RET((uint64_t []) { max_invocations });
593
594 case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE:
595 case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
596 case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
597 case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
598 case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
599 case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
600 case PIPE_COMPUTE_CAP_MAX_SUBGROUPS:
601
602 // XXX: I think these are for Clover...
603 return 0;
604
605 default:
606 unreachable("unknown compute param");
607 }
608 }
609
610 static uint64_t
crocus_get_timestamp(struct pipe_screen * pscreen)611 crocus_get_timestamp(struct pipe_screen *pscreen)
612 {
613 struct crocus_screen *screen = (struct crocus_screen *) pscreen;
614 uint64_t result;
615
616 if (!intel_gem_read_render_timestamp(crocus_bufmgr_get_fd(screen->bufmgr),
617 screen->devinfo.kmd_type, &result))
618 return 0;
619
620 result = intel_device_info_timebase_scale(&screen->devinfo, result);
621 result &= (1ull << TIMESTAMP_BITS) - 1;
622
623 return result;
624 }
625
626 void
crocus_screen_destroy(struct crocus_screen * screen)627 crocus_screen_destroy(struct crocus_screen *screen)
628 {
629 intel_perf_free(screen->perf_cfg);
630 u_transfer_helper_destroy(screen->base.transfer_helper);
631 crocus_bufmgr_unref(screen->bufmgr);
632 disk_cache_destroy(screen->disk_cache);
633 close(screen->winsys_fd);
634 ralloc_free(screen);
635 }
636
637 static void
crocus_screen_unref(struct pipe_screen * pscreen)638 crocus_screen_unref(struct pipe_screen *pscreen)
639 {
640 crocus_pscreen_unref(pscreen);
641 }
642
643 static void
crocus_query_memory_info(struct pipe_screen * pscreen,struct pipe_memory_info * info)644 crocus_query_memory_info(struct pipe_screen *pscreen,
645 struct pipe_memory_info *info)
646 {
647 }
648
649 static const void *
crocus_get_compiler_options(struct pipe_screen * pscreen,enum pipe_shader_ir ir,enum pipe_shader_type pstage)650 crocus_get_compiler_options(struct pipe_screen *pscreen,
651 enum pipe_shader_ir ir,
652 enum pipe_shader_type pstage)
653 {
654 struct crocus_screen *screen = (struct crocus_screen *) pscreen;
655 gl_shader_stage stage = stage_from_pipe(pstage);
656 assert(ir == PIPE_SHADER_IR_NIR);
657
658 return screen->compiler->nir_options[stage];
659 }
660
661 static struct disk_cache *
crocus_get_disk_shader_cache(struct pipe_screen * pscreen)662 crocus_get_disk_shader_cache(struct pipe_screen *pscreen)
663 {
664 struct crocus_screen *screen = (struct crocus_screen *) pscreen;
665 return screen->disk_cache;
666 }
667
668 static const struct intel_l3_config *
crocus_get_default_l3_config(const struct intel_device_info * devinfo,bool compute)669 crocus_get_default_l3_config(const struct intel_device_info *devinfo,
670 bool compute)
671 {
672 bool wants_dc_cache = true;
673 bool has_slm = compute;
674 const struct intel_l3_weights w =
675 intel_get_default_l3_weights(devinfo, wants_dc_cache, has_slm);
676 return intel_get_l3_config(devinfo, w);
677 }
678
679 static void
crocus_shader_debug_log(void * data,unsigned * id,const char * fmt,...)680 crocus_shader_debug_log(void *data, unsigned *id, const char *fmt, ...)
681 {
682 struct util_debug_callback *dbg = data;
683 va_list args;
684
685 if (!dbg->debug_message)
686 return;
687
688 va_start(args, fmt);
689 dbg->debug_message(dbg->data, id, UTIL_DEBUG_TYPE_SHADER_INFO, fmt, args);
690 va_end(args);
691 }
692
693 static void
crocus_shader_perf_log(void * data,unsigned * id,const char * fmt,...)694 crocus_shader_perf_log(void *data, unsigned *id, const char *fmt, ...)
695 {
696 struct util_debug_callback *dbg = data;
697 va_list args;
698 va_start(args, fmt);
699
700 if (INTEL_DEBUG(DEBUG_PERF)) {
701 va_list args_copy;
702 va_copy(args_copy, args);
703 vfprintf(stderr, fmt, args_copy);
704 va_end(args_copy);
705 }
706
707 if (dbg->debug_message) {
708 dbg->debug_message(dbg->data, id, UTIL_DEBUG_TYPE_PERF_INFO, fmt, args);
709 }
710
711 va_end(args);
712 }
713
714 static int
crocus_screen_get_fd(struct pipe_screen * pscreen)715 crocus_screen_get_fd(struct pipe_screen *pscreen)
716 {
717 struct crocus_screen *screen = (struct crocus_screen *)pscreen;
718
719 return screen->winsys_fd;
720 }
721
722 struct pipe_screen *
crocus_screen_create(int fd,const struct pipe_screen_config * config)723 crocus_screen_create(int fd, const struct pipe_screen_config *config)
724 {
725 struct crocus_screen *screen = rzalloc(NULL, struct crocus_screen);
726 if (!screen)
727 return NULL;
728
729 if (!intel_get_device_info_from_fd(fd, &screen->devinfo, 4, 8))
730 return NULL;
731 screen->pci_id = screen->devinfo.pci_device_id;
732
733 if (screen->devinfo.ver > 8)
734 return NULL;
735
736 if (screen->devinfo.ver == 8) {
737 /* bind to cherryview or bdw if forced */
738 if (screen->devinfo.platform != INTEL_PLATFORM_CHV &&
739 !getenv("CROCUS_GEN8"))
740 return NULL;
741 }
742
743 p_atomic_set(&screen->refcount, 1);
744
745 screen->aperture_bytes = get_aperture_size(fd);
746 screen->aperture_threshold = screen->aperture_bytes * 3 / 4;
747
748 driParseConfigFiles(config->options, config->options_info, 0, "crocus",
749 NULL, NULL, NULL, 0, NULL, 0);
750
751 bool bo_reuse = false;
752 int bo_reuse_mode = driQueryOptioni(config->options, "bo_reuse");
753 switch (bo_reuse_mode) {
754 case DRI_CONF_BO_REUSE_DISABLED:
755 break;
756 case DRI_CONF_BO_REUSE_ALL:
757 bo_reuse = true;
758 break;
759 }
760
761 screen->bufmgr = crocus_bufmgr_get_for_fd(&screen->devinfo, fd, bo_reuse);
762 if (!screen->bufmgr)
763 return NULL;
764 screen->fd = crocus_bufmgr_get_fd(screen->bufmgr);
765 screen->winsys_fd = fd;
766
767 process_intel_debug_variable();
768
769 screen->driconf.dual_color_blend_by_location =
770 driQueryOptionb(config->options, "dual_color_blend_by_location");
771 screen->driconf.disable_throttling =
772 driQueryOptionb(config->options, "disable_throttling");
773 screen->driconf.always_flush_cache =
774 driQueryOptionb(config->options, "always_flush_cache");
775 screen->driconf.limit_trig_input_range =
776 driQueryOptionb(config->options, "limit_trig_input_range");
777 screen->driconf.lower_depth_range_rate =
778 driQueryOptionf(config->options, "lower_depth_range_rate");
779
780 screen->precompile = debug_get_bool_option("shader_precompile", true);
781
782 isl_device_init(&screen->isl_dev, &screen->devinfo);
783
784 screen->compiler = elk_compiler_create(screen, &screen->devinfo);
785 screen->compiler->shader_debug_log = crocus_shader_debug_log;
786 screen->compiler->shader_perf_log = crocus_shader_perf_log;
787 screen->compiler->supports_shader_constants = false;
788 screen->compiler->constant_buffer_0_is_relative = true;
789
790 if (screen->devinfo.ver >= 7) {
791 screen->l3_config_3d = crocus_get_default_l3_config(&screen->devinfo, false);
792 screen->l3_config_cs = crocus_get_default_l3_config(&screen->devinfo, true);
793 }
794
795 crocus_disk_cache_init(screen);
796
797 slab_create_parent(&screen->transfer_pool,
798 sizeof(struct crocus_transfer), 64);
799
800 struct pipe_screen *pscreen = &screen->base;
801
802 crocus_init_screen_fence_functions(pscreen);
803 crocus_init_screen_resource_functions(pscreen);
804
805 pscreen->destroy = crocus_screen_unref;
806 pscreen->get_name = crocus_get_name;
807 pscreen->get_vendor = crocus_get_vendor;
808 pscreen->get_device_vendor = crocus_get_device_vendor;
809 pscreen->get_screen_fd = crocus_screen_get_fd;
810 pscreen->get_param = crocus_get_param;
811 pscreen->get_shader_param = crocus_get_shader_param;
812 pscreen->get_compute_param = crocus_get_compute_param;
813 pscreen->get_paramf = crocus_get_paramf;
814 pscreen->get_compiler_options = crocus_get_compiler_options;
815 pscreen->get_device_uuid = crocus_get_device_uuid;
816 pscreen->get_driver_uuid = crocus_get_driver_uuid;
817 pscreen->get_disk_shader_cache = crocus_get_disk_shader_cache;
818 pscreen->is_format_supported = crocus_is_format_supported;
819 pscreen->context_create = crocus_create_context;
820 pscreen->get_timestamp = crocus_get_timestamp;
821 pscreen->query_memory_info = crocus_query_memory_info;
822 pscreen->get_driver_query_group_info = crocus_get_monitor_group_info;
823 pscreen->get_driver_query_info = crocus_get_monitor_info;
824
825 genX_call(&screen->devinfo, crocus_init_screen_state, screen);
826 genX_call(&screen->devinfo, crocus_init_screen_query, screen);
827 return pscreen;
828 }
829