1 /*****************************************************************************
2 *
3 * Copyright (c) 2019, Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
14 * its contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
19 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
20 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
21 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
22 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
24 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
26 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 ***************************************************************************/
29
30 #ifndef _BL_SYSCALL_PUBLIC_H_
31 #define _BL_SYSCALL_PUBLIC_H_
32
33 #include <bl_uapp/bl_errorcodes_public.h>
34 #include <stdint.h>
35
36 #define SVC_EXIT 0x00
37 #define SVC_MAP_USER_STACK 0x01
38 #define SVC_DEBUG_PRINT 0x06
39 #define SVC_MODEXP 0x0C
40 #define SVC_RSAPSS_VERIFY 0x0D
41 #define SVC_DEBUG_PRINT_EX 0x1A
42 #define SVC_WAIT_10NS_MULTIPLE 0x1B
43 #define SVC_GET_BOOT_MODE 0x1C
44 #define SVC_DELAY_IN_MICRO_SECONDS 0x2F
45 #define SVC_GET_SPI_INFO 0x35
46 #define SVC_MAP_FCH_IO_DEVICE 0x36
47 #define SVC_UNMAP_FCH_IO_DEVICE 0x37
48 #define SVC_MAP_SPIROM_DEVICE 0x38
49 #define SVC_UNMAP_SPIROM_DEVICE 0x39
50 #define SVC_UPDATE_PSP_BIOS_DIR 0x40
51 #define SVC_COPY_DATA_FROM_UAPP 0x41
52 #define SVC_READ_TIMER_VAL 0x42
53 #define SVC_RESET_SYSTEM 0x43
54 #define SVC_WRITE_POSTCODE 0x44
55 #define SVC_GET_MAX_WORKBUF_SIZE 0x45
56 #define SVC_SHA 0x46
57 #define SVC_RSAPKCS_VERIFY 0x47
58
59 /* Bit definitions for the psp_info field in the PSP transfer_info_struct */
60 #define PSP_INFO_PRODUCTION_MODE 0x00000001UL
61 #define PSP_INFO_PRODUCTION_SILICON 0x00000002UL
62 #define PSP_INFO_VALID 0x80000000UL
63
64 struct mod_exp_params {
65 char *pExponent; // Exponent address
66 unsigned int ExpSize; // Exponent size in bytes
67 char *pModulus; // Modulus address
68 unsigned int ModulusSize; // Modulus size in bytes
69 char *pMessage; // Message address, same size as ModulusSize
70 char *pOutput; // Output address; Must be big enough to hold the
71 // data of ModulusSize
72 };
73
74 struct rsapss_verify_params {
75 char *pHash; // Message digest to verify the RSA signature
76 unsigned int HashLen; // hash length in bytes
77 char *pModulus; // Modulus address
78 unsigned int ModulusSize; // Modulus length in bytes
79 char *pExponent; // Exponent address
80 unsigned int ExpSize; // Exponent length in bytes
81 char *pSig; // Signature to be verified, same size as ModulusSize
82 };
83
84 struct rsapkcs_verify_params {
85 char *pHash; // Message digest to verify the RSA signature
86 unsigned int HashLen; // hash length in bytes
87 char *pModulus; // Modulus address
88 unsigned int ModulusSize; // Modulus length in bytes
89 char *pExponent; // Exponent address
90 unsigned int ExpSize; // Exponent length in bytes
91 char *pSig; // Signature to be verified, same size as ModulusSize
92 };
93
94 enum psp_boot_mode {
95 PSP_BOOT_MODE_S0 = 0x0,
96 PSP_BOOT_MODE_S0i3_RESUME = 0x1,
97 PSP_BOOT_MODE_S3_RESUME = 0x2,
98 PSP_BOOT_MODE_S4 = 0x3,
99 PSP_BOOT_MODE_S5_COLD = 0x4,
100 PSP_BOOT_MODE_S5_WARM = 0x5,
101 };
102
103 enum fch_io_device {
104 FCH_IO_DEVICE_SPI,
105 FCH_IO_DEVICE_I2C,
106 FCH_IO_DEVICE_GPIO,
107 FCH_IO_DEVICE_ESPI,
108 FCH_IO_DEVICE_IOMUX,
109 FCH_IO_DEVICE_MISC,
110 FCH_IO_DEVICE_AOAC,
111 FCH_IO_DEVICE_IOPORT,
112
113 FCH_IO_DEVICE_END,
114 };
115
116 /* Svc_UpdatePspBiosDir can be used to GET or SET the PSP or BIOS directory
117 * offsets. This enum is used to specify whether it is a GET or SET operation.
118 */
119 enum dir_offset_operation {
120 DIR_OFFSET_GET = 0x0,
121 DIR_OFFSET_SET,
122 DIR_OFFSET_OPERATION_MAX
123 };
124
125 enum fch_i2c_controller_id {
126 FCH_I2C_CONTROLLER_ID_2 = 2,
127 FCH_I2C_CONTROLLER_ID_3 = 3,
128 FCH_I2C_CONTROLLER_ID_4 = 4,
129 FCH_I2C_CONTROLLER_ID_MAX,
130 };
131
132 enum uapp_copybuf {
133 UAPP_COPYBUF_CHROME_WORKBUF = 0x0,
134 UAPP_COPYBUF_MAX = 0x1,
135 };
136
137 struct spirom_info {
138 void *SpiBiosSysHubBase;
139 void *SpiBiosSmnBase;
140 uint32_t SpiBiosSize;
141 };
142
143 enum psp_timer_type {
144 PSP_TIMER_TYPE_CHRONO = 0,
145 PSP_TIMER_TYPE_RTC = 1,
146 PSP_TIMER_TYPE_MAX = 2,
147 };
148
149 enum reset_type {
150 RESET_TYPE_COLD = 0,
151 RESET_TYPE_WARM = 1,
152 RESET_TYPE_MAX = 2,
153 };
154
155 /* SHA types same as ccp SHA type in crypto.h */
156 enum sha_type {
157 SHA_TYPE_256,
158 SHA_TYPE_512
159 };
160
161 /* All SHA operation supported */
162 enum sha_operation_mode {
163 SHA_GENERIC
164 };
165
166 /* SHA Supported Data Structures */
167 struct sha_generic_data {
168 enum sha_type SHAType;
169 uint8_t *Data;
170 uint32_t DataLen;
171 uint32_t DataMemType;
172 uint8_t *Digest;
173 uint32_t DigestLen;
174 uint8_t *IntermediateDigest;
175 uint32_t IntermediateMsgLen;
176 uint32_t Init;
177 uint32_t Eom;
178 };
179
180 /*
181 * Exit to the main Boot Loader. This does not return back to user application.
182 *
183 * Parameters:
184 * status - either Ok or error code defined by AGESA
185 */
186 void svc_exit(uint32_t status);
187
188 /* Maps buffer for stack usage.
189 *
190 * Parameters:
191 * start_addr - start address of the stack buffer
192 * end_addr - end of the stack buffer
193 * stack_va - [out] mapped stack Virtual Address
194 *
195 * Return value: BL_OK or error code
196 */
197 uint32_t svc_map_user_stack(void *start_addr,
198 void *end_addr, void *stack_va);
199
200 /* Print debug message into serial console.
201 *
202 * Parameters:
203 * string - null-terminated string
204 */
205 void svc_debug_print(const char *string);
206
207 /* Print 4 DWORD values in hex to serial console
208 *
209 * Parameters:
210 * dword0...dword3 - 32-bit DWORD to print
211 */
212 void svc_debug_print_ex(uint32_t dword0,
213 uint32_t dword1, uint32_t dword2, uint32_t dword3);
214
215 /* Waits in a blocking call for multiples of 10ns (100MHz timer) before returning
216 *
217 * Parameters:
218 * multiple - The number of multiples of 10ns to wait
219 *
220 * Return value: BL_OK, or BL_ERR_TIMER_PARAM_OVERFLOW
221 */
222 uint32_t svc_wait_10ns_multiple(uint32_t multiple);
223
224 /* Description - Returns the current boot mode from the enum psp_boot_mode found in
225 * bl_public.h.
226 *
227 * Inputs - boot_mode - Output parameter passed in R0
228 *
229 * Outputs - The boot mode in boot_mode.
230 * See Return Values.
231 *
232 * Return Values - BL_OK
233 * BL_ERR_NULL_PTR
234 * Other BL_ERRORs lofted up from called functions
235 */
236 uint32_t svc_get_boot_mode(uint32_t *boot_mode);
237
238 /* Add delay in micro seconds
239 *
240 * Parameters:
241 * delay - required delay value in microseconds
242 *
243 * Return value: NONE
244 */
245 void svc_delay_in_usec(uint32_t delay);
246
247 /* Get the SPI-ROM information
248 *
249 * Parameters:
250 * spi_rom_iInfo - SPI-ROM information
251 *
252 * Return value: BL_OK or error code
253 */
254 uint32_t svc_get_spi_rom_info(struct spirom_info *spi_rom_info);
255
256 /* Map the FCH IO device register space (SPI/I2C/GPIO/eSPI/etc...)
257 *
258 * Parameters:
259 * io_device - ID for respective FCH IO controller register space to be mapped
260 * arg1 - Based on IODevice ID, interpretation of this argument changes.
261 * arg2 - Based on IODevice ID, interpretation of this argument changes.
262 * io_device_axi_addr - AXI address for respective FCH IO device register space
263 *
264 * Return value: BL_OK or error code
265 */
266 uint32_t svc_map_fch_dev(enum fch_io_device io_device,
267 uint32_t arg1, uint32_t arg2, void **io_device_axi_addr);
268
269 /* Unmap the FCH IO device register space mapped earlier using Svc_MapFchIODevice()
270 *
271 * Parameters:
272 * io_device - ID for respective FCH IO controller register space to be unmapped
273 * io_device_addr - AXI address for respective FCH IO device register space
274 *
275 * Return value: BL_OK or error code
276 */
277 uint32_t svc_unmap_fch_dev(enum fch_io_device io_device,
278 void *io_device_axi_addr);
279
280 /* Map the SPIROM FLASH device address space
281 *
282 * Parameters:
283 * SpiRomAddr - Address in SPIROM tobe mapped (SMN based)
284 * size - Size to be mapped
285 * pSpiRomAddrAxi - Mapped address in AXI space
286 *
287 * Return value: BL_OK or error code
288 */
289 uint32_t svc_map_spi_rom(void *spi_rom_addr,
290 uint32_t size, void **spi_rom_axi_addr);
291
292 /* Unmap the SPIROM FLASH device address space mapped earlier using Svc_MapSpiRomDevice()
293 *
294 * Parameters:
295 * pSpiRomAddrAxi - Address in AXI address space previously mapped
296 *
297 * Return value: BL_OK or error code
298 */
299 uint32_t svc_unmap_spi_rom(void *spi_rom_addr);
300
301 /* Updates the offset at which PSP or BIOS Directory can be found in the
302 * SPI flash
303 *
304 * Parameters:
305 * psp_dir_offset - [in/out] Offset at which PSP Directory can be
306 * found in the SPI Flash. Same pointer is used
307 * to return the offset in case of GET operation
308 * bios_dir_offset - [in/out] Offset at which BIOS Directory can be
309 * found in the SPI Flash. Same pointer is used
310 * to return the offset in case of GET operation
311 * operation - [in] Specifies whether this call is used for
312 * getting or setting the offset.
313 *
314 * Return value: BL_OK or error code
315 */
316 uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset,
317 uint32_t *bios_dir_offset, enum dir_offset_operation operation);
318
319 /* Copies the data that is shared by verstage to the PSP BL owned memory
320 *
321 * Parameters:
322 * type - enum
323 * address - Address in UAPP controlled/owned memory
324 * size - Total size of memory to copy (max 16Kbytes)
325 */
326 uint32_t svc_save_uapp_data(enum uapp_copybuf type, void *address,
327 uint32_t size);
328
329 /*
330 * Read timer raw (currently CHRONO and RTC) value
331 *
332 * Parameters:
333 * Type - Type of timer UAPP would like to read from
334 * (currently CHRONO and RTC)
335 * counter_value - [out] return the raw counter value read from
336 * RTC or CHRONO_LO/HI counter register
337 */
338 uint32_t svc_read_timer_val(enum psp_timer_type type, uint64_t *counter_value );
339
340 /*
341 * Reset the system
342 *
343 * Parameters:
344 * reset_type - Cold or Warm reset
345 */
346 uint32_t svc_reset_system(enum reset_type reset_type);
347
348 /*
349 * Write postcode to Port-80
350 *
351 * Parameters:
352 * postcode - Postcode value to be written on port-80h
353 */
354 uint32_t svc_write_postcode(uint32_t postcode);
355
356 /*
357 * Get the max size of workbuf memory supported by PSP BL
358 *
359 * Parameters:
360 * size - [out] Max size supported by PSP BL for workbuf copy
361 */
362 uint32_t svc_get_max_workbuf_size(uint32_t *size);
363
364 /*
365 * Generic SHA call for SHA, SHA_OTP, SHA_HMAC
366 */
367 uint32_t svc_crypto_sha(struct sha_generic_data *sha_op, enum sha_operation_mode sha_mode);
368
369 /*
370 * RSA PSS Verification of signature and data
371 *
372 * Parameters:
373 * rsapss_verify_params - Pointer to RSA PSS parameters
374 *
375 * Return value: BL_OK or error code
376 */
377 uint32_t svc_rsa_pss_verify(const struct rsapss_verify_params *params);
378
379 /*
380 * RSA PKCS Verification of signature and data
381 *
382 * Parameters:
383 * struct rsapkcs_verify_params - Pointer to RSA PKCS parameters
384 *
385 * Return value: BL_OK or error code
386 */
387 uint32_t svc_rsa_pkcs_verify(const struct rsapkcs_verify_params *params);
388
389 /* Calculate ModEx
390 *
391 * Parameters:
392 * mod_exp_param - ModExp parameters
393 *
394 * Return value: BL_OK or error code
395 */
396 uint32_t svc_modexp(struct mod_exp_params *mod_exp_param);
397
398 /*
399 * Copies the data from source to destination using ccp
400 *
401 * Parameters:
402 * Source Address - SPI ROM offset
403 * Destination Address - Address in Verstage memory
404 * Size - Total size to copy
405 *
406 * Return value: BL_OK or error code
407 */
svc_ccp_dma(uint32_t spi_rom_offset,void * dest,uint32_t size)408 static inline uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size)
409 {
410 return BL_ERR_UNSUPPORTED_PLATFORM;
411 }
412
413 /* C entry point for the Bootloader Userspace Application */
414 void Main(void);
415
416 #endif /* _BL_SYSCALL__PUBLIC_H_ */
417