Searched defs:divider (Results 1 – 9 of 9) sorted by relevance
/btstack/port/renesas-tb-s1ja-cc256x/template/btstack_example/synergy/ssp/src/driver/r_cgc/ |
H A D | r_cgc.c | 935 ssp_err_t R_CGC_BusClockOutCfg (cgc_bclockout_dividers_t divider) in R_CGC_BusClockOutCfg() 987 ssp_err_t R_CGC_ClockOutCfg (cgc_clock_t clock, cgc_clockout_dividers_t divider) in R_CGC_ClockOutCfg() 1249 ssp_err_t R_CGC_USBClockCfg (cgc_usb_clock_div_t divider) in R_CGC_USBClockCfg() 1831 uint32_t divider = 0U; in r_cgc_init_pllfreq() local 2231 static void r_cgc_pll_divider_set (R_SYSTEM_Type * p_system_reg, cgc_pll_div_t divider) in r_cgc_pll_divider_set() 2368 uint32_t divider; in r_cgc_clock_divider_get() local 2429 uint32_t divider; in r_cgc_clock_hzget() local 2442 static uint32_t r_cgc_clockhz_calculate (cgc_clock_t source_clock, cgc_sys_clock_div_t divider) in r_cgc_clockhz_calculate() 2505 …cgc_clockout_cfg (R_SYSTEM_Type * p_system_reg, cgc_clock_t clock, cgc_clockout_dividers_t divider) in r_cgc_clockout_cfg()
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/btstack/port/msp432p401lp-cc256x/ti/devices/msp432p4xx/driverlib/ |
H A D | lcd_f.c | 81 uint_fast16_t divider, uint_fast16_t mode) in LCD_F_setBlinkingControl() 90 uint_fast16_t divider, uint_fast16_t frames) in LCD_F_setAnimationControl()
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H A D | cs.c | 52 bool _CSIsClockDividerValid(uint8_t divider) in _CSIsClockDividerValid()
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/btstack/port/renesas-tb-s1ja-cc256x/template/btstack_example/synergy/ssp/src/driver/r_cgc/hw/ |
H A D | hw_cgc.h | 415 …_INLINE void HW_CGC_BusClockOutCfg (R_SYSTEM_Type * p_system_reg, cgc_bclockout_dividers_t divider) in HW_CGC_BusClockOutCfg() 489 __STATIC_INLINE void HW_CGC_USBClockCfg (R_SYSTEM_Type * p_system_reg, cgc_usb_clock_div_t divider) in HW_CGC_USBClockCfg()
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/btstack/port/samv71-xplained-atwilc3000/ASF/common/services/clock/ |
H A D | genclk.h | 186 …tic inline void genclk_enable_config(unsigned int id, enum genclk_source src, unsigned int divider) in genclk_enable_config()
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/btstack/port/msp432p401lp-cc256x/ |
H A D | system_msp432p401r.c | 103 uint32_t source = 0, divider = 0, dividerValue = 0, centeredFreq = 0, calVal = 0; in SystemCoreClockUpdate() local
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/btstack/port/renesas-ek-ra6m4a-da14531/e2-project/ra/fsp/src/bsp/mcu/all/ |
H A D | bsp_mcu_api.h | 56 bsp_clocks_octaclk_div_t divider; ///< OCTACLK divider member
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/btstack/port/renesas-tb-s1ja-cc256x/template/btstack_example/synergy/ssp/inc/driver/api/ |
H A D | r_cgc_api.h | 125 cgc_pll_div_t divider; ///< PLL divider. member
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/btstack/port/renesas-ek-ra6m4a-da14531/e2-project/ra/fsp/inc/api/ |
H A D | r_cgc_api.h | 164 cgc_pll_div_t divider; ///< PLL divider member
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