| /aosp_15_r20/external/iproute2/devlink/ |
| H A D | devlink.c | 203 struct dl { struct
209 struct dl_opts opts; argument
222 static int dl_argc(struct dl *dl) in dl_argc()
227 static char *dl_argv(struct dl *dl) in dl_argv()
234 static void dl_arg_inc(struct dl *dl) in dl_arg_inc()
242 static char *dl_argv_next(struct dl *dl) in dl_argv_next()
254 static char *dl_argv_index(struct dl *dl, unsigned int index) in dl_argv_index()
268 static bool dl_argv_match(struct dl *dl, const char *pattern) in dl_argv_match()
275 static bool dl_no_arg(struct dl *dl) in dl_no_arg()
360 struct dl *dl = data; in ifname_map_cb() local
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| /aosp_15_r20/external/rust/android-crates-io/crates/annotate-snippets/tests/ |
| D | formatter.rs | 6 let dl = DisplayList::from(vec![DisplayLine::Source { in test_source_empty() localVariable
17 let dl = DisplayList::from(vec![ in test_source_content() localVariable
44 let dl = DisplayList::from(vec![DisplayLine::Source { in test_source_annotation_standalone_singleline() localVariable
67 let dl = DisplayList::from(vec![ in test_source_annotation_standalone_multiline() localVariable
112 let dl = DisplayList::from(vec![ in test_source_annotation_standalone_multi_annotation() localVariable
239 let dl = DisplayList::from(vec![ in test_fold_line() localVariable
269 let dl = DisplayList::from(vec![DisplayLine::Raw(DisplayRawLine::Origin { in test_raw_origin_initial_nopos() localVariable
280 let dl = DisplayList::from(vec![DisplayLine::Raw(DisplayRawLine::Origin { in test_raw_origin_initial_pos() localVariable
291 let dl = DisplayList::from(vec![DisplayLine::Raw(DisplayRawLine::Origin { in test_raw_origin_continuation() localVariable
302 let dl = DisplayList::from(vec![DisplayLine::Raw(DisplayRawLine::Annotation { in test_raw_annotation_unaligned() localVariable
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| /aosp_15_r20/bionic/tests/ |
| H A D | dl_test.cpp | 67 TEST(dl, main_preempts_global_default) { in TEST() argument
73 TEST(dl, main_does_not_preempt_global_protected) { in TEST() argument
78 TEST(dl, lib_preempts_global_default) { in TEST() argument
82 TEST(dl, lib_does_not_preempt_global_protected) { in TEST() argument
107 TEST(dl, exec_linker) { in TEST() argument
118 TEST(dl, exec_linker_load_file) { in TEST() argument
134 TEST(dl, exec_linker_load_from_zip) { in TEST() argument
151 TEST(dl, exec_linker_load_self) { in TEST() argument
161 TEST(dl, preinit_system_calls) { in TEST() argument
171 TEST(dl, preinit_getauxval) { in TEST() argument
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| /aosp_15_r20/external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 255 SDLoc dl(N); in PromoteIntRes_BITCAST() local
316 SDLoc dl(N); in PromoteIntRes_BSWAP() local
329 SDLoc dl(N); in PromoteIntRes_BITREVERSE() local
350 SDLoc dl(N); in PromoteIntRes_Constant() local
376 SDLoc dl(N); in PromoteIntRes_CTLZ() local
397 SDLoc dl(N); in PromoteIntRes_CTTZ() local
410 SDLoc dl(N); in PromoteIntRes_EXTRACT_VECTOR_ELT() local
419 SDLoc dl(N); in PromoteIntRes_FP_TO_XINT() local
442 SDLoc dl(N); in PromoteIntRes_FP_TO_FP16() local
449 SDLoc dl(N); in PromoteIntRes_INT_EXTEND() local
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| H A D | LegalizeVectorTypes.cpp | 535 SDLoc dl(N); in ScalarizeVecOp_STORE() local
714 SDLoc dl(N); in SplitVecRes_BinOp() local
730 SDLoc dl(N); in SplitVecRes_TernaryOp() local
744 SDLoc dl(N); in SplitVecRes_BITCAST() local
798 SDLoc dl(N); in SplitVecRes_BUILD_VECTOR() local
811 SDLoc dl(N); in SplitVecRes_CONCAT_VECTORS() local
833 SDLoc dl(N); in SplitVecRes_EXTRACT_SUBVECTOR() local
850 SDLoc dl(N); in SplitVecRes_INSERT_SUBVECTOR() local
903 SDLoc dl(N); in SplitVecRes_FPOWI() local
932 SDLoc dl(N); in SplitVecRes_InregOp() local
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| H A D | LegalizeTypesGeneric.cpp | 46 SDLoc dl(N); in ExpandRes_BITCAST() local
220 SDLoc dl(N); in ExpandRes_EXTRACT_VECTOR_ELT() local
258 SDLoc dl(N); in ExpandRes_NormalLoad() local
305 SDLoc dl(N); in ExpandRes_VAARG() local
345 SDLoc dl(N); in ExpandOp_BITCAST() local
386 SDLoc dl(N); in ExpandOp_BUILD_VECTOR() local
424 SDLoc dl(N); in ExpandOp_INSERT_VECTOR_ELT() local
457 SDLoc dl(N); in ExpandOp_SCALAR_TO_VECTOR() local
473 SDLoc dl(N); in ExpandOp_NormalStore() local
526 SDLoc dl(N); in SplitRes_SELECT() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 293 SDLoc dl(N); in PromoteIntRes_BITCAST() local
403 SDLoc dl(N); in PromoteIntRes_BSWAP() local
415 SDLoc dl(N); in PromoteIntRes_BITREVERSE() local
436 SDLoc dl(N); in PromoteIntRes_Constant() local
450 SDLoc dl(N); in PromoteIntRes_CTLZ() local
471 SDLoc dl(N); in PromoteIntRes_CTTZ() local
484 SDLoc dl(N); in PromoteIntRes_EXTRACT_VECTOR_ELT() local
511 SDLoc dl(N); in PromoteIntRes_FP_TO_XINT() local
552 SDLoc dl(N); in PromoteIntRes_FP_TO_FP16() local
559 SDLoc dl(N); in PromoteIntRes_FLT_ROUNDS() local
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| H A D | LegalizeVectorTypes.cpp | 207 SDLoc dl(N); in ScalarizeVecRes_StrictFPOp() local
746 SDLoc dl(N); in ScalarizeVecOp_STORE() local
980 SDLoc dl(N); in SplitVecRes_BinOp() local
996 SDLoc dl(N); in SplitVecRes_TernaryOp() local
1009 SDLoc dl(N); in SplitVecRes_FIX() local
1023 SDLoc dl(N); in SplitVecRes_BITCAST() local
1077 SDLoc dl(N); in SplitVecRes_BUILD_VECTOR() local
1090 SDLoc dl(N); in SplitVecRes_CONCAT_VECTORS() local
1112 SDLoc dl(N); in SplitVecRes_EXTRACT_SUBVECTOR() local
1129 SDLoc dl(N); in SplitVecRes_INSERT_SUBVECTOR() local
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| H A D | LegalizeTypesGeneric.cpp | 45 SDLoc dl(N); in ExpandRes_BITCAST() local
208 SDLoc dl(N); in ExpandRes_EXTRACT_VECTOR_ELT() local
246 SDLoc dl(N); in ExpandRes_NormalLoad() local
289 SDLoc dl(N); in ExpandRes_VAARG() local
330 SDLoc dl(N); in ExpandOp_BITCAST() local
372 SDLoc dl(N); in ExpandOp_BUILD_VECTOR() local
408 SDLoc dl(N); in ExpandOp_INSERT_VECTOR_ELT() local
441 SDLoc dl(N); in ExpandOp_SCALAR_TO_VECTOR() local
457 SDLoc dl(N); in ExpandOp_NormalStore() local
507 SDLoc dl(N); in SplitRes_SELECT() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 390 SDLoc dl(N); in PromoteIntRes_BITCAST() local
496 SDLoc dl(N); in PromoteIntRes_BSWAP() local
517 SDLoc dl(N); in PromoteIntRes_BITREVERSE() local
547 SDLoc dl(N); in PromoteIntRes_Constant() local
561 SDLoc dl(N); in PromoteIntRes_CTLZ() local
611 SDLoc dl(N); in PromoteIntRes_CTTZ() local
640 SDLoc dl(N); in PromoteIntRes_EXTRACT_VECTOR_ELT() local
667 SDLoc dl(N); in PromoteIntRes_FP_TO_XINT() local
721 SDLoc dl(N); in PromoteIntRes_FP_TO_XINT_SAT() local
728 SDLoc dl(N); in PromoteIntRes_FP_TO_FP16_BF16() local
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| H A D | LegalizeTypesGeneric.cpp | 45 SDLoc dl(N); in ExpandRes_BITCAST() local
213 SDLoc dl(N); in ExpandRes_EXTRACT_VECTOR_ELT() local
250 SDLoc dl(N); in ExpandRes_NormalLoad() local
292 SDLoc dl(N); in ExpandRes_VAARG() local
333 SDLoc dl(N); in ExpandOp_BITCAST() local
374 SDLoc dl(N); in ExpandOp_BUILD_VECTOR() local
410 SDLoc dl(N); in ExpandOp_INSERT_VECTOR_ELT() local
443 SDLoc dl(N); in ExpandOp_SCALAR_TO_VECTOR() local
459 SDLoc dl(N); in ExpandOp_NormalStore() local
508 SDLoc dl(N); in SplitRes_Select() local
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| H A D | LegalizeVectorTypes.cpp | 229 SDLoc dl(N); in ScalarizeVecRes_StrictFPOp() local
551 SDLoc dl(N); in ScalarizeVecRes_FP_TO_XINT_SAT() local
830 SDLoc dl(N); in ScalarizeVecOp_STORE() local
1209 SDLoc dl(N); in SplitVecRes_BinOp() local
1243 SDLoc dl(N); in SplitVecRes_TernaryOp() local
1274 SDLoc dl(N); in SplitVecRes_FIX() local
1290 SDLoc dl(N); in SplitVecRes_BITCAST() local
1347 SDLoc dl(N); in SplitVecRes_BUILD_VECTOR() local
1360 SDLoc dl(N); in SplitVecRes_CONCAT_VECTORS() local
1382 SDLoc dl(N); in SplitVecRes_EXTRACT_SUBVECTOR() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 498 const SDLoc &dl, SelectionDAG &DAG) const { in getInt() argument
547 HexagonTargetLowering::opJoin(const VectorPair &Ops, const SDLoc &dl, in opJoin()
554 HexagonTargetLowering::opSplit(SDValue Vec, const SDLoc &dl, in opSplit()
726 const SDLoc &dl(ElemIdx); in convertToByteIndex() local
741 const SDLoc &dl(Idx); in getIndexInWord32() local
748 HexagonTargetLowering::getByteShuffle(const SDLoc &dl, SDValue Op0, in getByteShuffle()
780 const SDLoc &dl, MVT VecTy, in buildHvxVectorReg()
993 HexagonTargetLowering::createHvxPrefixPred(SDValue PredV, const SDLoc &dl, in createHvxPrefixPred()
1079 const SDLoc &dl, MVT VecTy, in buildHvxVectorPred()
1152 const SDLoc &dl, MVT ResTy, SelectionDAG &DAG) const { in extractHvxElementReg() argument
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| H A D | HexagonISelLowering.cpp | 176 SelectionDAG &DAG, const SDLoc &dl) { in CreateCopyOfByValArgument()
205 const SDLoc &dl, SelectionDAG &DAG) const { in LowerReturn() argument
351 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult()
406 SDLoc &dl = CLI.DL; in LowerCall() local
723 SDLoc dl(Op); in LowerREADCYCLECOUNTER() local
748 SDLoc dl(Op); in LowerDYNAMIC_STACKALLOC() local
775 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
1029 const SDLoc &dl(Op); in LowerSETCC() local
1092 const SDLoc &dl(Op); in LowerVSELECT() local
1177 SDLoc dl(Op); in LowerRETURNADDR() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 209 const SDLoc &dl, SelectionDAG &DAG) const { in getInt() argument
259 HexagonTargetLowering::opJoin(const VectorPair &Ops, const SDLoc &dl, in opJoin()
266 HexagonTargetLowering::opSplit(SDValue Vec, const SDLoc &dl, in opSplit()
297 const SDLoc &dl(ElemIdx); in convertToByteIndex() local
312 const SDLoc &dl(Idx); in getIndexInWord32() local
319 HexagonTargetLowering::getByteShuffle(const SDLoc &dl, SDValue Op0, in getByteShuffle()
351 const SDLoc &dl, MVT VecTy, in buildHvxVectorReg()
502 HexagonTargetLowering::createHvxPrefixPred(SDValue PredV, const SDLoc &dl, in createHvxPrefixPred()
592 const SDLoc &dl, MVT VecTy, in buildHvxVectorPred()
665 const SDLoc &dl, MVT ResTy, SelectionDAG &DAG) const { in extractHvxElementReg() argument
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| H A D | HexagonISelLowering.cpp | 168 SelectionDAG &DAG, const SDLoc &dl) { in CreateCopyOfByValArgument()
197 const SDLoc &dl, SelectionDAG &DAG) const { in LowerReturn() argument
320 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult()
375 SDLoc &dl = CLI.DL; in LowerCall() local
695 SDLoc dl(Op); in LowerREADCYCLECOUNTER() local
720 SDLoc dl(Op); in LowerDYNAMIC_STACKALLOC() local
747 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
865 const SDLoc &dl(Op); in LowerSETCC() local
928 const SDLoc &dl(Op); in LowerVSELECT() local
1030 SDLoc dl(Op); in LowerRETURNADDR() local
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| /aosp_15_r20/external/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 363 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
383 SDLoc &dl = CLI.DL; in LowerCall() local
413 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCArguments()
509 const SDLoc &dl, SelectionDAG &DAG) const { in LowerReturn() argument
561 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCCallTo()
693 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult()
719 SDLoc dl(N); in LowerShifts() local
770 SDLoc dl(Op); in LowerExternalSymbol() local
780 SDLoc dl(Op); in LowerBlockAddress() local
789 ISD::CondCode CC, const SDLoc &dl, SelectionDAG &DAG) { in EmitCMP()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 180 inline SDValue getI16Imm(unsigned Imm, const SDLoc &dl) { in getI16Imm()
186 inline SDValue getI32Imm(unsigned Imm, const SDLoc &dl) { in getI32Imm()
192 inline SDValue getI64Imm(uint64_t Imm, const SDLoc &dl) { in getI64Imm()
197 inline SDValue getSmallIPtrImm(uint64_t Imm, const SDLoc &dl) { in getSmallIPtrImm()
405 SDLoc dl(Op); in SelectInlineAsmMemoryOperand() local
463 DebugLoc dl; in INITIALIZE_PASS() local
653 SDLoc dl(SN); in selectFrameIndex() local
717 SDLoc dl(ST); in tryTLSXFormStore() local
762 SDLoc dl(LD); in tryTLSXFormLoad() local
800 SDLoc dl(N); in tryBitfieldInsert() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 167 inline SDValue getI16Imm(unsigned Imm, const SDLoc &dl) { in getI16Imm()
173 inline SDValue getI32Imm(unsigned Imm, const SDLoc &dl) { in getI32Imm()
179 inline SDValue getI64Imm(uint64_t Imm, const SDLoc &dl) { in getI64Imm()
184 inline SDValue getSmallIPtrImm(unsigned Imm, const SDLoc &dl) { in getSmallIPtrImm()
322 SDLoc dl(Op); in SelectInlineAsmMemoryOperand() local
399 DebugLoc dl; in InsertVRSaveCode() local
437 DebugLoc dl; in getGlobalBaseReg() local
575 SDLoc dl(SN); in selectFrameIndex() local
637 SDLoc dl(ST); in tryTLSXFormStore() local
680 SDLoc dl(LD); in tryTLSXFormLoad() local
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| H A D | PPCISelLowering.cpp | 2415 SDLoc dl(N); in SelectAddressRegImm() local
2732 SDValue PPCTargetLowering::getTOCEntry(SelectionDAG &DAG, const SDLoc &dl, in getTOCEntry()
2892 SDLoc dl(GA); in LowerGlobalTLSAddress() local
3021 SDLoc dl(Op); in LowerSETCC() local
3080 SDLoc dl(Node); in LowerVAARG() local
3200 SDLoc dl(Op); in LowerINIT_TRAMPOLINE() local
3235 SDLoc dl(Op); in LowerVASTART() local
3454 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
3472 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments_32SVR4()
3743 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments_64SVR4()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 568 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
588 SDLoc &dl = CLI.DL; in LowerCall() local
619 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCArguments()
739 const SDLoc &dl, SelectionDAG &DAG) const { in LowerReturn() argument
809 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCCallTo()
936 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult()
962 SDLoc dl(N); in LowerShifts() local
1023 SDLoc dl(Op); in LowerExternalSymbol() local
1033 SDLoc dl(Op); in LowerBlockAddress() local
1042 ISD::CondCode CC, const SDLoc &dl, SelectionDAG &DAG) { in EmitCMP()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 569 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
589 SDLoc &dl = CLI.DL; in LowerCall() local
620 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCArguments()
739 const SDLoc &dl, SelectionDAG &DAG) const { in LowerReturn() argument
808 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCCallTo()
938 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult()
964 SDLoc dl(N); in LowerShifts() local
1025 SDLoc dl(Op); in LowerExternalSymbol() local
1035 SDLoc dl(Op); in LowerBlockAddress() local
1044 ISD::CondCode CC, const SDLoc &dl, SelectionDAG &DAG) { in EmitCMP()
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| /aosp_15_r20/external/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1447 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult()
1530 SDValue Arg, const SDLoc &dl, in LowerMemOpCallTo()
1544 void ARMTargetLowering::PassF64ArgInRegs(const SDLoc &dl, SelectionDAG &DAG, in PassF64ArgInRegs()
1578 SDLoc &dl = CLI.DL; in LowerCall() local
2261 const SDLoc &dl, SelectionDAG &DAG) const { in LowerReturn() argument
2495 SDLoc dl(Op); in LowerConstantPool() local
2671 SDLoc dl(GA); in LowerToTLSGeneralDynamicModel() local
2715 SDLoc dl(GA); in LowerToTLSExecModels() local
2795 SDLoc dl(Op); in LowerGlobalAddressELF() local
2805 SDLoc dl(Op); in LowerGlobalAddressELF() local
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| /aosp_15_r20/external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 1851 SDLoc dl(N); in SelectAddressRegImm() local
2114 static SDValue getTOCEntry(SelectionDAG &DAG, const SDLoc &dl, bool Is64Bit, in getTOCEntry()
2218 SDLoc dl(GA); in LowerGlobalTLSAddress() local
2340 SDLoc dl(Op); in LowerSETCC() local
2409 SDLoc dl(Node); in LowerVAARG() local
2531 SDLoc dl(Op); in LowerINIT_TRAMPOLINE() local
2567 SDLoc dl(Op); in LowerVASTART() local
2862 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
2879 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments_32SVR4()
3128 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments_64SVR4()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 252 SDLoc dl(GA); in getGlobalAddressWrapper() local
326 SDLoc dl(CP); in LowerConstantPool() local
349 SDLoc dl(Op); in LowerBR_JT() local
499 SDLoc dl(Op); in LowerSTORE() local
544 SDLoc dl(Op); in LowerSMUL_LOHI() local
561 SDLoc dl(Op); in LowerUMUL_LOHI() local
646 SDLoc dl(N); in TryExpandADDWithMul() local
703 SDLoc dl(N); in ExpandADDSUB() local
745 SDLoc dl(Node); in LowerVAARG() local
762 SDLoc dl(Op); in LowerVASTART() local
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