1 /************************************************************************** 2 * 3 * Copyright 2017 Advanced Micro Devices, Inc. 4 * 5 * SPDX-License-Identifier: MIT 6 * 7 **************************************************************************/ 8 9 #ifndef _RADEON_VCN_DEC_H 10 #define _RADEON_VCN_DEC_H 11 12 #include "radeon_vcn.h" 13 #include "util/list.h" 14 15 #include "ac_vcn_dec.h" 16 17 #define NUM_BUFFERS 4 18 #define MAX_JPEG_INST 64 19 20 struct rvcn_dec_dynamic_dpb_t2 { 21 struct list_head list; 22 uint8_t index; 23 struct rvid_buffer dpb; 24 struct pipe_video_buffer *vbuf; 25 }; 26 27 struct jpeg_registers { 28 #define RDECODE_JPEG_REG_VER_V1 0 29 #define RDECODE_JPEG_REG_VER_V2 1 30 #define RDECODE_JPEG_REG_VER_V3 2 31 unsigned version; 32 unsigned jpeg_dec_soft_rst; 33 unsigned jrbc_ib_cond_rd_timer; 34 unsigned jrbc_ib_ref_data; 35 unsigned lmi_jpeg_read_64bit_bar_high; 36 unsigned lmi_jpeg_read_64bit_bar_low; 37 unsigned jpeg_rb_base; 38 unsigned jpeg_rb_size; 39 unsigned jpeg_rb_wptr; 40 unsigned jpeg_pitch; 41 unsigned jpeg_uv_pitch; 42 unsigned dec_addr_mode; 43 unsigned dec_y_gfx10_tiling_surface; 44 unsigned dec_uv_gfx10_tiling_surface; 45 unsigned lmi_jpeg_write_64bit_bar_high; 46 unsigned lmi_jpeg_write_64bit_bar_low; 47 unsigned jpeg_tier_cntl2; 48 unsigned jpeg_outbuf_rptr; 49 unsigned jpeg_outbuf_cntl; 50 unsigned jpeg_int_en; 51 unsigned jpeg_cntl; 52 unsigned jpeg_rb_rptr; 53 unsigned jpeg_outbuf_wptr; 54 unsigned jpeg_luma_base0_0; 55 unsigned jpeg_chroma_base0_0; 56 unsigned jpeg_chromav_base0_0; 57 unsigned jpeg_index; 58 unsigned jpeg_data; 59 }; 60 61 struct radeon_decoder { 62 struct pipe_video_codec base; 63 64 unsigned stream_handle; 65 unsigned stream_type; 66 unsigned frame_number; 67 unsigned db_alignment; 68 unsigned dpb_size; 69 unsigned last_width; 70 unsigned last_height; 71 unsigned max_width; 72 unsigned max_height; 73 unsigned addr_gfx_mode; 74 75 struct pipe_screen *screen; 76 struct radeon_winsys *ws; 77 struct radeon_cmdbuf cs; 78 79 void *msg; 80 uint32_t *fb; 81 uint8_t *it; 82 uint8_t *probs; 83 void *bs_ptr; 84 rvcn_decode_buffer_t *decode_buffer; 85 bool vcn_dec_sw_ring; 86 struct rvcn_sq_var sq; 87 88 struct rvid_buffer *msg_fb_it_probs_buffers; 89 unsigned num_dec_bufs; 90 struct rvid_buffer *bs_buffers; 91 struct rvid_buffer dpb; 92 struct rvid_buffer ctx; 93 struct rvid_buffer sessionctx; 94 95 unsigned bs_size; 96 unsigned cur_buffer; 97 void *render_pic_list[32]; 98 unsigned h264_valid_ref_num[17]; 99 unsigned h264_valid_poc_num[34]; 100 unsigned av1_version; 101 bool show_frame; 102 unsigned ref_idx; 103 bool tmz_ctx; 104 struct { 105 unsigned data0; 106 unsigned data1; 107 unsigned cmd; 108 unsigned cntl; 109 } reg; 110 struct jpeg_params jpg; 111 struct jpeg_registers jpg_reg; 112 enum { 113 DPB_MAX_RES = 0, 114 DPB_DYNAMIC_TIER_1, 115 DPB_DYNAMIC_TIER_2 116 } dpb_type; 117 118 struct { 119 enum { 120 CODEC_8_BITS = 0, 121 CODEC_10_BITS 122 } bts; 123 uint8_t index; 124 unsigned ref_size; 125 unsigned num_refs; 126 uint8_t ref_list[16]; 127 } ref_codec; 128 129 struct list_head dpb_ref_list; 130 struct list_head dpb_unref_list; 131 132 void (*send_cmd)(struct radeon_decoder *dec, struct pipe_video_buffer *target, 133 struct pipe_picture_desc *picture); 134 /* Additional contexts for mJPEG */ 135 struct radeon_cmdbuf *jcs; 136 struct radeon_winsys_ctx **jctx; 137 unsigned cb_idx; 138 unsigned njctx; 139 struct pipe_fence_handle *prev_fence; 140 struct pipe_fence_handle *destroy_fence; 141 bool dpb_use_surf; 142 uint64_t dpb_modifier; 143 }; 144 145 void send_cmd_dec(struct radeon_decoder *dec, struct pipe_video_buffer *target, 146 struct pipe_picture_desc *picture); 147 148 void send_cmd_jpeg(struct radeon_decoder *dec, struct pipe_video_buffer *target, 149 struct pipe_picture_desc *picture); 150 151 struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context, 152 const struct pipe_video_codec *templat); 153 154 #endif 155