1 /* 2 * Copyright 2019 Valve Corporation 3 * 4 * SPDX-License-Identifier: MIT 5 */ 6 7 #ifndef AC_SHADER_ARGS_H 8 #define AC_SHADER_ARGS_H 9 10 #include <stdbool.h> 11 #include <stdint.h> 12 13 /* Maximum dwords of inline push constants when the indirect path is still used */ 14 #define AC_MAX_INLINE_PUSH_CONSTS_WITH_INDIRECT 8 15 /* Maximum dwords of inline push constants when the indirect path is not used */ 16 #define AC_MAX_INLINE_PUSH_CONSTS 32 17 18 enum ac_arg_regfile 19 { 20 AC_ARG_SGPR, 21 AC_ARG_VGPR, 22 }; 23 24 enum ac_arg_type 25 { 26 AC_ARG_INVALID = -1, 27 AC_ARG_FLOAT, 28 AC_ARG_INT, 29 AC_ARG_CONST_PTR, /* Pointer to i8 array */ 30 AC_ARG_CONST_FLOAT_PTR, /* Pointer to f32 array */ 31 AC_ARG_CONST_PTR_PTR, /* Pointer to pointer to i8 array */ 32 AC_ARG_CONST_DESC_PTR, /* Pointer to v4i32 array */ 33 AC_ARG_CONST_IMAGE_PTR, /* Pointer to v8i32 array */ 34 }; 35 36 struct ac_arg { 37 uint16_t arg_index; 38 bool used; 39 }; 40 41 #define AC_MAX_ARGS 384 /* including all VS->TCS IO */ 42 43 struct ac_shader_args { 44 /* Info on how to declare arguments */ 45 struct { 46 enum ac_arg_type type; 47 enum ac_arg_regfile file; 48 uint8_t offset; 49 uint8_t size; 50 bool skip : 1; 51 bool pending_vmem : 1; /* Loaded from VMEM and needs waitcnt before use. */ 52 bool preserved : 1; 53 } args[AC_MAX_ARGS]; 54 55 uint16_t arg_count; 56 uint16_t num_sgprs_used; 57 uint16_t num_vgprs_used; 58 59 uint16_t return_count; 60 uint16_t num_sgprs_returned; 61 uint16_t num_vgprs_returned; 62 63 /* User data 0/1. GFX: descriptor list, Compute: scratch BO. These are the SGPRs used by RADV for 64 * scratch and have to be accessed using llvm.amdgcn.implicit.buffer.ptr for LLVM in that case. 65 */ 66 struct ac_arg ring_offsets; 67 68 /* VS */ 69 struct ac_arg base_vertex; 70 struct ac_arg start_instance; 71 struct ac_arg draw_id; 72 struct ac_arg vertex_buffers; 73 struct ac_arg vertex_id; 74 struct ac_arg vs_rel_patch_id; 75 struct ac_arg vs_prim_id; 76 struct ac_arg instance_id; 77 78 /* Merged shaders */ 79 struct ac_arg tess_offchip_offset; 80 struct ac_arg merged_wave_info; 81 /* On gfx10: 82 * - bits 0..11: ordered_wave_id 83 * - bits 12..20: number of vertices in group 84 * - bits 22..30: number of primitives in group 85 */ 86 struct ac_arg gs_tg_info; 87 struct ac_arg scratch_offset; 88 89 /* TCS */ 90 struct ac_arg tcs_factor_offset; 91 struct ac_arg tcs_wave_id; /* gfx11+ */ 92 struct ac_arg tcs_patch_id; 93 struct ac_arg tcs_rel_ids; 94 95 /* TES */ 96 struct ac_arg tes_u; 97 struct ac_arg tes_v; 98 struct ac_arg tes_rel_patch_id; 99 struct ac_arg tes_patch_id; 100 101 /* GS */ 102 struct ac_arg es2gs_offset; /* separate legacy ES */ 103 struct ac_arg gs2vs_offset; /* legacy GS */ 104 struct ac_arg gs_wave_id; /* legacy GS */ 105 struct ac_arg gs_attr_offset; /* gfx11+: attribute ring offset in 512B increments */ 106 107 /* GS vertex indices/offsets: 108 * 109 * GFX6-8: [0-5] 6x uint32, multiplied by VGT_ESGS_RING_ITEMSIZE by hw 110 * GFX9-11 non-passthrough: [0-2] 6x packed uint16, multiplied by VGT_ESGS_RING_ITEMSIZE by hw 111 * 112 * GFX10-11 passthrough: [0] 1x uint32 with the following bitfields matching the prim export: 113 * [0:8] vertex index 0 114 * [9] edgeflag 0 115 * [10:18] vertex index 1 116 * [19] edgeflag 1 117 * [20:28] vertex index 2 118 * [29] edgeflag 2 119 * [31] 0 (valid prim) 120 * 121 * GFX12+: [0-1] 2x uint32 with the following bitfields matching the prim export except 122 * the GS invocation ID, which is 0 without a user GS, so it doesn't have to be masked 123 * out for the prim export: 124 * [0]: 125 * [0:7] vertex index 0 126 * [8] edgeflag 0 127 * [9:16] vertex index 1 128 * [17] edgeflag 1 129 * [18:25] vertex index 2 130 * [26] edgeflag 2 131 * [27:31] GS invocation ID 132 * [1]: 133 * [0:7] vertex index 3 134 * [9:16] vertex index 4 135 * [18:25] vertex index 5 136 */ 137 struct ac_arg gs_vtx_offset[6]; 138 struct ac_arg gs_prim_id; 139 struct ac_arg gs_invocation_id; /* GFX6-11 only. GFX12+ uses gs_vtx_offset[0]. */ 140 141 /* Streamout */ 142 struct ac_arg streamout_config; 143 struct ac_arg streamout_write_index; 144 struct ac_arg streamout_offset[4]; 145 146 /* PS */ 147 struct ac_arg frag_pos[4]; 148 struct ac_arg front_face; 149 struct ac_arg ancillary; 150 struct ac_arg sample_coverage; 151 struct ac_arg prim_mask; 152 struct ac_arg pops_collision_wave_id; 153 struct ac_arg load_provoking_vtx; 154 struct ac_arg persp_sample; 155 struct ac_arg persp_center; 156 struct ac_arg persp_centroid; 157 struct ac_arg pull_model; 158 struct ac_arg linear_sample; 159 struct ac_arg linear_center; 160 struct ac_arg linear_centroid; 161 struct ac_arg pos_fixed_pt; 162 163 /* CS */ 164 struct ac_arg local_invocation_ids; 165 struct ac_arg num_work_groups; 166 /* GFX6-11 only. GFX12+ uses read only SGPRs {TTMP9[0:31], TTMP7[0:15], TTMP7[16:31]}. */ 167 struct ac_arg workgroup_ids[3]; 168 struct ac_arg tg_size; 169 170 /* Mesh and task shaders */ 171 struct ac_arg task_ring_entry; /* Pointer into the draw and payload rings. */ 172 173 /* Vulkan only */ 174 struct ac_arg push_constants; 175 struct ac_arg inline_push_consts[AC_MAX_INLINE_PUSH_CONSTS]; 176 uint64_t inline_push_const_mask; 177 struct ac_arg view_index; 178 struct ac_arg force_vrs_rates; 179 180 /* RT */ 181 struct { 182 struct ac_arg uniform_shader_addr; 183 struct ac_arg sbt_descriptors; 184 struct ac_arg launch_sizes[3]; 185 struct ac_arg launch_size_addr; 186 struct ac_arg launch_ids[3]; 187 struct ac_arg dynamic_callable_stack_base; 188 struct ac_arg traversal_shader_addr; 189 struct ac_arg shader_addr; 190 struct ac_arg shader_record; 191 struct ac_arg payload_offset; 192 struct ac_arg ray_origin; 193 struct ac_arg ray_tmin; 194 struct ac_arg ray_direction; 195 struct ac_arg ray_tmax; 196 struct ac_arg cull_mask_and_flags; 197 struct ac_arg sbt_offset; 198 struct ac_arg sbt_stride; 199 struct ac_arg miss_index; 200 struct ac_arg accel_struct; 201 struct ac_arg primitive_id; 202 struct ac_arg instance_addr; 203 struct ac_arg geometry_id_and_flags; 204 struct ac_arg hit_kind; 205 } rt; 206 }; 207 208 void ac_add_arg(struct ac_shader_args *info, enum ac_arg_regfile regfile, unsigned registers, 209 enum ac_arg_type type, struct ac_arg *arg); 210 void ac_add_return(struct ac_shader_args *info, enum ac_arg_regfile regfile); 211 void ac_add_preserved(struct ac_shader_args *info, const struct ac_arg *arg); 212 void ac_compact_ps_vgpr_args(struct ac_shader_args *info, uint32_t spi_ps_input); 213 214 #endif 215