1 // SPDX-License-Identifier: GPL-2.0
2 /******************************************************************************
3 *
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 *
6 ******************************************************************************/
7
8 #include <linux/kernel.h>
9 #include <drv_types.h>
10 #include "hal_com_h2c.h"
11
12 #include "odm_precomp.h"
13
rtw_hal_data_init(struct adapter * padapter)14 u8 rtw_hal_data_init(struct adapter *padapter)
15 {
16 padapter->hal_data_sz = sizeof(struct hal_com_data);
17 padapter->HalData = vzalloc(padapter->hal_data_sz);
18 if (!padapter->HalData)
19 return _FAIL;
20
21 return _SUCCESS;
22 }
23
rtw_hal_data_deinit(struct adapter * padapter)24 void rtw_hal_data_deinit(struct adapter *padapter)
25 {
26 if (padapter->HalData) {
27 vfree(padapter->HalData);
28 padapter->HalData = NULL;
29 padapter->hal_data_sz = 0;
30 }
31 }
32
33
dump_chip_info(struct hal_version ChipVersion)34 void dump_chip_info(struct hal_version ChipVersion)
35 {
36 char buf[128];
37 size_t cnt = 0;
38
39 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "Chip Version Info: CHIP_8723B_%s_",
40 IS_NORMAL_CHIP(ChipVersion) ? "Normal_Chip" : "Test_Chip");
41
42 if (IS_CHIP_VENDOR_TSMC(ChipVersion))
43 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "TSMC_");
44 else if (IS_CHIP_VENDOR_UMC(ChipVersion))
45 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "UMC_");
46 else if (IS_CHIP_VENDOR_SMIC(ChipVersion))
47 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "SMIC_");
48
49 if (IS_A_CUT(ChipVersion))
50 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "A_CUT_");
51 else if (IS_B_CUT(ChipVersion))
52 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "B_CUT_");
53 else if (IS_C_CUT(ChipVersion))
54 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "C_CUT_");
55 else if (IS_D_CUT(ChipVersion))
56 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "D_CUT_");
57 else if (IS_E_CUT(ChipVersion))
58 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "E_CUT_");
59 else if (IS_I_CUT(ChipVersion))
60 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "I_CUT_");
61 else if (IS_J_CUT(ChipVersion))
62 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "J_CUT_");
63 else if (IS_K_CUT(ChipVersion))
64 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "K_CUT_");
65 else
66 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt,
67 "UNKNOWN_CUT(%d)_", ChipVersion.CUTVersion);
68
69 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "1T1R_");
70
71 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "RomVer(%d)\n", ChipVersion.ROMVer);
72 }
73
74
75 #define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80
76
77 /*
78 * Description:
79 *Use hardware(efuse), driver parameter(registry) and default channel plan
80 *to decide which one should be used.
81 *
82 * Parameters:
83 *padapter pointer of adapter
84 *hw_channel_plan channel plan from HW (efuse/eeprom)
85 * BIT[7] software configure mode; 0:Enable, 1:disable
86 * BIT[6:0] Channel Plan
87 *sw_channel_plan channel plan from SW (registry/module param)
88 *def_channel_plan channel plan used when HW/SW both invalid
89 *AutoLoadFail efuse autoload fail or not
90 *
91 * Return:
92 *Final channel plan decision
93 *
94 */
hal_com_config_channel_plan(struct adapter * padapter,u8 hw_channel_plan,u8 sw_channel_plan,u8 def_channel_plan,bool AutoLoadFail)95 u8 hal_com_config_channel_plan(
96 struct adapter *padapter,
97 u8 hw_channel_plan,
98 u8 sw_channel_plan,
99 u8 def_channel_plan,
100 bool AutoLoadFail
101 )
102 {
103 struct hal_com_data *pHalData;
104 u8 chnlPlan;
105
106 pHalData = GET_HAL_DATA(padapter);
107 pHalData->bDisableSWChannelPlan = false;
108 chnlPlan = def_channel_plan;
109
110 if (0xFF == hw_channel_plan)
111 AutoLoadFail = true;
112
113 if (!AutoLoadFail) {
114 u8 hw_chnlPlan;
115
116 hw_chnlPlan = hw_channel_plan & (~EEPROM_CHANNEL_PLAN_BY_HW_MASK);
117 if (rtw_is_channel_plan_valid(hw_chnlPlan)) {
118 if (hw_channel_plan & EEPROM_CHANNEL_PLAN_BY_HW_MASK)
119 pHalData->bDisableSWChannelPlan = true;
120
121 chnlPlan = hw_chnlPlan;
122 }
123 }
124
125 if (
126 (false == pHalData->bDisableSWChannelPlan) &&
127 rtw_is_channel_plan_valid(sw_channel_plan)
128 )
129 chnlPlan = sw_channel_plan;
130
131 return chnlPlan;
132 }
133
HAL_IsLegalChannel(struct adapter * adapter,u32 Channel)134 bool HAL_IsLegalChannel(struct adapter *adapter, u32 Channel)
135 {
136 bool bLegalChannel = true;
137
138 if ((Channel <= 14) && (Channel >= 1)) {
139 if (is_supported_24g(adapter->registrypriv.wireless_mode) == false)
140 bLegalChannel = false;
141 } else {
142 bLegalChannel = false;
143 }
144
145 return bLegalChannel;
146 }
147
MRateToHwRate(u8 rate)148 u8 MRateToHwRate(u8 rate)
149 {
150 u8 ret = DESC_RATE1M;
151
152 switch (rate) {
153 case MGN_1M:
154 ret = DESC_RATE1M;
155 break;
156 case MGN_2M:
157 ret = DESC_RATE2M;
158 break;
159 case MGN_5_5M:
160 ret = DESC_RATE5_5M;
161 break;
162 case MGN_11M:
163 ret = DESC_RATE11M;
164 break;
165 case MGN_6M:
166 ret = DESC_RATE6M;
167 break;
168 case MGN_9M:
169 ret = DESC_RATE9M;
170 break;
171 case MGN_12M:
172 ret = DESC_RATE12M;
173 break;
174 case MGN_18M:
175 ret = DESC_RATE18M;
176 break;
177 case MGN_24M:
178 ret = DESC_RATE24M;
179 break;
180 case MGN_36M:
181 ret = DESC_RATE36M;
182 break;
183 case MGN_48M:
184 ret = DESC_RATE48M;
185 break;
186 case MGN_54M:
187 ret = DESC_RATE54M;
188 break;
189 case MGN_MCS0:
190 ret = DESC_RATEMCS0;
191 break;
192 case MGN_MCS1:
193 ret = DESC_RATEMCS1;
194 break;
195 case MGN_MCS2:
196 ret = DESC_RATEMCS2;
197 break;
198 case MGN_MCS3:
199 ret = DESC_RATEMCS3;
200 break;
201 case MGN_MCS4:
202 ret = DESC_RATEMCS4;
203 break;
204 case MGN_MCS5:
205 ret = DESC_RATEMCS5;
206 break;
207 case MGN_MCS6:
208 ret = DESC_RATEMCS6;
209 break;
210 case MGN_MCS7:
211 ret = DESC_RATEMCS7;
212 break;
213 default:
214 break;
215 }
216
217 return ret;
218 }
219
HwRateToMRate(u8 rate)220 u8 HwRateToMRate(u8 rate)
221 {
222 u8 ret_rate = MGN_1M;
223
224 switch (rate) {
225 case DESC_RATE1M:
226 ret_rate = MGN_1M;
227 break;
228 case DESC_RATE2M:
229 ret_rate = MGN_2M;
230 break;
231 case DESC_RATE5_5M:
232 ret_rate = MGN_5_5M;
233 break;
234 case DESC_RATE11M:
235 ret_rate = MGN_11M;
236 break;
237 case DESC_RATE6M:
238 ret_rate = MGN_6M;
239 break;
240 case DESC_RATE9M:
241 ret_rate = MGN_9M;
242 break;
243 case DESC_RATE12M:
244 ret_rate = MGN_12M;
245 break;
246 case DESC_RATE18M:
247 ret_rate = MGN_18M;
248 break;
249 case DESC_RATE24M:
250 ret_rate = MGN_24M;
251 break;
252 case DESC_RATE36M:
253 ret_rate = MGN_36M;
254 break;
255 case DESC_RATE48M:
256 ret_rate = MGN_48M;
257 break;
258 case DESC_RATE54M:
259 ret_rate = MGN_54M;
260 break;
261 case DESC_RATEMCS0:
262 ret_rate = MGN_MCS0;
263 break;
264 case DESC_RATEMCS1:
265 ret_rate = MGN_MCS1;
266 break;
267 case DESC_RATEMCS2:
268 ret_rate = MGN_MCS2;
269 break;
270 case DESC_RATEMCS3:
271 ret_rate = MGN_MCS3;
272 break;
273 case DESC_RATEMCS4:
274 ret_rate = MGN_MCS4;
275 break;
276 case DESC_RATEMCS5:
277 ret_rate = MGN_MCS5;
278 break;
279 case DESC_RATEMCS6:
280 ret_rate = MGN_MCS6;
281 break;
282 case DESC_RATEMCS7:
283 ret_rate = MGN_MCS7;
284 break;
285 default:
286 break;
287 }
288
289 return ret_rate;
290 }
291
HalSetBrateCfg(struct adapter * Adapter,u8 * mBratesOS,u16 * pBrateCfg)292 void HalSetBrateCfg(struct adapter *Adapter, u8 *mBratesOS, u16 *pBrateCfg)
293 {
294 u8 i, is_brate, brate;
295
296 for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) {
297
298 is_brate = mBratesOS[i] & IEEE80211_BASIC_RATE_MASK;
299 brate = mBratesOS[i] & 0x7f;
300
301 if (is_brate) {
302 switch (brate) {
303 case IEEE80211_CCK_RATE_1MB:
304 *pBrateCfg |= RATE_1M;
305 break;
306 case IEEE80211_CCK_RATE_2MB:
307 *pBrateCfg |= RATE_2M;
308 break;
309 case IEEE80211_CCK_RATE_5MB:
310 *pBrateCfg |= RATE_5_5M;
311 break;
312 case IEEE80211_CCK_RATE_11MB:
313 *pBrateCfg |= RATE_11M;
314 break;
315 case IEEE80211_OFDM_RATE_6MB:
316 *pBrateCfg |= RATE_6M;
317 break;
318 case IEEE80211_OFDM_RATE_9MB:
319 *pBrateCfg |= RATE_9M;
320 break;
321 case IEEE80211_OFDM_RATE_12MB:
322 *pBrateCfg |= RATE_12M;
323 break;
324 case IEEE80211_OFDM_RATE_18MB:
325 *pBrateCfg |= RATE_18M;
326 break;
327 case IEEE80211_OFDM_RATE_24MB:
328 *pBrateCfg |= RATE_24M;
329 break;
330 case IEEE80211_OFDM_RATE_36MB:
331 *pBrateCfg |= RATE_36M;
332 break;
333 case IEEE80211_OFDM_RATE_48MB:
334 *pBrateCfg |= RATE_48M;
335 break;
336 case IEEE80211_OFDM_RATE_54MB:
337 *pBrateCfg |= RATE_54M;
338 break;
339 }
340 }
341 }
342 }
343
_OneOutPipeMapping(struct adapter * padapter)344 static void _OneOutPipeMapping(struct adapter *padapter)
345 {
346 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
347
348 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */
349 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];/* VI */
350 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[0];/* BE */
351 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];/* BK */
352
353 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
354 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
355 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
356 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
357 }
358
_TwoOutPipeMapping(struct adapter * padapter,bool bWIFICfg)359 static void _TwoOutPipeMapping(struct adapter *padapter, bool bWIFICfg)
360 {
361 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
362
363 if (bWIFICfg) { /* WMM */
364
365 /* BK, BE, VI, VO, BCN, CMD, MGT, HIGH, HCCA */
366 /* 0, 1, 0, 1, 0, 0, 0, 0, 0 }; */
367 /* 0:ep_0 num, 1:ep_1 num */
368
369 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[1];/* VO */
370 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];/* VI */
371 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];/* BE */
372 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];/* BK */
373
374 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
375 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
376 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
377 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
378
379 } else { /* typical setting */
380
381
382 /* BK, BE, VI, VO, BCN, CMD, MGT, HIGH, HCCA */
383 /* 1, 1, 0, 0, 0, 0, 0, 0, 0 }; */
384 /* 0:ep_0 num, 1:ep_1 num */
385
386 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */
387 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];/* VI */
388 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];/* BE */
389 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];/* BK */
390
391 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
392 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
393 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
394 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
395
396 }
397
398 }
399
_ThreeOutPipeMapping(struct adapter * padapter,bool bWIFICfg)400 static void _ThreeOutPipeMapping(struct adapter *padapter, bool bWIFICfg)
401 {
402 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
403
404 if (bWIFICfg) { /* for WMM */
405
406 /* BK, BE, VI, VO, BCN, CMD, MGT, HIGH, HCCA */
407 /* 1, 2, 1, 0, 0, 0, 0, 0, 0 }; */
408 /* 0:H, 1:N, 2:L */
409
410 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */
411 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];/* VI */
412 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];/* BE */
413 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];/* BK */
414
415 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
416 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
417 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
418 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
419
420 } else { /* typical setting */
421
422
423 /* BK, BE, VI, VO, BCN, CMD, MGT, HIGH, HCCA */
424 /* 2, 2, 1, 0, 0, 0, 0, 0, 0 }; */
425 /* 0:H, 1:N, 2:L */
426
427 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */
428 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];/* VI */
429 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];/* BE */
430 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[2];/* BK */
431
432 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
433 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
434 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
435 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
436 }
437
438 }
439
Hal_MappingOutPipe(struct adapter * padapter,u8 NumOutPipe)440 bool Hal_MappingOutPipe(struct adapter *padapter, u8 NumOutPipe)
441 {
442 struct registry_priv *pregistrypriv = &padapter->registrypriv;
443
444 bool bWIFICfg = (pregistrypriv->wifi_spec) ? true : false;
445
446 bool result = true;
447
448 switch (NumOutPipe) {
449 case 2:
450 _TwoOutPipeMapping(padapter, bWIFICfg);
451 break;
452 case 3:
453 case 4:
454 _ThreeOutPipeMapping(padapter, bWIFICfg);
455 break;
456 case 1:
457 _OneOutPipeMapping(padapter);
458 break;
459 default:
460 result = false;
461 break;
462 }
463
464 return result;
465
466 }
467
hal_init_macaddr(struct adapter * adapter)468 void hal_init_macaddr(struct adapter *adapter)
469 {
470 rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, adapter->eeprompriv.mac_addr);
471 }
472
rtw_init_hal_com_default_value(struct adapter * Adapter)473 void rtw_init_hal_com_default_value(struct adapter *Adapter)
474 {
475 struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
476
477 pHalData->AntDetection = 1;
478 }
479
480 /*
481 * C2H event format:
482 * Field TRIGGER CONTENT CMD_SEQ CMD_LEN CMD_ID
483 * BITS [127:120] [119:16] [15:8] [7:4] [3:0]
484 */
485
c2h_evt_clear(struct adapter * adapter)486 void c2h_evt_clear(struct adapter *adapter)
487 {
488 rtw_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE);
489 }
490
491 /*
492 * C2H event format:
493 * Field TRIGGER CMD_LEN CONTENT CMD_SEQ CMD_ID
494 * BITS [127:120] [119:112] [111:16] [15:8] [7:0]
495 */
c2h_evt_read_88xx(struct adapter * adapter,u8 * buf)496 s32 c2h_evt_read_88xx(struct adapter *adapter, u8 *buf)
497 {
498 s32 ret = _FAIL;
499 struct c2h_evt_hdr_88xx *c2h_evt;
500 int i;
501 u8 trigger;
502
503 if (!buf)
504 goto exit;
505
506 trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR);
507
508 if (trigger == C2H_EVT_HOST_CLOSE)
509 goto exit; /* Not ready */
510 else if (trigger != C2H_EVT_FW_CLOSE)
511 goto clear_evt; /* Not a valid value */
512
513 c2h_evt = (struct c2h_evt_hdr_88xx *)buf;
514
515 memset(c2h_evt, 0, 16);
516
517 c2h_evt->id = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL);
518 c2h_evt->seq = rtw_read8(adapter, REG_C2HEVT_CMD_SEQ_88XX);
519 c2h_evt->plen = rtw_read8(adapter, REG_C2HEVT_CMD_LEN_88XX);
520
521 /* Read the content */
522 for (i = 0; i < c2h_evt->plen; i++)
523 c2h_evt->payload[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 2 + i);
524
525 ret = _SUCCESS;
526
527 clear_evt:
528 /*
529 * Clear event to notify FW we have read the command.
530 * If this field isn't clear, the FW won't update the next command message.
531 */
532 c2h_evt_clear(adapter);
533 exit:
534 return ret;
535 }
536
rtw_get_mgntframe_raid(struct adapter * adapter,unsigned char network_type)537 u8 rtw_get_mgntframe_raid(struct adapter *adapter, unsigned char network_type)
538 {
539 return (network_type & WIRELESS_11B) ? RATEID_IDX_B : RATEID_IDX_G;
540 }
541
rtw_hal_update_sta_rate_mask(struct adapter * padapter,struct sta_info * psta)542 void rtw_hal_update_sta_rate_mask(struct adapter *padapter, struct sta_info *psta)
543 {
544 u8 i, limit;
545 u32 tx_ra_bitmap;
546
547 if (!psta)
548 return;
549
550 tx_ra_bitmap = 0;
551
552 /* b/g mode ra_bitmap */
553 for (i = 0; i < sizeof(psta->bssrateset); i++) {
554 if (psta->bssrateset[i])
555 tx_ra_bitmap |= rtw_get_bit_value_from_ieee_value(psta->bssrateset[i]&0x7f);
556 }
557
558 /* n mode ra_bitmap */
559 if (psta->htpriv.ht_option) {
560 limit = 8; /* 1R */
561
562 for (i = 0; i < limit; i++) {
563 if (psta->htpriv.ht_cap.mcs.rx_mask[i/8] & BIT(i%8))
564 tx_ra_bitmap |= BIT(i+12);
565 }
566 }
567
568 psta->ra_mask = tx_ra_bitmap;
569 psta->init_rate = get_highest_rate_idx(tx_ra_bitmap)&0x3f;
570 }
571
hw_var_port_switch(struct adapter * adapter)572 void hw_var_port_switch(struct adapter *adapter)
573 {
574 }
575
SetHwReg(struct adapter * adapter,u8 variable,u8 * val)576 void SetHwReg(struct adapter *adapter, u8 variable, u8 *val)
577 {
578 struct hal_com_data *hal_data = GET_HAL_DATA(adapter);
579 struct dm_odm_t *odm = &(hal_data->odmpriv);
580
581 switch (variable) {
582 case HW_VAR_PORT_SWITCH:
583 hw_var_port_switch(adapter);
584 break;
585 case HW_VAR_INIT_RTS_RATE:
586 rtw_warn_on(1);
587 break;
588 case HW_VAR_SEC_CFG:
589 {
590 u16 reg_scr;
591
592 reg_scr = rtw_read16(adapter, REG_SECCFG);
593 rtw_write16(adapter, REG_SECCFG, reg_scr|SCR_CHK_KEYID|SCR_RxDecEnable|SCR_TxEncEnable);
594 }
595 break;
596 case HW_VAR_SEC_DK_CFG:
597 {
598 struct security_priv *sec = &adapter->securitypriv;
599 u8 reg_scr = rtw_read8(adapter, REG_SECCFG);
600
601 if (val) { /* Enable default key related setting */
602 reg_scr |= SCR_TXBCUSEDK;
603 if (sec->dot11AuthAlgrthm != dot11AuthAlgrthm_8021X)
604 reg_scr |= (SCR_RxUseDK|SCR_TxUseDK);
605 } else /* Disable default key related setting */
606 reg_scr &= ~(SCR_RXBCUSEDK|SCR_TXBCUSEDK|SCR_RxUseDK|SCR_TxUseDK);
607
608 rtw_write8(adapter, REG_SECCFG, reg_scr);
609 }
610 break;
611 case HW_VAR_DM_FLAG:
612 odm->SupportAbility = *((u32 *)val);
613 break;
614 case HW_VAR_DM_FUNC_OP:
615 if (*((u8 *)val) == true) {
616 /* save dm flag */
617 odm->BK_SupportAbility = odm->SupportAbility;
618 } else {
619 /* restore dm flag */
620 odm->SupportAbility = odm->BK_SupportAbility;
621 }
622 break;
623 case HW_VAR_DM_FUNC_SET:
624 if (*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE) {
625 struct dm_priv *dm = &hal_data->dmpriv;
626 dm->DMFlag = dm->InitDMFlag;
627 odm->SupportAbility = dm->InitODMFlag;
628 } else {
629 odm->SupportAbility |= *((u32 *)val);
630 }
631 break;
632 case HW_VAR_DM_FUNC_CLR:
633 /*
634 * input is already a mask to clear function
635 * don't invert it again! George, Lucas@20130513
636 */
637 odm->SupportAbility &= *((u32 *)val);
638 break;
639 case HW_VAR_AMPDU_MIN_SPACE:
640 /* TODO - Is something needed here? */
641 break;
642 case HW_VAR_WIRELESS_MODE:
643 /* TODO - Is something needed here? */
644 break;
645 default:
646 netdev_dbg(adapter->pnetdev,
647 FUNC_ADPT_FMT " variable(%d) not defined!\n",
648 FUNC_ADPT_ARG(adapter), variable);
649 break;
650 }
651 }
652
GetHwReg(struct adapter * adapter,u8 variable,u8 * val)653 void GetHwReg(struct adapter *adapter, u8 variable, u8 *val)
654 {
655 struct hal_com_data *hal_data = GET_HAL_DATA(adapter);
656 struct dm_odm_t *odm = &(hal_data->odmpriv);
657
658 switch (variable) {
659 case HW_VAR_BASIC_RATE:
660 *((u16 *)val) = hal_data->BasicRateSet;
661 break;
662 case HW_VAR_DM_FLAG:
663 *((u32 *)val) = odm->SupportAbility;
664 break;
665 default:
666 netdev_dbg(adapter->pnetdev,
667 FUNC_ADPT_FMT " variable(%d) not defined!\n",
668 FUNC_ADPT_ARG(adapter), variable);
669 break;
670 }
671 }
672
673
674
675
SetHalDefVar(struct adapter * adapter,enum hal_def_variable variable,void * value)676 u8 SetHalDefVar(
677 struct adapter *adapter, enum hal_def_variable variable, void *value
678 )
679 {
680 struct hal_com_data *hal_data = GET_HAL_DATA(adapter);
681 struct dm_odm_t *odm = &(hal_data->odmpriv);
682 u8 bResult = _SUCCESS;
683
684 switch (variable) {
685 case HW_DEF_ODM_DBG_FLAG:
686 ODM_CmnInfoUpdate(odm, ODM_CMNINFO_DBG_COMP, *((u64 *)value));
687 break;
688 case HW_DEF_ODM_DBG_LEVEL:
689 ODM_CmnInfoUpdate(odm, ODM_CMNINFO_DBG_LEVEL, *((u32 *)value));
690 break;
691 case HAL_DEF_DBG_DM_FUNC:
692 {
693 u8 dm_func = *((u8 *)value);
694 struct dm_priv *dm = &hal_data->dmpriv;
695
696 if (dm_func == 0) { /* disable all dynamic func */
697 odm->SupportAbility = DYNAMIC_FUNC_DISABLE;
698 } else if (dm_func == 1) {/* disable DIG */
699 odm->SupportAbility &= (~DYNAMIC_BB_DIG);
700 } else if (dm_func == 2) {/* disable High power */
701 odm->SupportAbility &= (~DYNAMIC_BB_DYNAMIC_TXPWR);
702 } else if (dm_func == 3) {/* disable tx power tracking */
703 odm->SupportAbility &= (~DYNAMIC_RF_CALIBRATION);
704 } else if (dm_func == 4) {/* disable BT coexistence */
705 dm->DMFlag &= (~DYNAMIC_FUNC_BT);
706 } else if (dm_func == 5) {/* disable antenna diversity */
707 odm->SupportAbility &= (~DYNAMIC_BB_ANT_DIV);
708 } else if (dm_func == 6) {/* turn on all dynamic func */
709 if (!(odm->SupportAbility & DYNAMIC_BB_DIG)) {
710 struct dig_t *pDigTable = &odm->DM_DigTable;
711 pDigTable->CurIGValue = rtw_read8(adapter, 0xc50);
712 }
713 dm->DMFlag |= DYNAMIC_FUNC_BT;
714 odm->SupportAbility = DYNAMIC_ALL_FUNC_ENABLE;
715 }
716 }
717 break;
718 case HAL_DEF_DBG_DUMP_RXPKT:
719 hal_data->bDumpRxPkt = *((u8 *)value);
720 break;
721 case HAL_DEF_DBG_DUMP_TXPKT:
722 hal_data->bDumpTxPkt = *((u8 *)value);
723 break;
724 case HAL_DEF_ANT_DETECT:
725 hal_data->AntDetection = *((u8 *)value);
726 break;
727 default:
728 netdev_dbg(adapter->pnetdev,
729 "%s: [WARNING] HAL_DEF_VARIABLE(%d) not defined!\n",
730 __func__, variable);
731 bResult = _FAIL;
732 break;
733 }
734
735 return bResult;
736 }
737
GetHalDefVar(struct adapter * adapter,enum hal_def_variable variable,void * value)738 u8 GetHalDefVar(
739 struct adapter *adapter, enum hal_def_variable variable, void *value
740 )
741 {
742 struct hal_com_data *hal_data = GET_HAL_DATA(adapter);
743 u8 bResult = _SUCCESS;
744
745 switch (variable) {
746 case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
747 {
748 struct mlme_priv *pmlmepriv;
749 struct sta_priv *pstapriv;
750 struct sta_info *psta;
751
752 pmlmepriv = &adapter->mlmepriv;
753 pstapriv = &adapter->stapriv;
754 psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.mac_address);
755 if (psta)
756 *((int *)value) = psta->rssi_stat.UndecoratedSmoothedPWDB;
757 }
758 break;
759 case HAL_DEF_DBG_DM_FUNC:
760 *((u32 *)value) = hal_data->odmpriv.SupportAbility;
761 break;
762 case HAL_DEF_DBG_DUMP_RXPKT:
763 *((u8 *)value) = hal_data->bDumpRxPkt;
764 break;
765 case HAL_DEF_DBG_DUMP_TXPKT:
766 *((u8 *)value) = hal_data->bDumpTxPkt;
767 break;
768 case HAL_DEF_ANT_DETECT:
769 *((u8 *)value) = hal_data->AntDetection;
770 break;
771 case HAL_DEF_MACID_SLEEP:
772 *(u8 *)value = false;
773 break;
774 case HAL_DEF_TX_PAGE_SIZE:
775 *((u32 *)value) = PAGE_SIZE_128;
776 break;
777 default:
778 netdev_dbg(adapter->pnetdev,
779 "%s: [WARNING] HAL_DEF_VARIABLE(%d) not defined!\n",
780 __func__, variable);
781 bResult = _FAIL;
782 break;
783 }
784
785 return bResult;
786 }
787
SetHalODMVar(struct adapter * Adapter,enum hal_odm_variable eVariable,void * pValue1,bool bSet)788 void SetHalODMVar(
789 struct adapter *Adapter,
790 enum hal_odm_variable eVariable,
791 void *pValue1,
792 bool bSet
793 )
794 {
795 struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
796 struct dm_odm_t *podmpriv = &pHalData->odmpriv;
797 /* _irqL irqL; */
798 switch (eVariable) {
799 case HAL_ODM_STA_INFO:
800 {
801 struct sta_info *psta = pValue1;
802 if (bSet) {
803 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, psta);
804 } else {
805 /* spin_lock_bh(&pHalData->odm_stainfo_lock); */
806 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, NULL);
807
808 /* spin_unlock_bh(&pHalData->odm_stainfo_lock); */
809 }
810 }
811 break;
812 case HAL_ODM_P2P_STATE:
813 ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DIRECT, bSet);
814 break;
815 case HAL_ODM_WIFI_DISPLAY_STATE:
816 ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DISPLAY, bSet);
817 break;
818
819 default:
820 break;
821 }
822 }
823
824
eqNByte(u8 * str1,u8 * str2,u32 num)825 bool eqNByte(u8 *str1, u8 *str2, u32 num)
826 {
827 if (num == 0)
828 return false;
829 while (num > 0) {
830 num--;
831 if (str1[num] != str2[num])
832 return false;
833 }
834 return true;
835 }
836
GetU1ByteIntegerFromStringInDecimal(char * Str,u8 * pInt)837 bool GetU1ByteIntegerFromStringInDecimal(char *Str, u8 *pInt)
838 {
839 u16 i = 0;
840 *pInt = 0;
841
842 while (Str[i] != '\0') {
843 if (Str[i] >= '0' && Str[i] <= '9') {
844 *pInt *= 10;
845 *pInt += (Str[i] - '0');
846 } else
847 return false;
848
849 ++i;
850 }
851
852 return true;
853 }
854
rtw_hal_check_rxfifo_full(struct adapter * adapter)855 void rtw_hal_check_rxfifo_full(struct adapter *adapter)
856 {
857 struct dvobj_priv *psdpriv = adapter->dvobj;
858 struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
859 int save_cnt = false;
860
861 /* switch counter to RX fifo */
862 rtw_write8(adapter, REG_RXERR_RPT+3, rtw_read8(adapter, REG_RXERR_RPT+3)|0xf0);
863 save_cnt = true;
864 /* todo: other chips */
865
866 if (save_cnt) {
867 /* rtw_write8(adapter, REG_RXERR_RPT+3, rtw_read8(adapter, REG_RXERR_RPT+3)|0xa0); */
868 pdbgpriv->dbg_rx_fifo_last_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow;
869 pdbgpriv->dbg_rx_fifo_curr_overflow = rtw_read16(adapter, REG_RXERR_RPT);
870 pdbgpriv->dbg_rx_fifo_diff_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow-pdbgpriv->dbg_rx_fifo_last_overflow;
871 }
872 }
873
874 static u32 Array_kfreemap[] = {
875 0xf8, 0xe,
876 0xf6, 0xc,
877 0xf4, 0xa,
878 0xf2, 0x8,
879 0xf0, 0x6,
880 0xf3, 0x4,
881 0xf5, 0x2,
882 0xf7, 0x0,
883 0xf9, 0x0,
884 0xfc, 0x0,
885 };
886
rtw_bb_rf_gain_offset(struct adapter * padapter)887 void rtw_bb_rf_gain_offset(struct adapter *padapter)
888 {
889 u8 value = padapter->eeprompriv.EEPROMRFGainOffset;
890 u32 res, i = 0;
891 u32 *Array = Array_kfreemap;
892 u32 v1 = 0, v2 = 0, target = 0;
893
894 if (value & BIT4) {
895 if (padapter->eeprompriv.EEPROMRFGainVal != 0xff) {
896 res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff);
897 res &= 0xfff87fff;
898 /* res &= 0xfff87fff; */
899 for (i = 0; i < ARRAY_SIZE(Array_kfreemap); i += 2) {
900 v1 = Array[i];
901 v2 = Array[i+1];
902 if (v1 == padapter->eeprompriv.EEPROMRFGainVal) {
903 target = v2;
904 break;
905 }
906 }
907 PHY_SetRFReg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT18|BIT17|BIT16|BIT15, target);
908
909 /* res |= (padapter->eeprompriv.EEPROMRFGainVal & 0x0f)<< 15; */
910 /* rtw_hal_write_rfreg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, RF_GAIN_OFFSET_MASK, res); */
911 res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff);
912 }
913 }
914 }
915