1 /*
2 * Copyright © 2016 Rob Clark <[email protected]>
3 * Copyright © 2018 Google, Inc.
4 * SPDX-License-Identifier: MIT
5 *
6 * Authors:
7 * Rob Clark <[email protected]>
8 */
9
10 #define FD_BO_NO_HARDPIN 1
11
12 #include "freedreno_query_acc.h"
13 #include "freedreno_state.h"
14
15 #include "fd6_barrier.h"
16 #include "fd6_blend.h"
17 #include "fd6_blitter.h"
18 #include "fd6_compute.h"
19 #include "fd6_context.h"
20 #include "fd6_draw.h"
21 #include "fd6_emit.h"
22 #include "fd6_gmem.h"
23 #include "fd6_image.h"
24 #include "fd6_pack.h"
25 #include "fd6_program.h"
26 #include "fd6_query.h"
27 #include "fd6_rasterizer.h"
28 #include "fd6_resource.h"
29 #include "fd6_texture.h"
30 #include "fd6_zsa.h"
31
32 static void
fd6_context_destroy(struct pipe_context * pctx)33 fd6_context_destroy(struct pipe_context *pctx) in_dt
34 {
35 struct fd6_context *fd6_ctx = fd6_context(fd_context(pctx));
36
37 fd6_descriptor_set_invalidate(&fd6_ctx->cs_descriptor_set);
38 for (unsigned i = 0; i < ARRAY_SIZE(fd6_ctx->descriptor_sets); i++)
39 fd6_descriptor_set_invalidate(&fd6_ctx->descriptor_sets[i]);
40
41 if (fd6_ctx->streamout_disable_stateobj)
42 fd_ringbuffer_del(fd6_ctx->streamout_disable_stateobj);
43
44 if (fd6_ctx->sample_locations_disable_stateobj)
45 fd_ringbuffer_del(fd6_ctx->sample_locations_disable_stateobj);
46
47 fd_context_destroy(pctx);
48
49 if (fd6_ctx->vsc_draw_strm)
50 fd_bo_del(fd6_ctx->vsc_draw_strm);
51 if (fd6_ctx->vsc_prim_strm)
52 fd_bo_del(fd6_ctx->vsc_prim_strm);
53 fd_bo_del(fd6_ctx->control_mem);
54
55 fd_context_cleanup_common_vbos(&fd6_ctx->base);
56
57 fd6_texture_fini(pctx);
58
59 free(fd6_ctx);
60 }
61
62 static void *
fd6_vertex_state_create(struct pipe_context * pctx,unsigned num_elements,const struct pipe_vertex_element * elements)63 fd6_vertex_state_create(struct pipe_context *pctx, unsigned num_elements,
64 const struct pipe_vertex_element *elements)
65 {
66 struct fd_context *ctx = fd_context(pctx);
67
68 struct fd6_vertex_stateobj *state = CALLOC_STRUCT(fd6_vertex_stateobj);
69 memcpy(state->base.pipe, elements, sizeof(*elements) * num_elements);
70 state->base.num_elements = num_elements;
71 state->stateobj =
72 fd_ringbuffer_new_object(ctx->pipe, 4 * (num_elements * 4 + 1));
73 struct fd_ringbuffer *ring = state->stateobj;
74
75 OUT_PKT4(ring, REG_A6XX_VFD_DECODE(0), 2 * num_elements);
76 for (int32_t i = 0; i < num_elements; i++) {
77 const struct pipe_vertex_element *elem = &elements[i];
78 enum pipe_format pfmt = (enum pipe_format)elem->src_format;
79 enum a6xx_format fmt = fd6_vertex_format(pfmt);
80 bool isint = util_format_is_pure_integer(pfmt);
81 assert(fmt != FMT6_NONE);
82
83 OUT_RING(ring, A6XX_VFD_DECODE_INSTR_IDX(elem->vertex_buffer_index) |
84 A6XX_VFD_DECODE_INSTR_OFFSET(elem->src_offset) |
85 A6XX_VFD_DECODE_INSTR_FORMAT(fmt) |
86 COND(elem->instance_divisor,
87 A6XX_VFD_DECODE_INSTR_INSTANCED) |
88 A6XX_VFD_DECODE_INSTR_SWAP(fd6_vertex_swap(pfmt)) |
89 A6XX_VFD_DECODE_INSTR_UNK30 |
90 COND(!isint, A6XX_VFD_DECODE_INSTR_FLOAT));
91 OUT_RING(ring,
92 MAX2(1, elem->instance_divisor)); /* VFD_DECODE[j].STEP_RATE */
93 }
94
95 for (int32_t i = 0; i < num_elements; i++) {
96 const struct pipe_vertex_element *elem = &elements[i];
97
98 OUT_PKT4(ring, REG_A6XX_VFD_FETCH_STRIDE(elem->vertex_buffer_index), 1);
99 OUT_RING(ring, elem->src_stride);
100 }
101
102 return state;
103 }
104
105 static void
fd6_vertex_state_delete(struct pipe_context * pctx,void * hwcso)106 fd6_vertex_state_delete(struct pipe_context *pctx, void *hwcso)
107 {
108 struct fd6_vertex_stateobj *so = (struct fd6_vertex_stateobj *)hwcso;
109
110 fd_ringbuffer_del(so->stateobj);
111 FREE(hwcso);
112 }
113
114 static void
validate_surface(struct pipe_context * pctx,struct pipe_surface * psurf)115 validate_surface(struct pipe_context *pctx, struct pipe_surface *psurf)
116 assert_dt
117 {
118 fd6_validate_format(fd_context(pctx), fd_resource(psurf->texture),
119 psurf->format);
120 }
121
122 static void
fd6_set_framebuffer_state(struct pipe_context * pctx,const struct pipe_framebuffer_state * pfb)123 fd6_set_framebuffer_state(struct pipe_context *pctx,
124 const struct pipe_framebuffer_state *pfb)
125 in_dt
126 {
127 if (pfb->zsbuf)
128 validate_surface(pctx, pfb->zsbuf);
129
130 for (unsigned i = 0; i < pfb->nr_cbufs; i++) {
131 if (!pfb->cbufs[i])
132 continue;
133 validate_surface(pctx, pfb->cbufs[i]);
134 }
135
136 fd_set_framebuffer_state(pctx, pfb);
137 }
138
139
140 static void
setup_state_map(struct fd_context * ctx)141 setup_state_map(struct fd_context *ctx)
142 {
143 STATIC_ASSERT(FD6_GROUP_NON_GROUP < 32);
144
145 fd_context_add_map(ctx, FD_DIRTY_VTXSTATE, BIT(FD6_GROUP_VTXSTATE));
146 fd_context_add_map(ctx, FD_DIRTY_VTXBUF, BIT(FD6_GROUP_VBO));
147 fd_context_add_map(ctx, FD_DIRTY_ZSA | FD_DIRTY_RASTERIZER,
148 BIT(FD6_GROUP_ZSA));
149 fd_context_add_map(ctx, FD_DIRTY_ZSA | FD_DIRTY_BLEND | FD_DIRTY_PROG,
150 BIT(FD6_GROUP_LRZ));
151 fd_context_add_map(ctx, FD_DIRTY_PROG | FD_DIRTY_RASTERIZER_CLIP_PLANE_ENABLE,
152 BIT(FD6_GROUP_PROG) | BIT(FD6_GROUP_PROG_KEY));
153 fd_context_add_map(ctx, FD_DIRTY_RASTERIZER | FD_DIRTY_MIN_SAMPLES | FD_DIRTY_FRAMEBUFFER,
154 BIT(FD6_GROUP_PROG_KEY));
155 if (ctx->screen->driconf.dual_color_blend_by_location) {
156 fd_context_add_map(ctx, FD_DIRTY_BLEND_DUAL,
157 BIT(FD6_GROUP_PROG_KEY));
158 }
159 fd_context_add_map(ctx, FD_DIRTY_RASTERIZER, BIT(FD6_GROUP_RASTERIZER));
160 fd_context_add_map(ctx,
161 FD_DIRTY_FRAMEBUFFER | FD_DIRTY_RASTERIZER_DISCARD |
162 FD_DIRTY_PROG | FD_DIRTY_BLEND_DUAL,
163 BIT(FD6_GROUP_PROG_FB_RAST));
164 fd_context_add_map(ctx, FD_DIRTY_BLEND | FD_DIRTY_SAMPLE_MASK,
165 BIT(FD6_GROUP_BLEND));
166 fd_context_add_map(ctx, FD_DIRTY_SAMPLE_LOCATIONS, BIT(FD6_GROUP_SAMPLE_LOCATIONS));
167 fd_context_add_map(ctx, FD_DIRTY_BLEND_COLOR, BIT(FD6_GROUP_BLEND_COLOR));
168 fd_context_add_map(ctx, FD_DIRTY_PROG | FD_DIRTY_CONST,
169 BIT(FD6_GROUP_CONST));
170 fd_context_add_map(ctx, FD_DIRTY_STREAMOUT, BIT(FD6_GROUP_SO));
171 fd_context_add_map(ctx, FD_DIRTY_BLEND_COHERENT,
172 BIT(FD6_GROUP_PRIM_MODE_SYSMEM) | BIT(FD6_GROUP_PRIM_MODE_GMEM));
173
174 fd_context_add_shader_map(ctx, PIPE_SHADER_VERTEX, FD_DIRTY_SHADER_TEX,
175 BIT(FD6_GROUP_VS_TEX));
176 fd_context_add_shader_map(ctx, PIPE_SHADER_TESS_CTRL, FD_DIRTY_SHADER_TEX,
177 BIT(FD6_GROUP_HS_TEX));
178 fd_context_add_shader_map(ctx, PIPE_SHADER_TESS_EVAL, FD_DIRTY_SHADER_TEX,
179 BIT(FD6_GROUP_DS_TEX));
180 fd_context_add_shader_map(ctx, PIPE_SHADER_GEOMETRY, FD_DIRTY_SHADER_TEX,
181 BIT(FD6_GROUP_GS_TEX));
182 fd_context_add_shader_map(ctx, PIPE_SHADER_FRAGMENT, FD_DIRTY_SHADER_TEX,
183 BIT(FD6_GROUP_FS_TEX));
184 fd_context_add_shader_map(ctx, PIPE_SHADER_COMPUTE, FD_DIRTY_SHADER_TEX,
185 BIT(FD6_GROUP_CS_TEX));
186
187 fd_context_add_shader_map(ctx, PIPE_SHADER_VERTEX,
188 FD_DIRTY_SHADER_SSBO | FD_DIRTY_SHADER_IMAGE,
189 BIT(FD6_GROUP_VS_BINDLESS));
190 fd_context_add_shader_map(ctx, PIPE_SHADER_TESS_CTRL,
191 FD_DIRTY_SHADER_SSBO | FD_DIRTY_SHADER_IMAGE,
192 BIT(FD6_GROUP_HS_BINDLESS));
193 fd_context_add_shader_map(ctx, PIPE_SHADER_TESS_EVAL,
194 FD_DIRTY_SHADER_SSBO | FD_DIRTY_SHADER_IMAGE,
195 BIT(FD6_GROUP_DS_BINDLESS));
196 fd_context_add_shader_map(ctx, PIPE_SHADER_GEOMETRY,
197 FD_DIRTY_SHADER_SSBO | FD_DIRTY_SHADER_IMAGE,
198 BIT(FD6_GROUP_GS_BINDLESS));
199 /* NOTE: FD6_GROUP_FS_BINDLESS has a weak dependency on the program
200 * state (ie. it needs to be re-generated with fb-read descriptor
201 * patched in) but this special case is handled in fd6_emit_3d_state()
202 */
203 fd_context_add_shader_map(ctx, PIPE_SHADER_FRAGMENT,
204 FD_DIRTY_SHADER_SSBO | FD_DIRTY_SHADER_IMAGE,
205 BIT(FD6_GROUP_FS_BINDLESS));
206 fd_context_add_shader_map(ctx, PIPE_SHADER_COMPUTE,
207 FD_DIRTY_SHADER_SSBO | FD_DIRTY_SHADER_IMAGE,
208 BIT(FD6_GROUP_CS_BINDLESS));
209 fd_context_add_shader_map(ctx, PIPE_SHADER_FRAGMENT,
210 FD_DIRTY_SHADER_PROG,
211 BIT(FD6_GROUP_PRIM_MODE_SYSMEM) | BIT(FD6_GROUP_PRIM_MODE_GMEM));
212
213 /* NOTE: scissor enabled bit is part of rasterizer state, but
214 * fd_rasterizer_state_bind() will mark scissor dirty if needed:
215 */
216 fd_context_add_map(ctx, FD_DIRTY_SCISSOR | FD_DIRTY_PROG,
217 BIT(FD6_GROUP_SCISSOR));
218
219 /* Stuff still emit in IB2
220 *
221 * NOTE: viewport state doesn't seem to change frequently, so possibly
222 * move it into FD6_GROUP_RASTERIZER?
223 */
224 fd_context_add_map(
225 ctx, FD_DIRTY_STENCIL_REF | FD_DIRTY_VIEWPORT | FD_DIRTY_RASTERIZER | FD_DIRTY_PROG,
226 BIT(FD6_GROUP_NON_GROUP));
227 }
228
229 template <chip CHIP>
230 struct pipe_context *
fd6_context_create(struct pipe_screen * pscreen,void * priv,unsigned flags)231 fd6_context_create(struct pipe_screen *pscreen, void *priv,
232 unsigned flags) disable_thread_safety_analysis
233 {
234 struct fd_screen *screen = fd_screen(pscreen);
235 struct fd6_context *fd6_ctx = CALLOC_STRUCT(fd6_context);
236 struct pipe_context *pctx;
237
238 if (!fd6_ctx)
239 return NULL;
240
241 pctx = &fd6_ctx->base.base;
242 pctx->screen = pscreen;
243
244 fd6_ctx->base.flags = flags;
245 fd6_ctx->base.dev = fd_device_ref(screen->dev);
246 fd6_ctx->base.screen = fd_screen(pscreen);
247 fd6_ctx->base.last.key = &fd6_ctx->last_key;
248
249 pctx->destroy = fd6_context_destroy;
250 pctx->create_blend_state = fd6_blend_state_create;
251 pctx->create_rasterizer_state = fd6_rasterizer_state_create;
252 pctx->create_depth_stencil_alpha_state = fd6_zsa_state_create<CHIP>;
253 pctx->create_vertex_elements_state = fd6_vertex_state_create;
254
255 fd6_draw_init<CHIP>(pctx);
256 fd6_compute_init<CHIP>(pctx);
257 fd6_gmem_init<CHIP>(pctx);
258 fd6_texture_init(pctx);
259 fd6_prog_init<CHIP>(pctx);
260 fd6_query_context_init<CHIP>(pctx);
261
262 setup_state_map(&fd6_ctx->base);
263
264 pctx = fd_context_init(&fd6_ctx->base, pscreen, priv, flags);
265 if (!pctx) {
266 free(fd6_ctx);
267 return NULL;
268 }
269
270 pctx->set_framebuffer_state = fd6_set_framebuffer_state;
271
272 /* after fd_context_init() to override set_shader_images() */
273 fd6_image_init(pctx);
274
275 /* after fd_context_init() to override memory_barrier/texture_barrier(): */
276 fd6_barrier_init(pctx);
277
278 util_blitter_set_texture_multisample(fd6_ctx->base.blitter, true);
279
280 pctx->delete_vertex_elements_state = fd6_vertex_state_delete;
281
282 /* fd_context_init overwrites delete_rasterizer_state, so set this
283 * here. */
284 pctx->delete_rasterizer_state = fd6_rasterizer_state_delete;
285 pctx->delete_blend_state = fd6_blend_state_delete;
286 pctx->delete_depth_stencil_alpha_state = fd6_zsa_state_delete;
287
288 /* initial sizes for VSC buffers (or rather the per-pipe sizes
289 * which is used to derive entire buffer size:
290 */
291 fd6_ctx->vsc_draw_strm_pitch = 0x440;
292 fd6_ctx->vsc_prim_strm_pitch = 0x1040;
293
294 fd6_ctx->control_mem =
295 fd_bo_new(screen->dev, 0x1000, 0, "control");
296
297 fd_context_add_private_bo(&fd6_ctx->base, fd6_ctx->control_mem);
298
299 memset(fd_bo_map(fd6_ctx->control_mem), 0, sizeof(struct fd6_control));
300
301 fd_context_setup_common_vbos(&fd6_ctx->base);
302
303 fd6_blitter_init<CHIP>(pctx);
304
305 struct fd_ringbuffer *ring =
306 fd_ringbuffer_new_object(fd6_ctx->base.pipe, 6 * 4);
307
308 OUT_REG(ring, A6XX_GRAS_SAMPLE_CONFIG());
309 OUT_REG(ring, A6XX_RB_SAMPLE_CONFIG());
310 OUT_REG(ring, A6XX_SP_TP_SAMPLE_CONFIG());
311
312 fd6_ctx->sample_locations_disable_stateobj = ring;
313
314 return fd_context_init_tc(pctx, flags);
315 }
316 FD_GENX(fd6_context_create);
317