| /aosp_15_r20/external/vixl/test/aarch64/ |
| H A D | test-api-movprfx-aarch64.cc | 448 __ fmla(z4.VnH(), z24.VnH(), z4.VnH(), 7); in TEST() local
451 __ fmla(z4.VnS(), z24.VnS(), z4.VnS(), 3); in TEST() local
454 __ fmla(z5.VnD(), z28.VnD(), z5.VnD(), 1); in TEST() local
457 __ fmla(z24.VnD(), z24.VnD(), z2.VnD(), 1); in TEST() local
460 __ fmla(z7.VnH(), p2.Merging(), z7.VnH(), z31.VnH()); in TEST() local
463 __ fmla(z25.VnH(), p5.Merging(), z29.VnH(), z25.VnH()); in TEST() local
466 __ fmla(z31.VnH(), z31.VnH(), z2.VnH(), 7); in TEST() local
469 __ fmla(z15.VnS(), z15.VnS(), z4.VnS(), 3); in TEST() local
973 __ fmla(z13.VnD(), p3.Merging(), z12.VnD(), z21.VnD()); in TEST() local
1299 __ fmla(z16.VnD(), z24.VnD(), z8.VnD(), 1); in TEST() local
[all …]
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| H A D | test-trace-aarch64.cc | 2650 __ fmla(d23, d0, v9.D(), 1); in GenerateTestSequenceNEONFP() local
2651 __ fmla(s23, s15, v7.S(), 0); in GenerateTestSequenceNEONFP() local
2652 __ fmla(v17.V2D(), v11.V2D(), v6.V2D()); in GenerateTestSequenceNEONFP() local
2653 __ fmla(v30.V2D(), v30.V2D(), v11.D(), 0); in GenerateTestSequenceNEONFP() local
2654 __ fmla(v19.V2S(), v12.V2S(), v6.V2S()); in GenerateTestSequenceNEONFP() local
2655 __ fmla(v24.V2S(), v17.V2S(), v9.S(), 0); in GenerateTestSequenceNEONFP() local
2656 __ fmla(v16.V4S(), v11.V4S(), v11.V4S()); in GenerateTestSequenceNEONFP() local
2657 __ fmla(v27.V4S(), v23.V4S(), v9.S(), 2); in GenerateTestSequenceNEONFP() local
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| /aosp_15_r20/external/llvm/test/MC/AArch64/ |
| H A D | neon-scalar-by-elem-mla.s | 11 fmla d0, d1, v1.d[0] define
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| /aosp_15_r20/external/XNNPACK/src/jit/ |
| H A D | aarch64-assembler.cc | 429 void Assembler::fmla(VRegister vd, VRegister vn, VRegisterLane vm) { in fmla() function in xnnpack::aarch64::Assembler
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| /aosp_15_r20/external/vixl/src/aarch64/ |
| H A D | logic-aarch64.cc | 5204 LogicVRegister Simulator::fmla(VectorFormat vform, in fmla() function in vixl::aarch64::Simulator
5221 LogicVRegister Simulator::fmla(VectorFormat vform, in fmla() function in vixl::aarch64::Simulator
5700 LogicVRegister Simulator::fmla(VectorFormat vform, in fmla() function in vixl::aarch64::Simulator
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| H A D | assembler-sve-aarch64.cc | 1418 void Assembler::fmla(const ZRegister& zda, in fmla() function in vixl::aarch64::Assembler
1607 void Assembler::fmla(const ZRegister& zda, in fmla() function in vixl::aarch64::Assembler
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