1 /* 2 * Copyright (c) 2015-2023, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file mos_os_trace_event.h 24 //! \brief MOS trace event header file. 25 //! \details only contain trace event id and type definition, which will keep 26 //! growing. 27 //! 28 29 #ifndef __MOS_OS_TRACE_H__ 30 #define __MOS_OS_TRACE_H__ 31 32 //! 33 //! \brief helper to expand trace event data from dynmac size Marco 34 //! 35 36 #define _TR_PRE(x) x 37 #define _TR_CAT_(a, b) a##b 38 #define _TR_CAT(a, b) _TR_CAT_(a, b) 39 40 //! 41 //! \brief internal marco to calc the number of args in __VA_ARGS__, support count upto 10 args 42 //! Due to C99 compiler definition, _TR_COUNT_() return 1. need new marco to use. 43 //! 44 #define _TR_CNT_N(_1, _2, _3, _4, _5, _6, _7, _8, _9, _10, cnt, ...) cnt 45 #define _TR_COUNT(...) _TR_PRE(_TR_CNT_N(__VA_ARGS__, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)) 46 47 //! 48 //! \brief internal marco to calc byte size of all args, and memcpy to pre-defined buffer 49 //! 50 #define _TR_OPsize(x) +sizeof(x) 51 #define _TR_OPfield(x) {auto _t=x;memcpy(_buf + _i, &(_t), sizeof(x));_i += sizeof(x);} 52 53 //! 54 //! \brief internal marco to calc byte size of all args, and memcpy to pre-defined buffer 55 //! 56 #define _TR_EXPAND1(o, x, ...) _TR_PRE(_TR_CAT(_TR_OP, o)(x)) 57 #define _TR_EXPAND2(o, x, ...) _TR_EXPAND1(o, x) _TR_PRE(_TR_EXPAND1(o, __VA_ARGS__)) 58 #define _TR_EXPAND3(o, x, ...) _TR_EXPAND1(o, x) _TR_PRE(_TR_EXPAND2(o, __VA_ARGS__)) 59 #define _TR_EXPAND4(o, x, ...) _TR_EXPAND1(o, x) _TR_PRE(_TR_EXPAND3(o, __VA_ARGS__)) 60 #define _TR_EXPAND5(o, x, ...) _TR_EXPAND1(o, x) _TR_PRE(_TR_EXPAND4(o, __VA_ARGS__)) 61 #define _TR_EXPAND6(o, x, ...) _TR_EXPAND1(o, x) _TR_PRE(_TR_EXPAND5(o, __VA_ARGS__)) 62 #define _TR_EXPAND7(o, x, ...) _TR_EXPAND1(o, x) _TR_PRE(_TR_EXPAND6(o, __VA_ARGS__)) 63 #define _TR_EXPAND8(o, x, ...) _TR_EXPAND1(o, x) _TR_PRE(_TR_EXPAND7(o, __VA_ARGS__)) 64 #define _TR_EXPAND9(o, x, ...) _TR_EXPAND1(o, x) _TR_PRE(_TR_EXPAND8(o, __VA_ARGS__)) 65 #define _TR_EXPAND10(o, x, ...) _TR_EXPAND1(o, x) _TR_PRE(_TR_EXPAND9(o, __VA_ARGS__)) 66 // Note: increase _TR_EXPANDxx to support more param 67 68 #define _TR_PARAM_SIZE(...) _TR_PRE(_TR_CAT(_TR_EXPAND, _TR_COUNT(__VA_ARGS__))(size, __VA_ARGS__)) 69 #define _TR_PARAM_FIELD(...) _TR_PRE(_TR_CAT(_TR_EXPAND, _TR_COUNT(__VA_ARGS__))(field, __VA_ARGS__)) 70 71 //! 72 //! \brief trace marco interface, for external usage, split 2 marco for customzed trace write interface 73 //! 74 #define TR_FILL_PARAM(...) \ 75 int _i = 0; \ 76 char _buf[0 _TR_PARAM_SIZE(__VA_ARGS__)]; \ 77 _TR_PARAM_FIELD(__VA_ARGS__); 78 79 #define TR_WRITE_PARAM(func, id, op) \ 80 func(id, op, _buf, sizeof(_buf), nullptr, 0); 81 82 //! 83 //! \brief Keyword for ETW tracing, 1bit per keyworld, total 64bits 84 //! 85 typedef enum _MEDIA_EVENT_FILTER_KEYID 86 { 87 TR_KEY_DECODE_PICPARAM = 0, 88 TR_KEY_DECODE_SLICEPARAM, 89 TR_KEY_DECODE_TILEPARAM, 90 TR_KEY_DECODE_QMATRIX, 91 TR_KEY_DECODE_BITSTREAM_INFO, 92 TR_KEY_DECODE_BITSTREAM, 93 TR_KEY_DECODE_INTERNAL, 94 TR_KEY_DECODE_COMMAND, 95 TR_KEY_DECODE_DSTYUV, 96 TR_KEY_DECODE_REFYUV, 97 TR_KEY_DECODE_MV, 98 TR_KEY_DECODE_SUBSET, 99 TR_KEY_MOSMSG_ALL = 12, 100 TR_KEY_CALL_STACK, 101 TR_KEY_DATA_DUMP = 16, 102 TR_KEY_MOSMSG_CP, 103 TR_KEY_MOSMSG_VP, 104 TR_KEY_MOSMSG_CODEC, 105 TR_KEY_MOSMSG_DDI, 106 TR_KEY_MOSMSG_MOS, 107 TR_KEY_MOSMSG_MHW, 108 TR_KEY_DECODE_INFO, 109 TR_KEY_ENCODE_EVENT_DDI = 24, 110 TR_KEY_ENCODE_EVENT_API_STICKER, 111 TR_KEY_ENCODE_EVENT_INTERNAL, 112 TR_KEY_ENCODE_DATA_INPUT_SURFACE, 113 TR_KEY_ENCODE_DATA_REF_SURFACE, 114 TR_KEY_ENCODE_DATA_RECON_SURFACE, 115 TR_KEY_ENCODE_DATA_BITSTREAM, 116 TR_KEY_DECODE_DSTYUV_IN_TRACE, 117 TR_KEY_ENCODE_DATA_HUC_DMEM, 118 TR_KEY_ENCODE_DATA_HUC_REGION, 119 } MEDIA_EVENT_FILTER_KEYID; 120 121 #pragma pack(push, 8) 122 struct MtSetting 123 { 124 struct FastDump 125 { 126 uint8_t allowDataLoss : 1; 127 uint8_t frameIdxBasedSampling : 1; 128 uint8_t memUsagePolicy : 2; 129 uint8_t writeMode : 2; 130 uint8_t informOnError : 1; 131 uint8_t rsv0 : 1; 132 uint8_t rsv1; 133 uint8_t maxPrioritizedMem; 134 uint8_t maxDeprioritizedMem; 135 uint8_t weightRenderCopy; 136 uint8_t weightVECopy; 137 uint8_t weightBLTCopy; 138 uint8_t rsv2; 139 uint64_t samplingTime; 140 uint64_t samplingInterval; 141 uint64_t bufferSize; 142 char filePath[1024]; 143 } fastDump; 144 145 struct HwcmdParser 146 { 147 char filePath[1024]; 148 } hwcmdParser; 149 150 uint8_t rsv[1504]; 151 }; 152 153 // 4KB in total 154 struct MtControlData 155 { 156 uint32_t enable; 157 uint8_t level; 158 uint8_t rsv[3]; 159 uint64_t filter[63]; 160 161 MtSetting setting; 162 }; 163 #pragma pack(pop) 164 165 enum class MT_EVENT_LEVEL 166 { 167 ALWAYS, 168 CRITICAL, 169 ERR, 170 WARNING, 171 INFO, 172 VERBOSE, 173 }; 174 175 enum class MT_DATA_LEVEL 176 { 177 FIRST_64B, // dump first min(DataSize, 64) bytes 178 QUARTER, // dump first min(DataSize, max(DataSize/4, 64)) bytes 179 HALF, // dump first min(DataSize, max(DataSize/2, 64)) bytes 180 FULL, // dump all data 181 }; 182 183 enum class MT_LOG_LEVEL 184 { 185 ALWAYS, 186 CRITICAL, 187 NORMAL, 188 VERBOSE, 189 FUNCTION_ENTRY, 190 FUNCTION_EXIT, 191 FUNCTION_ENTRY_VERBOSE, 192 MEMNINJA, 193 }; 194 195 typedef enum _MEDIA_EVENT 196 { 197 UNDEFINED_EVENT = 0, //! reserved id, should not used in driver 198 EVENT_RESOURCE_ALLOCATE, //! event for MOS resource allocate 199 EVENT_RESOURCE_FREE, //! event for MOS resource free 200 EVENT_RESOURCE_REGISTER, //! event for register MOS resource to gpu command 201 EVENT_RESOURCE_PATCH, //! event for patch MOS resource 202 EVENT_PPED_HUC, //! event for PPED HuC path 203 EVENT_PPED_FW, //! event for PPED FW path 204 EVENT_PPED_AUDIO, //! event for PPED audio path 205 EVENT_BLT_ENC, //! event for blt enc mode 206 EVENT_BLT_DEC, //! event for blt dec mode 207 EVENT_PPED_HW_CAPS, //! event for PPED HW capability 208 EVENT_MOS_MESSAGE, //! event for MOS debug message 209 EVENT_CODEC_NV12ToP010, //! event for NV12 to P010 in codechal 210 EVENT_CODEC_CENC, //! event for CENC Decode 211 EVENT_CODEC_DECODE_DDI, //! event for Decoder decode DDI level 212 EVENT_CODEC_DECODE, //! event for Decoder decode 213 EVENT_CODEC_ENCODE_DDI, //! event for Decoder encode DDI level 214 EVENT_ENCODER_CREATE, //! event for encoder create 215 EVENT_ENCODER_DESTROY, //! event for encoder destory. 216 EVENT_CODECHAL_CREATE, //! event for codechal create. 217 EVENT_CODECHAL_EXECUTE, //! event for codechal execute. 218 EVENT_CODECHAL_DESTROY, //! event for codechal destory. 219 EVENT_MHW_PROLOG, //! event for MHW GPU cmd prolog. 220 EVENT_MHW_EPILOG, //! event for MHW GPU cmd epilog. 221 EVENT_KEYEXCHANGE_WV, //! event for WV key exchange 222 EVENT_TEST1, //! event for immediate event trace usage in debug. 223 EVENT_TEST2, //! avoid build manifest for temp event. 224 EVENT_TEST3, //! pre allocate 3 events. 225 EVENT_CP_CREATE, //! event for cp session create 226 EVENT_CP_DESTROY, //! event for cp session destroy 227 EVENT_HECI_IOMSG, //! event for heci IO message send receive 228 EVENT_CP_CHECK_SESSION_STATUS, //! event for cp session status check 229 EVENT_CP_RESOURCR_SESSION, //! event for cp resource session create 230 EVENT_PREPARE_RESOURCES, //! event for prepare resource 231 EVENT_DDI_CODEC_CREATE, //! event for ddi tracking - codec create 232 EVENT_DDI_CODEC_DESTROY, //! event for ddi tracking - codec destroy 233 EVENT_DDI_CODEC_VIEW, //! event for ddi tracking - codec view 234 EVENT_DDI_VP_CREATE, //! event for ddi tracking - vp create 235 EVENT_DDI_VP_DESTROY, //! event for ddi tracking - vp destroy 236 EVENT_DDI_VP_VIEW, //! event for ddi tracking - vp view 237 EVENT_DDI_VP_BLT, //! event for ddi tracking - vp blt 238 EVENT_DDI_VP_BLT_SETSTATE, //! event for ddi tracking - vp blt stream state 239 EVENT_DDI_VPHAL_REPORT, //! event for ddi tracking - vp hal report 240 EVENT_DDI_VP_BLT_HINTS, //! event for ddi tracking - vp blt hints 241 EVENT_CP_CERT_COUNT, //! event for number of certs 242 EVENT_CP_CERT_NOT_FOUND, //! event for certificate not found 243 EVENT_DDI_VIDEOVIEW_CLEAR, //! event for ddi tracking - ClearVideoView 244 EVENT_DDE_FUNCTION, //! event for function enter/exit 245 EVENT_DDE_QUERY_HDCP_INTERFACE, //! event for cp ddi 246 EVENT_DDE_CB_REPORT_AUTH_RESULT, 247 EVENT_DDE_ESCAPE, 248 EVENT_DDE_AKE_INIT, //! event for HDCP 2 messages 249 EVENT_DDE_AKE_SEND_CERT, 250 EVENT_DDE_AKE_NOSTORED_KM, 251 EVENT_DDE_AKE_STORED_KM, 252 EVENT_DDE_AKE_SEND_RRX, 253 EVENT_DDE_AKE_SEND_HRPIME, 254 EVENT_DDE_SKE_SEND_EKS, 255 EVENT_DDE_AKE_TRANSMITTER_INFO, 256 EVENT_DDE_AKE_RECEIVER_INFO, 257 EVENT_DDE_REPAUTH_SEND_RXIDLIST, 258 EVENT_DDE_REPAUTH_SEND_ACK, 259 EVENT_DDE_REPAUTH_STREAM_MANAGE, 260 EVENT_DDE_REPAUTH_STREAM_READY, 261 EVENT_DDE_RECEIVER_AUTHSTATUS, 262 EVENT_DDE_CREATE_HDCP_CONTEXT, 263 EVENT_DDE_DESTROY_HDCP_CONTEXT, 264 EVENT_DDE_RECEIVE_DATA, 265 EVENT_DDE_CB_REPORT_ENCRYPTION_STATUS, 266 EVENT_DDE_CB_REPORT_LINK_STATUS, 267 EVENT_DDE_CB_SEND_DATA, 268 EVENT_DDE_MESSAGE, //! event for debug message 269 EVENT_OCA_ERROR, //! event for OCA error. 270 EVENT_DATA_DUMP, //! event for debug data dump 271 EVENT_HECI_OBJ, //! event for heci duplicate handle 272 EVENT_PLAT_INFO, //! event for static platform info 273 EVENT_DATA_DICTIONARY, //! event for data dictionary (name:value pair) 274 EVENT_MEDIA_COPY, //! event for media decompresss/copy/blt 275 EVENT_MOS_BATCH_SUBMIT, //! event for batch buffer submission 276 EVENT_VA_PICTURE, //! event for VA begin/render/end picture 277 EVENT_VA_SYNC, //! event for VA sync surface/buffer 278 EVENT_VA_GET, //! event for VA get image 279 EVENT_VA_CONFIG, //! event for VA query config 280 EVENT_VA_SURFACE, //! event for VA create surface 281 EVENT_VA_FREE_SURFACE, //! event for VA destroy surface 282 EVENT_VA_DERIVE, //! event for VA derive surface to image 283 EVENT_VA_MAP, //! event for VA map buffer 284 EVENT_VA_UNMAP, //! event for VA unmap buffer 285 EVENT_VA_LOCK, //! event for VA lock surface 286 EVENT_VA_UNLOCK, //! event for VA unlock surface 287 EVENT_VA_BUFFER, //! event for VA create buffer 288 EVENT_VA_FREE_BUFFER, //! event for VA destroy buffer 289 EVENT_VA_IMAGE, //! event for VA create image 290 EVENT_VA_FREE_IMAGE, //! event for VA destroy image 291 EVENT_VA_PUT, //! event for VA put image 292 EVENT_PIPE_EXE, //! event for pipeline execute 293 EVENT_PIPE_PACKET, //! event for pipeline ActivatePacket 294 EVENT_DDI_CREATE_DEVICE, //! event for Refactor DDI Create Device 295 EVENT_DDI_DESTROY_DEVICE, //! event for Refactor DDI Destroy Device 296 EVENT_DDI_DESTROY_RESOURCE_INFO, //! event for Refactor DDI Destroy Resource Info 297 EVENT_DDI_SYNC_CALLBACK, //! event for Refactor DDI Sync Callback 298 EVENT_DDI_LOCK_SYNC_CALLBACK, //! event for Refactor DDI Lock Sync 299 EVENT_DDI_TRIM_RESIDENCY_MEDIA, //! event for Refactor DDI Trim Residency Media 300 EVENT_DDI_TRIM_RESIDENCY_MEDIA_INTERNAL, //! event for Refactor DDI Trim Residency Media Internal 301 EVENT_DDI_UPDATE_MEDIA_RESIDENCY_LIST, //! event for Refactor DDI Update Media Residency List 302 EVENT_DDI_IS_PROTECTION_ENABLED, //! event for Refactor DDI Is Protection Enable 303 EVENT_DDI_PROTECTION_TRIGGERED, //! event for Refactor DDI Protection Triggered 304 EVENT_DDI_INIT_ARBITRATOR_SESSION_RES, //! event for Refactor DDI Init Arbitrator Session Res 305 EVENT_DDI_IS_OVERLAY_OR_FULLSCREEN_REQUIRED, //! event for Refactor DDI Is Overlay Or Fullscreen Required 306 EVENT_DDI_MEDIA_MEM_DECOMP_CALLBACK, //! event for Refactor DDI Media Mem Decomp Callback 307 EVENT_DDI_MEDIA_MEM_COPY_CALLBACK, //! event for Refactor DDI Media Mem Copy Callback 308 EVENT_DDI_GET_TRANSCRYPTED_SHADER, //! event for Refactor DDI Get Transcrypted Shader 309 EVENT_DDI_CLEAR_VIDEO_VIEW, //! event for Refactor DDI Clear Video View 310 EVENT_GPU_CONTEXT_CREATE, //! event for gpu context create 311 EVENT_GPU_CONTEXT_DESTROY, //! event for gpu context destroy 312 EVENT_PIC_PARAM_AVC, //! event for AVC picture param 313 EVENT_PIC_PARAM_HEVC, //! event for HEVC picture param 314 EVENT_PIC_PARAM_VP9, //! event for VP9 picture param 315 EVENT_PIC_PARAM_AV1, //! event for AV1 picture param 316 EVENT_MEDIA_LOG, //! event for media log 317 EVENT_MEDIA_LOG_RESERVE, //! event for more media log 318 EVENT_MEDIA_ERR, //! event for media error 319 EVENT_MEDIA_ERR_RESERVE, //! event for more media error 320 EVENT_DECODE_DDI_11_GETPROFILECOUNT, //! event for Decode Get Profile Count 321 EVENT_DECODE_DDI_11_GETPROFILE, //! event for Decode Get Profile 322 EVENT_DECODE_DDI_11_CHECKFORMAT, //! event for Decode Check Format 323 EVENT_DECODE_DDI_11_GETCONFIGCOUNT, //! event for Decode Config Count 324 EVENT_DECODE_DDI_11_GETCONFIG, //! event for Decode Config 325 EVENT_DECODE_DDI_11_GETBUFFERTYPECOUNT, //! event for Decode Buffer Count 326 EVENT_DECODE_DDI_11_GETBUFFERINFO, //! event for Decode Buffer Info 327 EVENT_DECODE_DDI_11_CREATEVIDEODECODER, //! event for Decode Create Device 328 EVENT_DECODE_DDI_11_CREATEOUTPUTVIEW, //! event for Decode Create Output View 329 EVENT_DECODE_DDI_11_BEGINFRAME, //! event for Decode Begin Frame 330 EVENT_DECODE_DDI_11_SUBMITBUFFERS, //! event for Decode Execute 331 EVENT_DECODE_DDI_11_EXTENSIONEXECUTE, //! event for Decode Extension Execute 332 EVENT_DECODE_DDI_11_ENDFRAME, //! event for Decode End Frame 333 EVENT_DECODE_DDI_11_DESTROYOUTPUTVIEW, //! event for Decode Destroy Output View 334 EVENT_DECODE_DDI_11_DESTROYVIDEODECODER, //! event for Decode Destroy Device 335 EVENT_DECODE_BUFFER_PICPARAM_VP9, //! event for Decode VP9 Pic Paramters 336 EVENT_DECODE_BUFFER_SEGPARAM_VP9, //! event for Decode VP9 Segment Paramters 337 EVENT_DECODE_BUFFER_SLICEPARAM_VP9, //! event for Decode VP9 Slice Paramters 338 EVENT_DECODE_INFO_BITSTREAM, //! event for Decode Bitstream Info 339 EVENT_DECODE_INFO_PICTURE, //! event for Decode Picture Info 340 EVENT_DECODE_CMD_HCP_SURFACESTATE, //! event for Decode HcpSurfaceState Cmd 341 EVENT_DECODE_CMD_HCP_PIPEBUFADDRSTATE, //! event for Decode HcpPipeBufAddrState Cmd 342 EVENT_DECODE_CMD_HCP_INDOBJBASEADDRSTATE, //! event for Decode HcpIndObjBaseAddrState Cmd 343 EVENT_DECODE_CMD_HCP_SEGMENTSTATE_VP9, //! event for Decode HcpVp9SegmentState Cmd 344 EVENT_DECODE_CMD_HCP_PICSTATE_VP9, //! event for Decode HcpVp9PicState Cmd 345 EVENT_DECODE_BUFFER_IQPARAM_AVC, //! event for Decode AVC IQ Paramters 346 EVENT_DECODE_BUFFER_PICPARAM_AV1, //! event for Decode AV1 Pic Paramters 347 EVENT_DECODE_BUFFER_SEGPARAM_AV1, //! event for Decode AV1 Segment Paramters 348 EVENT_DECODE_BUFFER_FILMGRAINPARAM_AV1, //! event for Decode AV1 Film Grain Paramters 349 EVENT_DECODE_BUFFER_TILEPARAM_AV1, //! event for Decode AV1 Tile Paramters 350 EVENT_DECODE_BUFFER_PICPARAM_AVC, //! event for Decode AVC Pic Paramters 351 EVENT_DECODE_BUFFER_SLICEPARAM_AVC, //! event for Decode AVC Slice Paramters 352 EVENT_DECODE_BUFFER_PICPARAM_HEVC, //! event for Decode HEVC Pic Paramters 353 EVENT_DECODE_BUFFER_REXTPICPARAM_HEVC, //! event for Decode HEVC REXT Pic Paramters 354 EVENT_DECODE_BUFFER_SCCPICPARAM_HEVC, //! event for Decode HEVC SCC Pic Paramters 355 EVENT_DECODE_BUFFER_SLICEPARAM_HEVC, //! event for Decode HEVC Slice Paramters 356 EVENT_DECODE_BUFFER_LONGSLICEPARAM_HEVC, //! event for Decode HEVC Long Slice Paramters 357 EVENT_DECODE_BUFFER_REXTLONGSLICEPARAM_HEVC, //! event for Decode HEVC RExt Long Slice Paramters 358 EVENT_DECODE_BUFFER_LONGSLICEPARAM_AVC, //! event for Decode AVC Long Slice Paramters 359 EVENT_DECODE_INFO_MMC, //! event for Decode Info MMC 360 EVENT_DECODE_INFO_SCALABILITY, //! event for Decode Info Scalability 361 EVENT_DECODE_INFO_SFC, //! event for Decode Info SFC 362 EVENT_DECODE_INFO_DECODEMODE_REPORT, //! event for Decode Info Decode Mode Report 363 EVENT_DECODE_DUMPINFO_DST, //! event for Decode Dst Dump Info 364 EVENT_DECODE_DUMPINFO_REF, //! event for Decode Ref Dump Info 365 EVENT_CALL_STACK, //! event for call stack dump 366 EVENT_ENCODE_DDI_11_CREATEVIDEOENCODER, //! event for Encode Create Device 367 EVENT_ENCODE_DDI_11_ENCODEFRAME, //! event for Encode frame, mainly excute 368 EVENT_ENCODE_DDI_11_GETCAPS, //! event for Encode getting caps 369 EVENT_ENCODE_DDI_11_GETPROFILECOUNT, //! event for Encode get profile count 370 EVENT_ENCODE_DDI_11_GETPROFILE, //! event for Encode get profile 371 EVENT_ENCODE_DDI_11_CHECKFORMAT, //! event for Encode check format 372 EVENT_ENCODE_DDI_11_GETCONFIGCOUNT, //! event for Encode get config count 373 EVENT_ENCODE_DDI_11_GETCONFIG, //! event for Encode get config 374 EVENT_ENCODE_DDI_STATUS_REPORT_HEVC, //! event for HEVC encode status report 375 EVENT_ENCODE_DDI_SLICE_STATUS_REPORT_HEVC, //! event for HEVC encode slice status report 376 EVENT_ENCODE_DDI_EXT_STATUS_REPORT_HEVC, //! event for HEVC encode ext status report 377 EVENT_ENCODE_DDI_CAPS_HEVC, //! event for HEVC encode caps 378 EVENT_ENCODE_DDI_SEQ_PARAM_HEVC, //! event for HEVC encode sequence param 379 EVENT_ENCODE_DDI_PIC_PARAM_HEVC, //! event for HEVC encode picture param 380 EVENT_ENCODE_DDI_SLC_PARAM_HEVC, //! event for HEVC encode slice param 381 EVENT_ENCODE_DDI_VERSION_HEVC, //! event for HEVC encode DDI version 382 EVENT_ENCODE_API_STICKER_HEVC, //! event for HEVC encode API sticker 383 EVENT_DECODE_DDI_DISPLAYINFOVA, //! event for Decode DDI DisplayInfo 384 EVENT_DECODE_DDI_CREATEBUFFERVA, //! event for Decode DDI CreateBuffer 385 EVENT_DECODE_DDI_BEGINPICTUREVA, //! event for Decode DDI BeginPicture 386 EVENT_DECODE_DDI_ENDPICTUREVA, //! event for Decode DDI EndPicture 387 EVENT_DECODE_DDI_RENDERPICTUREVA, //! event for Decode DDI RenderPicture 388 EVENT_DECODE_DDI_CLEARUPVA, //! event for Decode DDI ClearUp 389 EVENT_DECODE_DDI_STATUSREPORTVA, //! event for Decode DDI StatusReport 390 EVENT_DECODE_DDI_CREATECONTEXTVA, //! event for Decode DDI CreateContext 391 EVENT_DECODE_DDI_DESTROYCONTEXTVA, //! event for Decode DDI DestroyContext 392 EVENT_DECODE_DDI_GETDECCTXFROMBUFFERIDVA, //! event for Decode DDI GetDecCtxFromBufferID 393 EVENT_DECODE_DDI_FREEBUFFERHEAPELEMENTSVA, //! event for Decode DDI FreeBufferHeapElements 394 EVENT_DECODE_DDI_SETGPUPRIORITYVA, //! event for Decode DDI SetGpuPriority 395 EVENT_DECODE_FEATURE_DECODEMODE_REPORTVA, //! event for Decode Feature Decode Mode Report 396 EVENT_DECODE_INFO_PICTUREVA, //! event for Decode Picture Info VA 397 EVENT_DECODE_IP_ALIGNMENT, //! event for Decode IP Alignment 398 EVENT_ENCODE_IP_ALIGNMENT, //! event for Encode IP Alignment 399 EVENT_VPP_IP_ALIGNMENT, //! event for VPP IP Alignment 400 } MEDIA_EVENT; 401 402 typedef enum _MEDIA_EVENT_TYPE 403 { 404 EVENT_TYPE_INFO = 0, //! function information event 405 EVENT_TYPE_START = 1, //! function entry event 406 EVENT_TYPE_END = 2, //! function exit event 407 EVENT_TYPE_INFO2 = 3, //! function extra information event 408 } MEDIA_EVENT_TYPE; 409 410 typedef enum _MT_LEVEL 411 { 412 MT_VERBOSE = 0, //! verbos runtime log 413 MT_NORMAL = 1, //! normal runtime log 414 MT_CRITICAL = 2, //! critical runtime log 415 } MT_LEVEL; 416 417 class MtEnable 418 { 419 public: m_flag(flag)420 MtEnable(bool flag = false) : m_flag(flag) {} 421 MtEnable(const uint32_t * pFlag)422 MtEnable(const uint32_t *pFlag) : m_pFlag(pFlag) {} 423 ~MtEnable()424 ~MtEnable() 425 { 426 Reset(); 427 } 428 429 operator bool() const 430 { 431 return m_pFlag ? *(m_pFlag) : m_flag; 432 } 433 Reset()434 void Reset() 435 { 436 m_pFlag = nullptr; 437 } 438 439 private: 440 bool m_flag = false; 441 const uint32_t *m_pFlag = nullptr; 442 }; 443 444 class MtFilter 445 { 446 public: m_filter(filter)447 MtFilter(const uint64_t *filter = nullptr, size_t filterNum = 0) : m_filter(filter), m_maxKeyNum(filterNum * N) 448 { 449 if (filter && filterNum == 0) 450 { 451 m_maxKeyNum = N; 452 } 453 } 454 ~MtFilter()455 ~MtFilter() 456 { 457 Reset(); 458 } 459 operator()460 bool operator()(MEDIA_EVENT_FILTER_KEYID key) 461 { 462 return m_filter && static_cast<size_t>(key) < m_maxKeyNum ? (m_filter[key / N] & (1ULL << (key % N))) : false; 463 } 464 Reset()465 void Reset() 466 { 467 m_filter = nullptr; 468 m_maxKeyNum = 0; 469 } 470 471 private: 472 static constexpr size_t N = sizeof(uint64_t) << 3; 473 474 const uint64_t *m_filter; 475 size_t m_maxKeyNum; 476 }; 477 478 class MtLevel 479 { 480 public: m_level(reinterpret_cast<const Level * > (level))481 MtLevel(const uint8_t *level = nullptr) : m_level(reinterpret_cast<const Level *>(level)) {} 482 ~MtLevel()483 ~MtLevel() { Reset(); } 484 operator()485 bool operator()(MT_EVENT_LEVEL level) 486 { 487 return m_level ? (level <= static_cast<MT_EVENT_LEVEL>(m_level->event)) : false; 488 } 489 operator()490 bool operator()(MT_DATA_LEVEL level) 491 { 492 return m_level ? (level <= static_cast<MT_DATA_LEVEL>(m_level->data)) : false; 493 } 494 operator()495 bool operator()(MT_LOG_LEVEL level) 496 { 497 return m_level ? (level <= static_cast<MT_LOG_LEVEL>(m_level->log)) : false; 498 } 499 Reset()500 void Reset() { m_level = nullptr; } 501 502 private: 503 struct Level 504 { 505 uint8_t event : 3; // MT_EVENT_LEVEL 506 uint8_t data : 2; // MT_DATA_LEVEL 507 uint8_t log : 3; // MT_LOG_LEVEL 508 }; 509 510 private: 511 const Level *m_level; 512 }; 513 514 #pragma pack(1) 515 typedef struct _MT_PARAM 516 { 517 int32_t id; 518 int64_t value; 519 } MT_PARAM; 520 #pragma pack() 521 522 //! 523 //! \def media trace log id 524 //! |------------|------------------------------------| total 32bits 525 //! 8bits comp id 24bits user specific id 526 //! 527 typedef enum _MT_LOG_ID 528 { 529 MT_LOG_ID_BASE = 0x00000000, // marker for tool, don't change this line 530 MT_ERR_MEM_ALLOC, 531 MT_ERR_GRAPHIC_ALLOC, 532 MT_ERR_NULL_CHECK, 533 MT_ERR_HR_CHECK, 534 MT_ERR_MOS_STATUS_CHECK, 535 MT_ERR_CONDITION_CHECK, 536 MT_ERR_INVALID_ARG, 537 MT_ERR_LOCK_SURFACE, 538 MT_MOS_GPUCXT_CREATE, 539 MT_MOS_GPUCXT_DESTROY, 540 MT_MOS_GPUCXT_GET, 541 MT_MOS_GPUCXT_PRIMARIES, 542 MT_MOS_ADDCMD, 543 MT_MOS_GPUCXT_SETHANDLE, 544 MT_MOS_SYNC, 545 MT_MOS_GPUCXT_SET, 546 MT_MOS_GPUCXT_VALID, 547 MT_MOS_GPUVA_MAP, 548 MT_MOS_GPUVA_FREE, 549 MT_MOS_MM_ALLOCATE_EXTRES, 550 MT_MOS_MM_MAKERESIDENT, 551 MT_MOS_MM_UPDATERESIDENCY, 552 MT_MOS_MM_EVICT, 553 MT_MOS_MM_BIND_GPU_RESOURCE_VIRTUAL, 554 MT_MOS_MM_UNBIND_GPU_RESOURCE_VIRTUAL, 555 MT_ERR_CRITICAL_MESSAGE, 556 MT_MOS_ALLOCATE_MEMORY, 557 MT_MOS_DESTROY_MEMORY, 558 MT_MOS_MEMORY_NINJA_COUNTER, 559 MT_GPU_ALLOCATE_MEMORY, 560 MT_GPU_DESTROY_MEMORY, 561 MT_LOG_ID_CP_BASE = 0x01000000, 562 MT_CP_HAL_NOT_INITIALIZED, 563 MT_CP_HAL_FAIL, 564 MT_CP_HAL_KEY_RULE, 565 MT_CP_HAL_FW_RULE, 566 MT_CP_HAL_EPID_CERT, 567 MT_CP_HAL_VERIFY_TRANS_KERNEL, 568 MT_CP_HAL_METADATA, 569 MT_CP_HAL_EPID_STATUS, 570 MT_CP_HAL_STATUS_CHECK, 571 MT_CP_PROVISION_CERT_CHECK, 572 MT_CP_PROVISION_CERT_NOT_FOUND, 573 MT_CP_HUC_NOT_AUTHENTICATED, 574 MT_CP_KERNEL_RULE, 575 MT_CP_KERNEL_TRANSCRYPT, 576 MT_CP_BUFFER_RULE, 577 MT_CP_MEM_COPY, 578 MT_CP_TRANSCODE_SESSION, 579 MT_CP_KEY_EXCHANGE, 580 MT_CP_CMD_BUFFER_OVERFLOW, 581 MT_CP_CAST_FAIL, 582 MT_CP_PED_PACKET_SIZE_CHECK, 583 MT_CP_CRYPT_COPY_PARAM, 584 MT_CP_INVALID_ENCRYPT_TYPE, 585 MT_CP_INVALID_CACHED_KEY, 586 MT_CP_STATUS_UNINITIALIZED, 587 MT_CP_HAL_QUERY_STATUS, 588 MT_CP_HAl_ROOT_FAIL, 589 MT_CP_ENCRYPT_FAIL, 590 MT_CP_SESSION_INIT, 591 MT_CP_SESSION_CLEANUP, 592 MT_CP_SESSION_CREATE, 593 MT_CP_RETRY_FAIL, 594 MT_CP_CMD_SEND_FAIL, 595 MT_CP_CMD_EXECUTE_FAIL, 596 MT_CP_INVALID_SLOT, 597 MT_CP_INIT_FW, 598 MT_CP_COMMUNICATION_FAIL, 599 MT_CP_INVALID_BUFFER, 600 MT_CP_RESOURCE_DATA, 601 MT_CP_IO_MSG, 602 MT_CP_INIT_MOS_INTERFACE, 603 MT_CP_RESOURCE_ALLOC, 604 MT_CP_RESOURCE_DEALLOC, 605 MT_CP_RESOURCE_GET, 606 MT_CP_RESOURCE_UPDATE, 607 MT_CP_RESOURCE_LOCK, 608 MT_CP_RESOURCE_COPY, 609 MT_CP_CONSTRUCTOR_FAIL, 610 MT_CP_ATTACH_SESSION, 611 MT_CP_DETACH_SESSION, 612 MT_CP_ESCAPE_CALL, 613 MT_CP_SESSION_STATUS_GET, 614 MT_CP_CMDLIST_ASSOCIATE_FAIL, 615 MT_CP_CMD_BUFFER_GET, 616 MT_CP_CMD_SUBMIT, 617 MT_CP_CMD_BUILD, 618 MT_CP_CMD_OBJECT_CREATE, 619 MT_CP_SKU_TABLE_GET, 620 MT_CP_USAGE_TABLE_GET, 621 MT_CP_CMD_RECORDER_INIT, 622 MT_CP_CMD_POOL_INIT, 623 MT_CP_CMD_LIST_INIT, 624 MT_CP_MMIO_MAPPING_INIT, 625 MT_CP_MEM_MAP_FAIL, 626 MT_CP_REG_SET, 627 MT_CP_DATA_SEND_FAIL, 628 MT_CP_BLT_SURF, 629 MT_CP_REG_READ_FAIL, 630 MT_CP_DEC_DEVICE_ADD, 631 MT_CP_DEC_DEVICE_INIT, 632 MT_CP_DEC_DEVICE_VERIFY, 633 MT_CP_RESOURCE_ESCAPE_CALL, 634 MT_CP_SESSION_ASSOCIATE, 635 MT_CP_SESSION_ALLOC, 636 MT_CP_SESSION_MODE_SET, 637 MT_CP_SESSION_TYPE_SET, 638 MT_CP_SESSION_TERMINATE, 639 MT_CP_PROPIETARY_FUNC, 640 MT_CP_ENCRYPTION_BLT_FAIL, 641 MT_CP_GET_DATA_FAIL, 642 MT_CP_VECTOR_EXCEPTION, 643 MT_CP_ENCRYPT_TYPE_SET, 644 MT_CP_ME_OPERATION_FAIL, 645 MT_CP_ACCESS_ME_FAIL, 646 MT_CP_OBJECT_CREATE_FAIL, 647 MT_CP_HW_PREPARE_INPUT_BUFFER, 648 MT_CP_HW_PROCESS_MSG, 649 MT_CP_SESSION_KEY_REFRESH, 650 MT_CP_STORE_KEY_BLOB, 651 MT_CP_HECI_INIT, 652 MT_CP_RT_CALLBACK__FAIL, 653 MT_CP_OPEN_SESSION, 654 MT_CP_QUERY_COUNTER_FAIL, 655 MT_CP_FUNC_NOT_IMPL, 656 MT_CP_PERFORM_SW_FAIL, 657 MT_CP_SESSION_NOT_ALIVE, 658 MT_CP_FUNC_FAIL, 659 MT_CP_CENC_STATUS_CHECK, 660 MT_CP_CENC_DECODE_CREATE, 661 MT_CP_MHW_ID_BASE = 0x01004000, 662 MT_CP_MHW_INTERFACE_CREATE_FAIL, 663 MT_CP_MHW_ALLOCATION_FAIL, 664 MT_CP_MHW_UNIT_NOT_SUPPORT, 665 MT_CP_MHW_UNSUPPORTED, 666 MT_CP_MHW_IV_SIZE, 667 MT_CP_MHW_INVALID_KEY, 668 MT_CP_MHW_EARLY_EXIT_CHECK, 669 MT_CP_MHW_STATUS_READ, 670 MT_CP_DDI_ID_BASE = 0x01005000, 671 MT_CP_DDI_CAPS, 672 MT_CP_DDI_CAPS_NOT_SUPPORT, 673 MT_CP_DDI_DEC_PROFILE_NOT_SUPPORT, 674 MT_CP_DDI_NOT_AVAILABLE, 675 MT_CP_DDI_CHANNEL_ALLOC, 676 MT_CP_DDI_CHANNEL_CREATE, 677 MT_CP_DDI_CHANNEL_TYPE, 678 MT_CP_DDI_CHANNEL_ESCAPE_CALL, 679 MT_CP_DDI_OMAC_CREATE, 680 MT_CP_DDI_OMAC_VERIFY, 681 MT_CP_DDI_CHANNEL_QUERY_OUTPUT, 682 MT_CP_DDI_SEQNUM_SET, 683 MT_CP_DDI_ASSOCIATE_HANDLE, 684 MT_CP_DDI_ADD_TRUSTED_PROCESS, 685 MT_CP_DDI_PERFORM_CONFIG_FAIL, 686 MT_CP_DDI_INVALID_CALL, 687 MT_CP_DDI_COUNTER_COPY, 688 MT_CP_DDI_RESOURCE_CREATE, 689 MT_CP_DDI_OS_RESOURCE_INIT, 690 MT_CP_DDI_FUNC_UNSUPPORTED, 691 MT_CP_DDI_LBDM_FALLBACK_SWDRM, 692 MT_LOG_ID_VP_BASE = 0x02000000, 693 MT_VP_CREATE, 694 MT_VP_DESTROY, 695 MT_VP_BLT, 696 MT_VP_BLT_START, 697 MT_VP_BLT_END, 698 MT_VP_BLT_BYPSSED, 699 MT_VP_BLT_FORCE_COLORFILL, 700 MT_VP_BLT_PROCAMP_PARAM, 701 MT_VP_BLT_DN_PARAM, 702 MT_VP_BLT_IEF_PARAM, 703 MT_VP_BLT_IECP_PARAM, 704 MT_VP_BLT_SR_PARAM, 705 MT_VP_BLT_RENDERPASS_DATA, 706 MT_VP_CLEARVIEW, 707 MT_VP_BLT_SETSTATE, 708 MT_VP_BLT_TARGETSURF, 709 MT_VP_BLT_INPUTSURF, 710 MT_VP_BLT_SRC_RECT, 711 MT_VP_BLT_DST_RECT, 712 MT_VP_BLT_TARGET_RECT, 713 MT_VP_BLT_HDRPARAM, 714 MT_VP_BLT_FDFBPARAM, 715 MT_VP_BLT_SEGMENTPARAM, 716 MT_VP_BLT_MCPYPARAM, 717 MT_VP_USERFEATURE_CTRL, 718 MT_VP_FTR_REPORT, 719 MT_VP_FEATURE_GRAPH_ID_BASE = 0x02000200, 720 MT_VP_FEATURE_GRAPH_EXECUTE_VPPIPELINE_START, 721 MT_VP_FEATURE_GRAPH_EXECUTE_VPPIPELINE_END, 722 MT_VP_FEATURE_GRAPH_SETUPEXECUTESWFILTER_START, 723 MT_VP_FEATURE_GRAPH_SETUPEXECUTESWFILTER_END, 724 MT_VP_FEATURE_GRAPH_EXECUTEFILTER, 725 MT_VP_FEATURE_GRAPH_SWFILTERALPHA, 726 MT_VP_FEATURE_GRAPH_SWFILTERBLENDING, 727 MT_VP_FEATURE_GRAPH_SWFILTERCGC, 728 MT_VP_FEATURE_GRAPH_SWFILTERCOLORFILL, 729 MT_VP_FEATURE_GRAPH_SWFILTERCSC, 730 MT_VP_FEATURE_GRAPH_SWFILTERDEINTERLACE, 731 MT_VP_FEATURE_GRAPH_SWFILTERDENOISE, 732 MT_VP_FEATURE_GRAPH_SWFILTERHDR, 733 MT_VP_FEATURE_GRAPH_SWFILTERLUMAKEY, 734 MT_VP_FEATURE_GRAPH_SWFILTERPROCAMP, 735 MT_VP_FEATURE_GRAPH_SWFILTERROTMIR, 736 MT_VP_FEATURE_GRAPH_SWFILTERSCALING, 737 MT_VP_FEATURE_GRAPH_SWFILTERSTE, 738 MT_VP_FEATURE_GRAPH_SWFILTERTCC, 739 MT_VP_FEATURE_GRAPH_SWFILTERACE, 740 MT_VP_FEATURE_GRAPH_SWFILTERCAPPIPE, 741 MT_VP_FEATURE_GRAPH_SWFILTERDV, 742 MT_VP_FEATURE_GRAPH_SWFILTERFDFB, 743 MT_VP_FEATURE_GRAPH_SWFILTERLACE, 744 MT_VP_FEATURE_GRAPH_SWFILTERS3D, 745 MT_VP_FEATURE_GRAPH_SWFILTERSECURECOPY, 746 MT_VP_FEATURE_GRAPH_SWFILTERVEBOXUPDATE, 747 MT_VP_FEATURE_GRAPH_SWFILTERSTD, 748 MT_VP_FEATURE_GRAPH_INPUTSWFILTER, 749 MT_VP_FEATURE_GRAPH_OUTPUTSWFILTER, 750 MT_VP_FEATURE_GRAPH_INPUT_SURFACE_INFO, 751 MT_VP_FEATURE_GRAPH_INTERMEIDATE_SURFACE_INFO, 752 MT_VP_FEATURE_GRAPH_OUTPUT_SURFACE_INFO, 753 MT_VP_FEATURE_GRAPH_SURFACE_ALLOCATIONHANDLE, 754 MT_VP_FEATURE_GRAPH_GET_RENDERTARGETTYPE, 755 MT_VP_FEATURE_GRAPH_SWFILTERSR, 756 MT_VP_FEATURE_GRAPH_FEATUREPIPE_REUSE, 757 MT_VP_FEATURE_GRAPH_EXECUTE_SINGLE_VPPIPELINE_START, 758 MT_VP_FEATURE_GRAPH_EXECUTE_SINGLE_VPPIPELINE_END, 759 MT_VP_HAL_ID_BASE = 0x02000400, 760 MT_VP_HAL_PIPELINE_ADAPTER, 761 MT_VP_HAL_PIPELINE_ADAPTER_EXT_ENTRY, 762 MT_VP_HAL_PIPELINE_ADAPTER_EXT_EXIT, 763 MT_VP_HAL_PIPELINE, 764 MT_VP_HAL_PIPELINE_PREPARE, 765 MT_VP_HAL_PIPELINE_EXT, 766 MT_VP_HAL_POLICY, 767 MT_VP_HAL_HWFILTER, 768 MT_VP_HAL_SWWFILTER, 769 MT_VP_HAL_INIT, 770 MT_VP_HAL_DESTROY, 771 MT_VP_HAL_RENDER, 772 MT_VP_HAL_RENDER_VE, 773 MT_VP_HAL_RENDER_VE_ISNEEDED, 774 MT_VP_HAL_RENDER_VE_GETOUTPUTPIPE, 775 MT_VP_HAL_RENDER_SFC, 776 MT_VP_HAL_RENDER_COMPOSITE, 777 MT_VP_HAL_ALLOC_SURF, 778 MT_VP_HAL_REALLOC_SURF, 779 MT_VP_HAL_SWWFILTER_ADD, 780 MT_VP_HAL_ONNEWFRAME_PROC_START, 781 MT_VP_HAL_ONNEWFRAME_PROC_END, 782 MT_VP_HAL_POLICY_GET_EXTCAPS4FTR, 783 MT_VP_HAL_POLICY_GET_INPIPECAPS, 784 MT_VP_HAL_POLICY_GET_OUTPIPECAPS, 785 MT_VP_HAL_POLICY_INIT_EXECCAPS, 786 MT_VP_HAL_FC_SCALINGINFO, 787 MT_VP_HAL_VESFC_HWLIMIT, 788 MT_VP_HAL_RENDER_SETUP_WALKER_PARAM, 789 MT_VP_HAL_RENDER_SETUP_CURBE_STATE, 790 MT_VP_HAL_POLICY_FLITER_FTR_COMBINE, 791 MT_VP_HAL_FC_UPDATE_COMP_PARAM, 792 MT_VP_HAL_FC_GET_CURBE_STATE, 793 MT_VP_HAL_DESTROY_SURF, 794 MT_VP_HAL_MEMORY_FOOTPRINT_EXECUTION_ENTRY, 795 MT_VP_HAL_MEMORY_FOOTPRINT_EXECUTION_EXIT, 796 MT_VP_HAL_VEBOXNUM_CHECK, 797 MT_VP_HAL_VEBOXNUM_RESET, 798 MT_VP_MHW_ID_BASE = 0x02002000, 799 MT_VP_MHW_VE_SURFSTATE_INPUT, 800 MT_VP_MHW_VE_SURFSTATE_OUT, 801 MT_VP_MHW_VE_SURFSTATE_DNOUT, 802 MT_VP_MHW_VE_SURFSTATE_SKINSCORE, 803 MT_VP_MHW_VE_SURFSTATE_STMM, 804 MT_VP_MHW_VE_SCALABILITY, 805 MT_VP_MHW_VE_ADJUST_SURFPARAM, 806 MT_VP_MHW_CACHE_MOCS_TABLE, 807 MT_VP_KERNEL_ID_BASE = 0x02003000, 808 MT_VP_KERNEL_CSC, 809 MT_VP_KERNEL_RULE, 810 MT_VP_KERNEL_LIST_ADD, 811 MT_VP_KERNEL_Init, 812 MT_MEDIA_COPY_ID_BASE = 0x02004000, 813 MT_VE_DECOMP_COPY, 814 MT_MEDIA_COPY, 815 MT_MEDIA_COPY_BLT, 816 MT_MEDIA_COPY_RENDER, 817 MT_MEDIA_COPY_VE, 818 MT_LOG_ID_DEC_BASE = 0x03000000, 819 MT_DEC_HEVC, 820 MT_LOG_ID_ENC_BASE = 0x04000000, 821 } MT_LOG_ID; 822 823 //! 824 //! \def media trace parameter id 825 //! 826 typedef enum _MT_PARAM_ID 827 { 828 MT_PARAM_ID_BASE = 0, 829 MT_ERROR_CODE, 830 MT_COMPONENT, 831 MT_SUB_COMPONENT, 832 MT_CODE_LINE, 833 MT_GENERIC_VALUE, 834 MT_PRODUCT_FAMILY, 835 MT_SURF_PTR, 836 MT_SURF_ALLOC_HANDLE, 837 MT_SURF_WIDTH, 838 MT_SURF_HEIGHT, 839 MT_SURF_PITCH, 840 MT_SURF_MOS_FORMAT, 841 MT_SURF_TILE_TYPE, 842 MT_SURF_TILE_MODE, 843 MT_SURF_COMP_ABLE, 844 MT_SURF_COMP_MODE, 845 MT_SURF_GMM_FLAG_GPU, 846 MT_SURF_GMM_FLAG_INF, 847 MT_SURF_GMM_FLAG_WA, 848 MT_SURF_RES_ARRAYSIZE, 849 MT_SURF_RES_INDEX, 850 MT_SURF_CP_TAG, 851 MT_SURF_IS_INPUT, 852 MT_SURF_IS_OUTPUT, 853 MT_RECT_LEFT, 854 MT_RECT_TOP, 855 MT_RECT_RIGHT, 856 MT_RECT_BOTTOM, 857 MT_SYSMEM_PTR, 858 MT_SYSMEM_WIDTH, 859 MT_SYSMEM_HSTRIDE, 860 MT_SYSMEM_VSTRIDE, 861 MT_FUNC_START, 862 MT_FUNC_END, 863 MT_FUNC_RET, 864 MT_VIEW_TYPE, 865 MT_SURF_GMM_PATIDX, 866 MT_SURF_GMM_RESUSAGE, 867 MT_SURF_GMM_GPUVA, 868 MT_SURF_GMM_PAGINGFENCE, 869 MT_SURF_MOS_RESOURCE_USAGE, 870 MT_SURF_ALLOCINFO_PTR, 871 MT_SURF_ALLOCINFO_ISMEDIAINTERNAL, 872 MT_SURF_ALLOCINFO_ISPERSISTENT, 873 MT_SURF_ALLOCINFO_3DRESOURCE_PTR, 874 MT_SURF_ALLOCINFO_ISNEW, 875 MT_SURF_MEDIARESINFO_PTR, 876 MT_SURF_BE_INTERNAL_RESIDENT_MAP, 877 MT_SURF_MAPPED_ALLOCINFO, 878 MT_DEVICE_HANDLE, 879 MT_COMMAND_GPUVA, 880 MT_FUNC_NAME, 881 MT_FUNC_LINE, 882 MT_MEMORY_PTR, 883 MT_MEMORY_SIZE, 884 MT_MEMORY_INDEX, 885 MT_MEMORY_NINJA_START_COUNTER, 886 MT_MEMORY_NINJA_END_COUNTER, 887 MT_MEMORY_NINJA_IS_START, 888 MT_PARAM_ID_MOS_BASE = 0x00001000, 889 MT_MOS_STATUS, 890 MT_MOS_GPU_NODE, 891 MT_MOS_GPUCXT_MGR_PTR, 892 MT_MOS_GPUCXT_PTR, 893 MT_MOS_GPUCXT_HANDLE, 894 MT_MOS_GPUCXT_COUNT, 895 MT_MOS_GPUCXT_NUMPRIMARIES, 896 MT_MOS_GPUCXT, 897 MT_MOS_SYNC_HAZARDTYPE, 898 MT_MOS_SYNC_BUSYCTX, 899 MT_MOS_SYNC_REQCTX, 900 MT_MOS_MM_EXT_RESOURCE_NEED_MAKE_RESIDENT, 901 MT_SYNC_WAIT_LOOPCOUNTER, 902 MT_SYNC_CUR_FENCE_TAG, 903 MT_SYNC_LAST_FENCE_TAG, 904 MT_SYNC_WAIT_BEFORE_SYNC, 905 MT_SYNC_WAIT_MICROSECOND, 906 MT_PARAM_ID_CP_BASE = 0x01000000, 907 MT_CP_SESSION_TYPE, 908 MT_CP_SESSION_MODE, 909 MT_CP_STREAM_ID, 910 MT_CP_FW_CAPABILITY, 911 MT_CP_KEY_LENGTH, 912 MT_CP_COMMAND_ID, 913 MT_CP_COMMAND, 914 MT_CP_GROUP_ID, 915 MT_CP_METADATA_INFO_VERSION, 916 MT_CP_FW_API_VERSION, 917 MT_CP_BUFFER_NAME, 918 MT_CP_CMD_BUFFER_REMAIN, 919 MT_CP_PRODUCT_FAMILY_ID, 920 MT_CP_KEY_EXCHANGE_TYPE, 921 MT_CP_QUERY_OPERATION, 922 MT_CP_CRYPT_COPY_ADDR_CMD, 923 MT_CP_CRYPT_COPY_CMD, 924 MT_CP_IV_SIZE, 925 MT_CP_MHW_GPR0, 926 MT_CP_MHW_SCRATCH_BUFFER, 927 MT_CP_ENCRYPT_TYPE, 928 MT_CP_COMMAND_TYPE, 929 MT_CP_CPTO_TYPE, 930 MT_CP_CAPS, 931 MT_CP_SESSION_UPDATE_TYPE, 932 MT_CP_INPUTSIZE, 933 MT_CP_OUTPUTSIZE, 934 MT_CP_CHANNEL_TYPE, 935 MT_CP_SESSION_ID, 936 MT_CP_FUNC_ID, 937 MT_CP_DRM_TYPE, 938 MT_CP_CTX_TYPE, 939 MT_CP_CTX_PTR, 940 MT_PARAM_ID_VP_BASE = 0x02000000, 941 MT_VP_SCALINGMODE_SR, 942 MT_PARAM_ID_VP_FTR_BASE = 0x02000200, 943 MT_VP_SKU_FTR_VERING, 944 MT_VP_SKU_FTR_MCPY, 945 MT_VP_UF_CTRL_DISABLE_VEOUT, 946 MT_VP_UF_CTRL_DISABLE_SFC, 947 MT_VP_UF_CTRL_CCS, 948 MT_PARAM_ID_VP_BLT_BASE = 0x02000300, 949 MT_VP_BLT_PARAM_DATA, 950 MT_VP_BLT_PARAM_FLAG, 951 MT_VP_BLT_SRC_COUNT, 952 MT_VP_BLT_AUTO_PROCESSING_MODE, 953 MT_VP_BLT_OUTPUT_FRAME, 954 MT_VP_BLT_STREAM_COUNT, 955 MT_VP_BLT_SAMPLE_TYPE, 956 MT_VP_BLT_CSPACE, 957 MT_VP_BLT_ROTATION, 958 MT_VP_BLT_SURF_TYPE, 959 MT_VP_BLT_CHROMASITING, 960 MT_VP_BLT_HDRPARAM_EOTF, 961 MT_VP_BLT_HDRPARAM_MAX_DISPLUMA, 962 MT_VP_BLT_HDRPARAM_MIN_DISPLUMA, 963 MT_VP_BLT_HDRPARAM_MAXCLL, 964 MT_VP_BLT_HDRPARAM_MAXFALL, 965 MT_VP_BLT_FDFBPARAM_MODE, 966 MT_VP_BLT_FDFBPARAM_FACECOUNT, 967 MT_VP_BLT_FDFBPARAM_FBMAXFACECOUNT, 968 MT_VP_BLT_SR_MODE, 969 MT_VP_BLT_SR_EU, 970 MT_VP_BLT_SR_GEN, 971 MT_PARAM_ID_VP_HAL_BASE = 0x02000400, 972 MT_VP_HAL_APO, 973 MT_VP_HAL_PTR, 974 MT_VP_HAL_PIPE_CNT, 975 MT_VP_HAL_INTER_SURF_TYPE, 976 MT_VP_RENDERPASS_FLAG_COMP_NEEDED, 977 MT_VP_RENDERPASS_FLAG_HDR_NEEDED, 978 MT_VP_RENDERPASS_FLAG_FASTCOLORFILL, 979 MT_VP_RENDERPASS_FLAG_BYPASS_HDRKERNEL, 980 MT_VP_RENDERPASS_FLAG_USEVEHDRSFC, 981 MT_VP_RENDERDATA_OUTPUT_PIPE, 982 MT_VP_RENDERDATA_2PASS_CSC, 983 MT_VP_RENDERDATA_HDRCSCCUSDS, 984 MT_VP_RENDERDATA_HDRSFC, 985 MT_VP_RENDERDATA_HDR3DLUT, 986 MT_VP_RENDERDATA_HDR1DLUT, 987 MT_VP_RENDERDATA_BPROCAMP, 988 MT_VP_RENDERDATA_BIECP, 989 MT_VP_RENDERDATA_DV_TONAMAPPING, 990 MT_VP_RENDER_VE_2PASS_SFC, 991 MT_VP_RENDER_VE_USE_HDRTEMPSURF, 992 MT_VP_RENDER_VE_HDRMODE, 993 MT_VP_RENDER_VE_NEEDED, 994 MT_VP_RENDER_VE_HITLIMITATION, 995 MT_VP_RENDER_VE_8KFORCERENDER, 996 MT_VP_RENDER_VE_CROPPING, 997 MT_VP_RENDER_VE_SFCONLYFORVE, 998 MT_VP_RENDER_VE_COMPBYPASSFEASIBLE, 999 MT_VP_HAL_PIPE_INDEX, 1000 MT_VP_HAL_PIPE_ISINPUT, 1001 MT_VP_HAL_FEATUERTYPE, 1002 MT_VP_HAL_ENGINECAPS, 1003 MT_VP_HAL_ENGINECAPS_EN, 1004 MT_VP_HAL_ENGINECAPS_VE_NEEDED, 1005 MT_VP_HAL_ENGINECAPS_SFC_NEEDED, 1006 MT_VP_HAL_ENGINECAPS_RENDER_NEEDED, 1007 MT_VP_HAL_ENGINECAPS_FC_SUPPORT, 1008 MT_VP_HAL_ENGINECAPS_ISOLATED, 1009 MT_VP_HAL_EXECCAPS, 1010 MT_VP_HAL_EXECCAPS_VE, 1011 MT_VP_HAL_EXECCAPS_SFC, 1012 MT_VP_HAL_EXECCAPS_RENDER, 1013 MT_VP_HAL_EXECCAPS_COMP, 1014 MT_VP_HAL_EXECCAPS_OUTPIPE_FTRINUSE, 1015 MT_VP_HAL_EXECCAPS_IECP, 1016 MT_VP_HAL_EXECCAPS_FORCE_CSC2RENDER, 1017 MT_VP_HAL_EXECCAPS_DI_2NDFIELD, 1018 MT_VP_HAL_ONNEWFRAME_COUNTER, 1019 MT_VP_HAL_SCALING_MODE, 1020 MT_VP_HAL_SCALING_MODE_FORCE, 1021 MT_VP_HAL_SAMPLER_TYPE, 1022 MT_VP_HAL_SAMPLER_FILTERMODE, 1023 MT_VP_HAL_SAMPLER_INDEX, 1024 MT_VP_HAL_FC_LAYER, 1025 MT_VP_HAL_FC_LAYER_SURFENTRY, 1026 MT_VP_RENDER_VE_FTRINUSE, 1027 MT_VP_RENDER_VE_PREPROC_TCC, 1028 MT_VP_RENDER_VE_PREPROC_IEF, 1029 MT_VP_HAL_EXECCAPS_FORCE_DI2RENDER, 1030 MT_VP_HAL_EUFUSION_BYPASS, 1031 MT_VP_HAL_MMCINUSE, 1032 MT_VP_HAL_FRC_MODE, 1033 MT_VP_HAL_CAPTURE_PIPE, 1034 MT_VP_HAL_SURF_ALLOC_PARAM_PTR, 1035 MT_VP_HAL_SURF_ALLOC_PARAM_MOS_SURF_PTR, 1036 MT_VP_HAL_SURF_ALLOC_PARAM_IS_RES_OWNER, 1037 MT_VP_HAL_SURF_ALLOC_PARAM_HANDLE, 1038 MT_VP_HAL_SURF_ALLOC_PARAM_SIZE, 1039 MT_VP_HAL_SURF_ALLOC_PARAM_NAME, 1040 MT_VP_HAL_SURF_ALLOC_PARAM_PEAK_SIZE, 1041 MT_VP_HAL_SURF_ALLOC_PARAM_TOTAL_SIZE, 1042 MT_VP_HAL_VEBOX_NUMBER, 1043 MT_PARAM_ID_VP_FEATURE_GRAPH_BASE = 0x02001400, 1044 MT_VP_FEATURE_GRAPH_FILTER_SWFILTERPIPE_COUNT, 1045 MT_VP_FEATURE_GRAPH_FILTER_LAYERINDEXES_COUNT, 1046 MT_VP_FEATURE_GRAPH_FILTER_INPUTCOLORSPACE, 1047 MT_VP_FEATURE_GRAPH_FILTER_OUTPUTCOLORSPACE, 1048 MT_VP_FEATURE_GRAPH_FILTER_INPUTFORMAT, 1049 MT_VP_FEATURE_GRAPH_FILTER_OUTPUTFORMAT, 1050 MT_VP_FEATURE_GRAPH_FILTER_FEATURETYPE, 1051 MT_VP_FEATURE_GRAPH_FILTER_CALCULATINGALPHA, 1052 MT_VP_FEATURE_GRAPH_FILTER_ALPHAMODE, 1053 MT_VP_FEATURE_GRAPH_FILTER_FALPHA, 1054 MT_VP_FEATURE_GRAPH_FILTER_BLENDTYPE, 1055 MT_VP_FEATURE_GRAPH_FILTER_LUMAHIGH, 1056 MT_VP_FEATURE_GRAPH_FILTER_LUMALOW, 1057 MT_VP_FEATURE_GRAPH_FILTER_HDRMODE, 1058 MT_VP_FEATURE_GRAPH_FILTER_LUTMODE, 1059 MT_VP_FEATURE_GRAPH_FILTER_GPUGENERATE3DLUT, 1060 MT_VP_FEATURE_GRAPH_FILTER_BRIGHTNESS, 1061 MT_VP_FEATURE_GRAPH_FILTER_CONTRAST, 1062 MT_VP_FEATURE_GRAPH_FILTER_HUE, 1063 MT_VP_FEATURE_GRAPH_FILTER_SATURATION, 1064 MT_VP_FEATURE_GRAPH_FILTER_DISABLECFINSFC, 1065 MT_VP_FEATURE_GRAPH_FILTER_TCCRED, 1066 MT_VP_FEATURE_GRAPH_FILTER_TCCGREEN, 1067 MT_VP_FEATURE_GRAPH_FILTER_TCCBLUE, 1068 MT_VP_FEATURE_GRAPH_FILTER_STEFACTOR, 1069 MT_VP_FEATURE_GRAPH_FILTER_ENABLESTD, 1070 MT_VP_FEATURE_GRAPH_FILTER_SAMPLETYPEINPUT, 1071 MT_VP_FEATURE_GRAPH_FILTER_FMDKERNELENABLE, 1072 MT_VP_FEATURE_GRAPH_FILTER_SINGLEFIELD, 1073 MT_VP_FEATURE_GRAPH_FILTER_DIMODE, 1074 MT_VP_FEATURE_GRAPH_FILTER_CHROMADN, 1075 MT_VP_FEATURE_GRAPH_FILTER_LUMADN, 1076 MT_VP_FEATURE_GRAPH_FILTER_AUTODETECT, 1077 MT_VP_FEATURE_GRAPH_FILTER_HVSDN, 1078 MT_VP_FEATURE_GRAPH_FILTER_DNFACTOR, 1079 MT_VP_FEATURE_GRAPH_FILTER_SECUREDNNEED, 1080 MT_VP_FEATURE_GRAPH_FILTER_ROTATION, 1081 MT_VP_FEATURE_GRAPH_FILTER_INPUTHEIGHT, 1082 MT_VP_FEATURE_GRAPH_FILTER_INPUTWIDTH, 1083 MT_VP_FEATURE_GRAPH_FILTER_INPUTTILEMODE, 1084 MT_VP_FEATURE_GRAPH_FILTER_OUTPUTHEIGHT, 1085 MT_VP_FEATURE_GRAPH_FILTER_OUTPUTWIDTH, 1086 MT_VP_FEATURE_GRAPH_FILTER_OUTPUTTILEMODE, 1087 MT_VP_FEATURE_GRAPH_FILTER_ISCALINGTYPE, 1088 MT_VP_FEATURE_GRAPH_FILTER_SCALINGMODE, 1089 MT_VP_FEATURE_GRAPH_FILTER_GCOMPMODE, 1090 MT_VP_FEATURE_GRAPH_FILTER_BT2020TORGB, 1091 MT_VP_FEATURE_GRAPH_FILTER_ENABLEACE, 1092 MT_VP_FEATURE_GRAPH_FILTER_ACELEVELCHANGED, 1093 MT_VP_FEATURE_GRAPH_FILTER_ACELEVEL, 1094 MT_VP_FEATURE_GRAPH_FILTER_ACESTRENGTH, 1095 MT_VP_FEATURE_GRAPH_FILTER_ENABLECAPPIPE, 1096 MT_VP_FEATURE_GRAPH_FILTER_LGCAKERNELENABLED, 1097 MT_VP_FEATURE_GRAPH_FILTER_LGCAPHASE, 1098 MT_VP_FEATURE_GRAPH_FILTER_1DLUTSIZE, 1099 MT_VP_FEATURE_GRAPH_FILTER_3DLUTSIZE, 1100 MT_VP_FEATURE_GRAPH_FILTER_ENABLEFB, 1101 MT_VP_FEATURE_GRAPH_FILTER_ENABLEFD, 1102 MT_VP_FEATURE_GRAPH_FILTER_ENABLEFLD, 1103 MT_VP_FEATURE_GRAPH_FILTER_FDFBSTAGE, 1104 MT_VP_FEATURE_GRAPH_FILTER_ENABLELACE, 1105 MT_VP_FEATURE_GRAPH_FILTER_INPUTSAMPLETYPE, 1106 MT_VP_FEATURE_GRAPH_FILTER_LACESTAGE, 1107 MT_VP_FEATURE_GRAPH_FILTER_ENABLES3D, 1108 MT_VP_FEATURE_GRAPH_FILTER_STEREOFORMAT, 1109 MT_VP_FEATURE_GRAPH_FILTER_VEBOXSTATECOPYNEEDED, 1110 MT_VP_FEATURE_GRAPH_FILTER_STD_OUTPUT_ENABLE, 1111 MT_VP_FEATURE_GRAPH_FILTER_STD_OUTPUT_TO_STDPARAM, 1112 MT_VP_FEATURE_GRAPH_FILTER_STD_OUTPUT_TO_OUTPUT_SURFACE, 1113 MT_VP_FEATURE_GRAPH_SURFACE_WIDTH, 1114 MT_VP_FEATURE_GRAPH_SURFACE_HEIGHT, 1115 MT_VP_FEATURE_GRAPH_SURFACE_PITCH, 1116 MT_VP_FEATURE_GRAPH_SURFACE_COLORSPACE, 1117 MT_VP_FEATURE_GRAPH_SURFACE_FORMAT, 1118 MT_VP_FEATURE_GRAPH_SURFACE_RCSRC_LEFT, 1119 MT_VP_FEATURE_GRAPH_SURFACE_RCSRC_TOP, 1120 MT_VP_FEATURE_GRAPH_SURFACE_RCSRC_RIGHT, 1121 MT_VP_FEATURE_GRAPH_SURFACE_RCSRC_BOTTOM, 1122 MT_VP_FEATURE_GRAPH_SURFACE_RCDST_LEFT, 1123 MT_VP_FEATURE_GRAPH_SURFACE_RCDST_TOP, 1124 MT_VP_FEATURE_GRAPH_SURFACE_RCDST_RIGHT, 1125 MT_VP_FEATURE_GRAPH_SURFACE_RCDST_BOTTOM, 1126 MT_VP_FEATURE_GRAPH_RENDERTARGETTYPE, 1127 MT_VP_FEATURE_GRAPH_FILTER_ESRMODE, 1128 MT_VP_FEATURE_GRAPH_FILTER_SRMODEL, 1129 MT_VP_FEATURE_GRAPH_FILTER_SRSTAGE, 1130 MT_VP_FEATURE_GRAPH_FILTER_FRAMENUMBER, 1131 MT_VP_FEATURE_GRAPH_FILTER_FIRSTFRAME, 1132 MT_VP_FEATURE_GRAPH_FILTER_ENABLESR, 1133 MT_VP_FEATURE_GRAPH_FILTER_FRAMEID, 1134 MT_VP_FEATURE_GRAPH_FILTER_PIPEID, 1135 MT_VP_FEATURE_GRAPH_FILTER_PIPELINEBYPASS, 1136 MT_PARAM_ID_VP_MHW_BASE = 0x02002000, 1137 MT_VP_MHW_VE_SCALABILITY_EN, 1138 MT_VP_MHW_VE_SCALABILITY_USE_SFC, 1139 MT_VP_MHW_VE_SCALABILITY_IDX, 1140 MT_VP_MHW_CACHE_MEMORY_OBJECT_CONTROL_STATE, 1141 MT_VP_MHW_CACHE_MEMORY_OBJECT_NAME, 1142 MT_VP_MHW_CACHE_MEMORY_OBJECT_SURFACE_TYPE, 1143 MT_VP_MHW_CACHE_MEMORY_OBJECT_SURFACE_WIDTH, 1144 MT_VP_MHW_CACHE_MEMORY_OBJECT_SURFACE_HEIGHT, 1145 MT_VP_MHW_CACHE_MEMORY_OBJECT_SURFACE_FORMAT, 1146 MT_PARAM_ID_VP_KERNEL_BASE = 0x02003000, 1147 MT_VP_KERNEL_CSPACE, 1148 MT_VP_KERNEL_RULE_ID, 1149 MT_VP_KERNEL_RULE_LAYERNUM, 1150 MT_VP_KERNEL_RULE_SEARCH_STATE, 1151 MT_VP_KERNEL_ID, 1152 MT_PARAM_ID_MEDIA_COPY_BASE = 0x02004000, 1153 MT_VE_DECOMP_COPY_SURF_LOCK_STATUS, 1154 MT_MEDIA_COPY_CAPS, 1155 MT_MEDIA_COPY_DIRECTION, 1156 MT_MEDIA_COPY_METHOD, 1157 MT_MEDIA_COPY_DEVICE_PTR, 1158 MT_MEDIA_COPY_DATASIZE, 1159 MT_MEDIA_COPY_PLANE_NUM, 1160 MT_MEDIA_COPY_PLANE_PITCH, 1161 MT_MEDIA_COPY_PLANE_OFFSET, 1162 MT_MEDIA_COPY_LIMITATION, 1163 MT_PARAM_ID_DEC_BASE = 0x03000000, 1164 MT_DEC_HUC_ERROR_STATUS2, 1165 MT_CODEC_HAL_MODE, 1166 MT_DEC_HUC_STATUS_CRITICAL_ERROR, 1167 MT_PARAM_ID_ENC_BASE = 0x04000000, 1168 } MT_PARAM_ID; 1169 1170 #endif 1171