1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /* Copyright (c) 2024 Hisilicon Limited. */
3
4 #ifndef __HBG_HW_H
5 #define __HBG_HW_H
6
7 #include <linux/bitfield.h>
8 #include <linux/io-64-nonatomic-lo-hi.h>
9
hbg_reg_read(struct hbg_priv * priv,u32 addr)10 static inline u32 hbg_reg_read(struct hbg_priv *priv, u32 addr)
11 {
12 return readl(priv->io_base + addr);
13 }
14
hbg_reg_write(struct hbg_priv * priv,u32 addr,u32 value)15 static inline void hbg_reg_write(struct hbg_priv *priv, u32 addr, u32 value)
16 {
17 writel(value, priv->io_base + addr);
18 }
19
hbg_reg_read64(struct hbg_priv * priv,u32 addr)20 static inline u64 hbg_reg_read64(struct hbg_priv *priv, u32 addr)
21 {
22 return lo_hi_readq(priv->io_base + addr);
23 }
24
hbg_reg_write64(struct hbg_priv * priv,u32 addr,u64 value)25 static inline void hbg_reg_write64(struct hbg_priv *priv, u32 addr, u64 value)
26 {
27 lo_hi_writeq(value, priv->io_base + addr);
28 }
29
30 #define hbg_reg_read_field(priv, addr, mask) \
31 FIELD_GET(mask, hbg_reg_read(priv, addr))
32
33 #define hbg_field_modify(reg_value, mask, value) ({ \
34 (reg_value) &= ~(mask); \
35 (reg_value) |= FIELD_PREP(mask, value); })
36
37 #define hbg_reg_write_field(priv, addr, mask, val) ({ \
38 typeof(priv) _priv = (priv); \
39 typeof(addr) _addr = (addr); \
40 u32 _value = hbg_reg_read(_priv, _addr); \
41 hbg_field_modify(_value, mask, val); \
42 hbg_reg_write(_priv, _addr, _value); })
43
44 int hbg_hw_event_notify(struct hbg_priv *priv,
45 enum hbg_hw_event_type event_type);
46 int hbg_hw_init(struct hbg_priv *priv);
47 void hbg_hw_adjust_link(struct hbg_priv *priv, u32 speed, u32 duplex);
48 u32 hbg_hw_get_irq_status(struct hbg_priv *priv);
49 void hbg_hw_irq_clear(struct hbg_priv *priv, u32 mask);
50 bool hbg_hw_irq_is_enabled(struct hbg_priv *priv, u32 mask);
51 void hbg_hw_irq_enable(struct hbg_priv *priv, u32 mask, bool enable);
52 void hbg_hw_set_mtu(struct hbg_priv *priv, u16 mtu);
53 void hbg_hw_mac_enable(struct hbg_priv *priv, u32 enable);
54 void hbg_hw_set_uc_addr(struct hbg_priv *priv, u64 mac_addr, u32 index);
55 u32 hbg_hw_get_fifo_used_num(struct hbg_priv *priv, enum hbg_dir dir);
56 void hbg_hw_set_tx_desc(struct hbg_priv *priv, struct hbg_tx_desc *tx_desc);
57 void hbg_hw_fill_buffer(struct hbg_priv *priv, u32 buffer_dma_addr);
58 void hbg_hw_set_mac_filter_enable(struct hbg_priv *priv, u32 enable);
59 void hbg_hw_set_pause_enable(struct hbg_priv *priv, u32 tx_en, u32 rx_en);
60 void hbg_hw_get_pause_enable(struct hbg_priv *priv, u32 *tx_en, u32 *rx_en);
61 void hbg_hw_set_rx_pause_mac_addr(struct hbg_priv *priv, u64 mac_addr);
62
63 #endif
64