1 /* SPDX-License-Identifier: GPL-2.0-only */
2
3 #include <amdblocks/acpimmio.h>
4 #include <console/console.h>
5 #include <arch/io.h>
6 #include <device/mmio.h>
7 #include <acpi/acpi.h>
8 #include <device/device.h>
9 #include <device/pci.h>
10 #include <device/pci_ids.h>
11 #include <device/pci_ops.h>
12 #include <types.h>
13
14 #include "hudson.h"
15 #include "smbus.h"
16 #include "smi.h"
17 #include "fchec.h"
18
acpi_get_sleep_type(void)19 int acpi_get_sleep_type(void)
20 {
21 u16 tmp = inw(ACPI_PM1_CNT_BLK);
22 tmp = ((tmp & (7 << 10)) >> 10);
23 return (int)tmp;
24 }
25
hudson_enable(struct device * dev)26 void hudson_enable(struct device *dev)
27 {
28 printk(BIOS_DEBUG, "%s()\n", __func__);
29 switch (dev->path.pci.devfn) {
30 case PCI_DEVFN(0x14, 7): /* SD */
31 if (dev->enabled == 0) {
32 u32 sd_device_id = pci_read_config16(dev, PCI_DEVICE_ID);
33 /* turn off the SDHC controller in the PM reg */
34 u8 reg8;
35 if (sd_device_id == PCI_DID_AMD_HUDSON_SD) {
36 reg8 = pm_read8(PM_HUD_SD_FLASH_CTRL);
37 reg8 &= ~BIT(0);
38 pm_write8(PM_HUD_SD_FLASH_CTRL, reg8);
39 } else if (sd_device_id == PCI_DID_AMD_YANGTZE_SD) {
40 reg8 = pm_read8(PM_YANG_SD_FLASH_CTRL);
41 reg8 &= ~BIT(0);
42 pm_write8(PM_YANG_SD_FLASH_CTRL, reg8);
43 }
44 /* remove device 0:14.7 from PCI space */
45 reg8 = pm_read8(PM_MANUAL_RESET);
46 reg8 &= ~BIT(6);
47 pm_write8(PM_MANUAL_RESET, reg8);
48 }
49 break;
50 default:
51 break;
52 }
53 }
54
hudson_init_acpi_ports(void)55 static void hudson_init_acpi_ports(void)
56 {
57 /* We use some of these ports in SMM regardless of whether or not
58 * ACPI tables are generated. Enable these ports indiscriminately.
59 */
60
61 pm_write16(PM_EVT_BLK, ACPI_PM_EVT_BLK);
62 pm_write16(PM1_CNT_BLK, ACPI_PM1_CNT_BLK);
63 pm_write16(PM_TMR_BLK, ACPI_PM_TMR_BLK);
64 pm_write16(PM_GPE0_BLK, ACPI_GPE0_BLK);
65 /* CpuControl is in \_PR.CP00, 6 bytes */
66 pm_write16(PM_CPU_CTRL, ACPI_CPU_CONTROL);
67
68 if (CONFIG(HAVE_SMI_HANDLER)) {
69 pm_write16(PM_ACPI_SMI_CMD, ACPI_SMI_CTL_PORT);
70 hudson_enable_acpi_cmd_smi();
71 } else {
72 pm_write16(PM_ACPI_SMI_CMD, 0);
73 }
74
75 /* AcpiDecodeEnable, When set, SB uses the contents of the PM registers
76 * at index 60-6B to decode ACPI I/O address. AcpiSmiEn & SmiCmdEn
77 */
78 pm_write8(PM_ACPI_CONF, BIT(0) | BIT(1) | BIT(4) | BIT(2));
79 }
80
hudson_init(void * chip_info)81 static void hudson_init(void *chip_info)
82 {
83 hudson_init_acpi_ports();
84 }
85
hudson_final(void * chip_info)86 static void hudson_final(void *chip_info)
87 {
88 if (CONFIG(HUDSON_IMC_FWM)) {
89 agesawrapper_fchecfancontrolservice();
90 enable_imc_thermal_zone();
91 }
92 }
93
94 struct chip_operations southbridge_amd_pi_hudson_ops = {
95 .name = "ATI HUDSON",
96 .enable_dev = hudson_enable,
97 .init = hudson_init,
98 .final = hudson_final
99 };
100