1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Support for Intel Camera Imaging ISP subsystem.
4  * Copyright (c) 2015, Intel Corporation.
5  */
6 
7 #ifndef IA_CSS_NO_DEBUG
8 #include "ia_css_debug.h"
9 #endif
10 
11 #include "type_support.h"
12 #include "assert_support.h"
13 #include "math_support.h" /* for min and max */
14 
15 #include "ia_css_eed1_8.host.h"
16 
17 /* WARNING1: Number of inv points should be less or equal to 16,
18  * due to implementation limitation. See kernel design document
19  * for more details.
20  * WARNING2: Do not modify the number of inv points without correcting
21  * the EED1_8 kernel implementation assumptions.
22  */
23 #define NUMBER_OF_CHGRINV_POINTS 15
24 #define NUMBER_OF_TCINV_POINTS 9
25 #define NUMBER_OF_FCINV_POINTS 9
26 
27 static const s16 chgrinv_x[NUMBER_OF_CHGRINV_POINTS] = {
28 	0, 16, 64, 144, 272, 448, 672, 976,
29 	1376, 1888, 2528, 3312, 4256, 5376, 6688
30 };
31 
32 static const s16 chgrinv_a[NUMBER_OF_CHGRINV_POINTS] = {
33 	-7171, -256, -29, -3456, -1071, -475, -189, -102,
34 	    -48, -38, -10, -9, -7, -6, 0
35     };
36 
37 static const s16 chgrinv_b[NUMBER_OF_CHGRINV_POINTS] = {
38 	8191, 1021, 256, 114, 60, 37, 24, 17,
39 	12, 9, 6, 5, 4, 3, 2
40 };
41 
42 static const s16 chgrinv_c[NUMBER_OF_CHGRINV_POINTS] = {
43 	1, 1, 1, 0, 0, 0, 0, 0,
44 	0, 0, 0, 0, 0, 0, 0
45 };
46 
47 static const s16 tcinv_x[NUMBER_OF_TCINV_POINTS] = {
48 	0, 4, 11, 23, 42, 68, 102, 148, 205
49 };
50 
51 static const s16 tcinv_a[NUMBER_OF_TCINV_POINTS] = {
52 	-6364, -631, -126, -34, -13, -6, -4452, -2156, 0
53     };
54 
55 static const s16 tcinv_b[NUMBER_OF_TCINV_POINTS] = {
56 	8191, 1828, 726, 352, 197, 121, 80, 55, 40
57 };
58 
59 static const s16 tcinv_c[NUMBER_OF_TCINV_POINTS] = {
60 	1, 1, 1, 1, 1, 1, 0, 0, 0
61 };
62 
63 static const s16 fcinv_x[NUMBER_OF_FCINV_POINTS] = {
64 	0, 80, 216, 456, 824, 1344, 2040, 2952, 4096
65 };
66 
67 static const s16 fcinv_a[NUMBER_OF_FCINV_POINTS] = {
68 	-5244, -486, -86, -2849, -961, -400, -180, -86, 0
69     };
70 
71 static const s16 fcinv_b[NUMBER_OF_FCINV_POINTS] = {
72 	8191, 1637, 607, 287, 159, 98, 64, 44, 32
73 };
74 
75 static const s16 fcinv_c[NUMBER_OF_FCINV_POINTS] = {
76 	1, 1, 1, 0, 0, 0, 0, 0, 0
77 };
78 
79 void
ia_css_eed1_8_vmem_encode(struct eed1_8_vmem_params * to,const struct ia_css_eed1_8_config * from,size_t size)80 ia_css_eed1_8_vmem_encode(
81     struct eed1_8_vmem_params *to,
82     const struct ia_css_eed1_8_config *from,
83     size_t size)
84 {
85 	unsigned int i, j, base;
86 	const unsigned int total_blocks = 4;
87 	const unsigned int shuffle_block = 16;
88 
89 	(void)size;
90 
91 	/* Init */
92 	for (i = 0; i < ISP_VEC_NELEMS; i++) {
93 		to->e_dew_enh_x[0][i] = 0;
94 		to->e_dew_enh_y[0][i] = 0;
95 		to->e_dew_enh_a[0][i] = 0;
96 		to->e_dew_enh_f[0][i] = 0;
97 		to->chgrinv_x[0][i] = 0;
98 		to->chgrinv_a[0][i] = 0;
99 		to->chgrinv_b[0][i] = 0;
100 		to->chgrinv_c[0][i] = 0;
101 		to->tcinv_x[0][i] = 0;
102 		to->tcinv_a[0][i] = 0;
103 		to->tcinv_b[0][i] = 0;
104 		to->tcinv_c[0][i] = 0;
105 		to->fcinv_x[0][i] = 0;
106 		to->fcinv_a[0][i] = 0;
107 		to->fcinv_b[0][i] = 0;
108 		to->fcinv_c[0][i] = 0;
109 	}
110 
111 	/* Constraints on dew_enhance_seg_x and dew_enhance_seg_y:
112 	 * - values should be greater or equal to 0.
113 	 * - values should be ascending.
114 	 * - value of index zero is equal to 0.
115 	 */
116 
117 	/* Checking constraints: */
118 	/* TODO: investigate if an assert is the right way to report that
119 	 * the constraints are violated.
120 	 */
121 	for (j = 0; j < IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS; j++) {
122 		assert(from->dew_enhance_seg_x[j] > -1);
123 		assert(from->dew_enhance_seg_y[j] > -1);
124 	}
125 
126 	for (j = 1; j < IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS; j++) {
127 		assert(from->dew_enhance_seg_x[j] > from->dew_enhance_seg_x[j - 1]);
128 		assert(from->dew_enhance_seg_y[j] > from->dew_enhance_seg_y[j - 1]);
129 	}
130 
131 	assert(from->dew_enhance_seg_x[0] == 0);
132 	assert(from->dew_enhance_seg_y[0] == 0);
133 
134 	/* Constraints on chgrinv_x, tcinv_x and fcinv_x:
135 	 * - values should be greater or equal to 0.
136 	 * - values should be ascending.
137 	 * - value of index zero is equal to 0.
138 	 */
139 	assert(chgrinv_x[0] == 0);
140 	assert(tcinv_x[0] == 0);
141 	assert(fcinv_x[0] == 0);
142 
143 	for (j = 1; j < NUMBER_OF_CHGRINV_POINTS; j++) {
144 		assert(chgrinv_x[j] > chgrinv_x[j - 1]);
145 	}
146 
147 	for (j = 1; j < NUMBER_OF_TCINV_POINTS; j++) {
148 		assert(tcinv_x[j] > tcinv_x[j - 1]);
149 	}
150 
151 	for (j = 1; j < NUMBER_OF_FCINV_POINTS; j++) {
152 		assert(fcinv_x[j] > fcinv_x[j - 1]);
153 	}
154 
155 	/* The implementation of the calculating 1/x is based on the availability
156 	 * of the OP_vec_shuffle16 operation.
157 	 * A 64 element vector is split up in 4 blocks of 16 element. Each array is copied to
158 	 * a vector 4 times, (starting at 0, 16, 32 and 48). All array elements are copied or
159 	 * initialised as described in the KFS. The remaining elements of a vector are set to 0.
160 	 */
161 	/* TODO: guard this code with above assumptions */
162 	for (i = 0; i < total_blocks; i++) {
163 		base = shuffle_block * i;
164 
165 		for (j = 0; j < IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS; j++) {
166 			to->e_dew_enh_x[0][base + j] = clamp(from->dew_enhance_seg_x[j],
167 							     0, 8191);
168 			to->e_dew_enh_y[0][base + j] = clamp(from->dew_enhance_seg_y[j],
169 							     -8192, 8191);
170 		}
171 
172 		for (j = 0; j < (IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - 1); j++) {
173 			to->e_dew_enh_a[0][base + j] = clamp(from->dew_enhance_seg_slope[j],
174 							     -8192, 8191);
175 			/* Convert dew_enhance_seg_exp to flag:
176 			 * 0 -> 0
177 			 * 1...13 -> 1
178 			 */
179 			to->e_dew_enh_f[0][base + j] = clamp(from->dew_enhance_seg_exp[j],
180 							     0, 13) > 0;
181 		}
182 
183 		/* Hard-coded to 0, in order to be able to handle out of
184 		 * range input in the same way as the other segments.
185 		 * See KFS for more details.
186 		 */
187 		to->e_dew_enh_a[0][base + (IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - 1)] = 0;
188 		to->e_dew_enh_f[0][base + (IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - 1)] = 0;
189 
190 		for (j = 0; j < NUMBER_OF_CHGRINV_POINTS; j++) {
191 			to->chgrinv_x[0][base + j] = chgrinv_x[j];
192 			to->chgrinv_a[0][base + j] = chgrinv_a[j];
193 			to->chgrinv_b[0][base + j] = chgrinv_b[j];
194 			to->chgrinv_c[0][base + j] = chgrinv_c[j];
195 		}
196 
197 		for (j = 0; j < NUMBER_OF_TCINV_POINTS; j++) {
198 			to->tcinv_x[0][base + j] = tcinv_x[j];
199 			to->tcinv_a[0][base + j] = tcinv_a[j];
200 			to->tcinv_b[0][base + j] = tcinv_b[j];
201 			to->tcinv_c[0][base + j] = tcinv_c[j];
202 		}
203 
204 		for (j = 0; j < NUMBER_OF_FCINV_POINTS; j++) {
205 			to->fcinv_x[0][base + j] = fcinv_x[j];
206 			to->fcinv_a[0][base + j] = fcinv_a[j];
207 			to->fcinv_b[0][base + j] = fcinv_b[j];
208 			to->fcinv_c[0][base + j] = fcinv_c[j];
209 		}
210 	}
211 }
212 
213 void
ia_css_eed1_8_encode(struct eed1_8_dmem_params * to,const struct ia_css_eed1_8_config * from,size_t size)214 ia_css_eed1_8_encode(
215     struct eed1_8_dmem_params *to,
216     const struct ia_css_eed1_8_config *from,
217     size_t size)
218 {
219 	int i;
220 	int min_exp = 0;
221 
222 	(void)size;
223 
224 	to->rbzp_strength = from->rbzp_strength;
225 
226 	to->fcstrength = from->fcstrength;
227 	to->fcthres_0 = from->fcthres_0;
228 	to->fc_sat_coef = from->fc_sat_coef;
229 	to->fc_coring_prm = from->fc_coring_prm;
230 	to->fc_slope = from->fcthres_1 - from->fcthres_0;
231 
232 	to->aerel_thres0 = from->aerel_thres0;
233 	to->aerel_gain0 = from->aerel_gain0;
234 	to->aerel_thres_diff = from->aerel_thres1 - from->aerel_thres0;
235 	to->aerel_gain_diff = from->aerel_gain1 - from->aerel_gain0;
236 
237 	to->derel_thres0 = from->derel_thres0;
238 	to->derel_gain0 = from->derel_gain0;
239 	to->derel_thres_diff = (from->derel_thres1 - from->derel_thres0);
240 	to->derel_gain_diff = (from->derel_gain1 - from->derel_gain0);
241 
242 	to->coring_pos0 = from->coring_pos0;
243 	to->coring_pos_diff = (from->coring_pos1 - from->coring_pos0);
244 	to->coring_neg0 = from->coring_neg0;
245 	to->coring_neg_diff = (from->coring_neg1 - from->coring_neg0);
246 
247 	/* Note: (ISP_VEC_ELEMBITS -1)
248 	 * TODO: currently the testbench does not support to use
249 	 * ISP_VEC_ELEMBITS. Investigate how to fix this
250 	 */
251 	to->gain_exp = (13 - from->gain_exp);
252 	to->gain_pos0 = from->gain_pos0;
253 	to->gain_pos_diff = (from->gain_pos1 - from->gain_pos0);
254 	to->gain_neg0 = from->gain_neg0;
255 	to->gain_neg_diff = (from->gain_neg1 - from->gain_neg0);
256 
257 	to->margin_pos0 = from->pos_margin0;
258 	to->margin_pos_diff = (from->pos_margin1 - from->pos_margin0);
259 	to->margin_neg0 = from->neg_margin0;
260 	to->margin_neg_diff = (from->neg_margin1 - from->neg_margin0);
261 
262 	/* Encode DEWEnhance exp (e_dew_enh_asr) */
263 	for (i = 0; i < (IA_CSS_NUMBER_OF_DEW_ENHANCE_SEGMENTS - 1); i++) {
264 		min_exp = max(min_exp, from->dew_enhance_seg_exp[i]);
265 	}
266 	to->e_dew_enh_asr = 13 - clamp(min_exp, 0, 13);
267 
268 	to->dedgew_max = from->dedgew_max;
269 }
270 
271 void
ia_css_init_eed1_8_state(void * state,size_t size)272 ia_css_init_eed1_8_state(
273     void *state,
274     size_t size)
275 {
276 	memset(state, 0, size);
277 }
278 
279 #ifndef IA_CSS_NO_DEBUG
280 void
ia_css_eed1_8_debug_dtrace(const struct ia_css_eed1_8_config * eed,unsigned int level)281 ia_css_eed1_8_debug_dtrace(
282     const struct ia_css_eed1_8_config *eed,
283     unsigned int level)
284 {
285 	if (!eed)
286 		return;
287 
288 	ia_css_debug_dtrace(level, "Edge Enhancing Demosaic 1.8:\n");
289 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "rbzp_strength",
290 			    eed->rbzp_strength);
291 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "fcstrength", eed->fcstrength);
292 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "fcthres_0", eed->fcthres_0);
293 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "fcthres_1", eed->fcthres_1);
294 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "fc_sat_coef", eed->fc_sat_coef);
295 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "fc_coring_prm",
296 			    eed->fc_coring_prm);
297 
298 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "aerel_thres0", eed->aerel_thres0);
299 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "aerel_gain0", eed->aerel_gain0);
300 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "aerel_thres1", eed->aerel_thres1);
301 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "aerel_gain1", eed->aerel_gain1);
302 
303 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "derel_thres0", eed->derel_thres0);
304 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "derel_gain0", eed->derel_gain0);
305 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "derel_thres1", eed->derel_thres1);
306 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "derel_gain1", eed->derel_gain1);
307 
308 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "coring_pos0", eed->coring_pos0);
309 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "coring_pos1", eed->coring_pos1);
310 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "coring_neg0", eed->coring_neg0);
311 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "coring_neg1", eed->coring_neg1);
312 
313 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "gain_exp", eed->gain_exp);
314 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "gain_pos0", eed->gain_pos0);
315 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "gain_pos1", eed->gain_pos1);
316 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "gain_neg0", eed->gain_neg0);
317 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "gain_neg1", eed->gain_neg1);
318 
319 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "pos_margin0", eed->pos_margin0);
320 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "pos_margin1", eed->pos_margin1);
321 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "neg_margin0", eed->neg_margin0);
322 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "neg_margin1", eed->neg_margin1);
323 
324 	ia_css_debug_dtrace(level, "\t%-32s = %d\n", "dedgew_max", eed->dedgew_max);
325 }
326 #endif
327