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Searched defs:imm5 (Results 1 – 10 of 10) sorted by relevance

/aosp_15_r20/external/vixl/src/aarch64/
H A Dassembler-sve-aarch64.cc2228 void Assembler::index(const ZRegister& zd, const Register& rn, int imm5) { in index()
2240 void Assembler::index(const ZRegister& zd, int imm5, const Register& rm) { in index()
2815 int imm5) { in cmpeq()
2830 int imm5) { in cmpge()
2845 int imm5) { in cmpgt()
2860 int imm5) { in cmple()
2875 int imm5) { in cmplt()
2890 int imm5) { in cmpne()
4271 int imm5) { in ldff1b()
4304 int imm5) { in ldff1d()
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H A Dmacro-assembler-aarch64.h3751 int imm5; in Cmpeq() local
3772 int imm5; in Cmpge() local
3793 int imm5; in Cmpgt() local
3853 int imm5; in Cmple() local
3912 int imm5; in Cmplt() local
3933 int imm5; in Cmpne() local
5067 int imm5) { in Ldff1b()
5083 int imm5) { in Ldff1d()
5099 int imm5) { in Ldff1h()
5115 int imm5) { in Ldff1sb()
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H A Dassembler-aarch64.h7242 static Instr ImmPrefetchOperation(int imm5) { in ImmPrefetchOperation()
7559 int imm5 = (index << (s + 1)) | (1 << s); in ImmNEON5() local
H A Dsimulator-aarch64.cc7910 int imm5 = instr->GetImmNEON5(); in VisitNEONCopy() local
8971 int imm5 = instr->GetImmNEON5(); in VisitNEONScalarCopy() local
H A Ddisasm-aarch64.cc6566 unsigned imm5 = instr->GetImmNEON5(); in SubstituteImmediateField() local
/aosp_15_r20/art/compiler/utils/riscv64/
H A Dassembler_riscv64.cc3853 void Riscv64Assembler::VAdd_vi(VRegister vd, VRegister vs2, int32_t imm5, VM vm) { in VAdd_vi()
3881 void Riscv64Assembler::VRsub_vi(VRegister vd, VRegister vs2, int32_t imm5, VM vm) { in VRsub_vi()
3960 void Riscv64Assembler::VAnd_vi(VRegister vd, VRegister vs2, int32_t imm5, VM vm) { in VAnd_vi()
3980 void Riscv64Assembler::VOr_vi(VRegister vd, VRegister vs2, int32_t imm5, VM vm) { in VOr_vi()
4001 void Riscv64Assembler::VXor_vi(VRegister vd, VRegister vs2, int32_t imm5, VM vm) { in VXor_vi()
4089 void Riscv64Assembler::VAdc_vim(VRegister vd, VRegister vs2, int32_t imm5) { in VAdc_vim()
4108 void Riscv64Assembler::VMadc_vim(VRegister vd, VRegister vs2, int32_t imm5) { in VMadc_vim()
4126 void Riscv64Assembler::VMadc_vi(VRegister vd, VRegister vs2, int32_t imm5) { in VMadc_vi()
4184 void Riscv64Assembler::VMerge_vim(VRegister vd, VRegister vs2, int32_t imm5) { in VMerge_vim()
4203 void Riscv64Assembler::VMv_vi(VRegister vd, int32_t imm5) { in VMv_vi()
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H A Dassembler_riscv64.h2586 void EmitCM(uint32_t funct3, uint32_t imm5, XRegister rs1_s, Reg rd_rs2_s, uint32_t opcode) { in EmitCM()
/aosp_15_r20/external/XNNPACK/src/jit/
H A Daarch64-assembler.cc389 const uint8_t imm5 = 0b1000 | (vn.lane & 1) << 4; in dup() local
/aosp_15_r20/art/disassembler/
H A Ddisassembler_riscv64.cc1436 const uint32_t imm5 = GetRs1(insn32); in Print32RVVOp() local
/aosp_15_r20/external/swiftshader/third_party/subzero/src/
H A DIceAssemblerARM32.cpp335 IOffsetT imm5) { in encodeShiftRotateImm5()