1 /*
2 * Copyright (c) 2021-2023 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file mhw_vdbox_mfx_cmdpar.h
24 //! \brief MHW command parameters
25 //! \details
26 //!
27
28 #ifndef __MHW_VDBOX_MFX_CMDPAR_H__
29 #define __MHW_VDBOX_MFX_CMDPAR_H__
30
31 #include "mhw_vdbox_cmdpar.h"
32 #include "codec_def_common_jpeg.h"
33 #include "codec_def_common_mpeg2.h"
34
35 #ifdef IGFX_MFX_INTERFACE_EXT_SUPPORT
36 #include "mhw_vdbox_mfx_cmdpar_ext.h"
37 #define __MHW_VDBOX_MFX_WRAPPER_EXT(STUFF) STUFF
38 #else
39 #define __MHW_VDBOX_MFX_WRAPPER_EXT(STUFF)
40 #endif
41
42 namespace mhw
43 {
44 namespace vdbox
45 {
46 namespace mfx
47 {
48
49 enum SURFACE_FORMAT
50 {
51 SURFACE_FORMAT_YCRCBNORMAL = 0, //!< No additional details
52 SURFACE_FORMAT_YCRCBSWAPUVY = 1, //!< No additional details
53 SURFACE_FORMAT_YCRCBSWAPUV = 2, //!< No additional details
54 SURFACE_FORMAT_YCRCBSWAPY = 3, //!< No additional details
55 SURFACE_FORMAT_PLANAR4208 = 4, //!< (NV12, IMC1,2,3,4, YV12)
56 SURFACE_FORMAT_PLANAR4118 = 5, //!< Deinterlace Only
57 SURFACE_FORMAT_PLANAR4228 = 6, //!< Deinterlace Only
58 SURFACE_FORMAT_STMMDNSTATISTICS = 7, //!< Deinterlace Only
59 SURFACE_FORMAT_R10G10B10A2UNORM = 8, //!< Sample_8x8 Only
60 SURFACE_FORMAT_R8G8B8A8UNORM = 9, //!< Sample_8x8 Only
61 SURFACE_FORMAT_R8B8UNORM_CRCB = 10, //!< Sample_8x8 Only
62 SURFACE_FORMAT_R8UNORM_CRCB = 11, //!< Sample_8x8 Only
63 SURFACE_FORMAT_Y8UNORM = 12, //!< Sample_8x8 Only
64 };
65
66 //!
67 //! \enum MfxDecoderModeSelect
68 //! \brief MFX decoder mode select
69 //!
70 enum MfxDecoderModeSelect
71 {
72 mfxDecoderModeVld = 0,
73 mfxDecoderModeIt = 1
74 };
75
76 enum CommandsNumberOfAddresses
77 {
78 // MFX Engine Commands
79 MI_BATCH_BUFFER_START_CMD_NUMBER_OF_ADDRESSES = 1, // 2 DW for 1 address field
80 MI_STORE_DATA_IMM_CMD_NUMBER_OF_ADDRESSES = 1, // 2 DW for 1 address field
81 MI_FLUSH_DW_CMD_NUMBER_OF_ADDRESSES = 1, // 2 DW for 1 address field
82 MI_CONDITIONAL_BATCH_BUFFER_END_CMD_NUMBER_OF_ADDRESSES = 1, // 2 DW for 1 address field
83 MI_STORE_REGISTER_MEM_CMD_NUMBER_OF_ADDRESSES = 1, // 2 DW for 1 address field
84 MFX_PIPE_MODE_SELECT_CMD_NUMBER_OF_ADDRESSES = 0, // 0 DW for address fields
85 MFX_SURFACE_STATE_CMD_NUMBER_OF_ADDRESSES = 0, // 0 DW for address fields
86 MFX_PIPE_BUF_ADDR_STATE_CMD_NUMBER_OF_ADDRESSES = 27, // 50 DW for 25 address fields, added 2 for DownScaledReconPicAddr
87 MFX_IND_OBJ_BASE_ADDR_STATE_CMD_NUMBER_OF_ADDRESSES = 5, // 10 DW for 5 address fields
88 MFX_WAIT_CMD_NUMBER_OF_ADDRESSES = 0, // 0 DW for address fields
89 MFX_BSP_BUF_BASE_ADDR_STATE_CMD_NUMBER_OF_ADDRESSES = 3, // 2 DW for 3 address fields
90 MFD_AVC_PICID_STATE_CMD_NUMBER_OF_ADDRESSES = 0, // 0 DW for address fields
91 MFX_AVC_DIRECTMODE_STATE_CMD_NUMBER_OF_ADDRESSES = 17, // 50 DW for 17 address fields
92 MFX_AVC_IMG_STATE_CMD_NUMBER_OF_ADDRESSES = 0, // 0 DW for address fields
93 MFX_QM_STATE_CMD_NUMBER_OF_ADDRESSES = 0, // 0 DW for address fields
94 MFX_FQM_STATE_CMD_NUMBER_OF_ADDRESSES = 0, // 0 DW for address fields
95 MFX_MPEG2_PIC_STATE_CMD_NUMBER_OF_ADDRESSES = 0, // 0 DW for address fields
96 MFX_DBK_OBJECT_CMD_NUMBER_OF_ADDRESSES = 4, // 2 DW for 4 address fields
97 MFX_VP8_PIC_STATE_CMD_NUMBER_OF_ADDRESSES = 2, // 2 DW for 2 address fields
98 MFX_AVC_SLICE_STATE_CMD_NUMBER_OF_ADDRESSES = 0, // 0 DW for address fields
99 MFD_AVC_BSD_OBJECT_CMD_NUMBER_OF_ADDRESSES = 0, // 0 DW for address fields
100 MFD_AVC_DPB_STATE_CMD_NUMBER_OF_ADDRESSES = 0, // 0 DW for address fields
101 MFD_AVC_SLICEADDR_CMD_NUMBER_OF_ADDRESSES = 0, // 0 DW for address fields
102 MFX_AVC_REF_IDX_STATE_CMD_NUMBER_OF_ADDRESSES = 0, // 0 DW for address fields
103 MFX_AVC_WEIGHTOFFSET_STATE_CMD_NUMBER_OF_ADDRESSES = 0, // 0 DW for address fields
104 MFC_AVC_PAK_INSERT_OBJECT_CMD_NUMBER_OF_ADDRESSES = 0, // 0 DW for address fields
105 MFD_MPEG2_BSD_OBJECT_CMD_NUMBER_OF_ADDRESSES = 0, // 0 DW for address fields
106 MFD_MPEG2_IT_OBJECT_CMD_NUMBER_OF_ADDRESSES = 0, // 0 DW for address fields
107 MFD_VP8_BSD_OBJECT_CMD_NUMBER_OF_ADDRESSES = 0, // 0 DW for address fields
108 };
109
110 /*MFX COMMON CMDS BELOW*/
_MHW_PAR_T(MFX_QM_STATE)111 struct _MHW_PAR_T(MFX_QM_STATE)
112 {
113 uint32_t qmType = 0;
114 uint32_t quantizermatrix[16] = {};
115 };
116
_MHW_PAR_T(MFX_FQM_STATE)117 struct _MHW_PAR_T(MFX_FQM_STATE)
118 {
119 uint8_t qmType = 0;
120 uint32_t quantizermatrix[32] = {};
121 };
122
_MHW_PAR_T(MFX_PIPE_MODE_SELECT)123 struct _MHW_PAR_T(MFX_PIPE_MODE_SELECT)
124 {
125 uint32_t Mode = 0;
126 uint32_t standardSelect = 0;
127 uint8_t codecSelect = 0;
128 bool frameStatisticsStreamoutEnable = false;
129 bool scaledSurfaceEnable = false;
130 bool preDeblockingOutputEnablePredeblockoutenable = false;
131 bool postDeblockingOutputEnablePostdeblockoutenable = false;
132 bool streamOutEnable = false;
133 bool deblockerStreamOutEnable = false;
134 uint8_t vdencMode = 0;
135 uint8_t decoderModeSelect = 0;
136 uint8_t decoderShortFormatMode = 0;
137 bool extendedStreamOutEnable = false;
138 uint8_t vlf720IOddHeightInVc1Mode = 0;
139 bool shortFormatInUse = false;
140 bool vc1OddFrameHeight = false;
141 uint32_t mediaSoftResetCounterPer1000Clocks = 0;
142 bool sliceSizeStreamout32bit = false;
143 };
144
_MHW_PAR_T(MFX_SURFACE_STATE)145 struct _MHW_PAR_T(MFX_SURFACE_STATE)
146 {
147 uint8_t surfaceId = 0;
148 uint32_t width = 0;
149 uint32_t height = 0;
150 uint32_t tilemode = 0;
151 uint32_t surfacePitch = 0;
152 uint32_t compressionFormat = 0;
153 uint8_t interleaveChroma = 0;
154 uint32_t surfaceFormat = 0;
155 uint32_t yOffsetForUCb = 0;
156 uint32_t yOffsetForVCr = 0;
157 PMOS_SURFACE psSurface = nullptr;
158 uint32_t uvPlaneAlignment = 0;
159 MOS_MEMCOMP_STATE mmcState = MOS_MEMCOMP_DISABLED;
160 };
161
_MHW_PAR_T(MFX_PIPE_BUF_ADDR_STATE)162 struct _MHW_PAR_T(MFX_PIPE_BUF_ADDR_STATE)
163 {
164 uint32_t Mode = 0;
165 bool decodeInUse = false;
166 bool oneOnOneMapping = false; // Flag for indicating using 1:1 ref index mapping for vdenc
167 PMOS_SURFACE psPreDeblockSurface = nullptr; // Pointer to MOS_SURFACE of render surface
168 MOS_MEMCOMP_STATE PreDeblockSurfMmcState = MOS_MEMCOMP_DISABLED;
169 PMOS_SURFACE psPostDeblockSurface = nullptr; // Pointer to MOS_SURFACE of render surface
170 MOS_MEMCOMP_STATE PostDeblockSurfMmcState = MOS_MEMCOMP_DISABLED;
171 PMOS_SURFACE psRawSurface = nullptr; // Pointer to MOS_SURFACE of raw surface
172 MOS_MEMCOMP_STATE RawSurfMmcState = MOS_MEMCOMP_DISABLED;
173 PMOS_RESOURCE presStreamOutBuffer = nullptr;
174 PMOS_RESOURCE presMfdIntraRowStoreScratchBuffer = nullptr; // Handle of MFD Intra Row Store Scratch data surface
175 PMOS_RESOURCE presMfdDeblockingFilterRowStoreScratchBuffer = nullptr; // Handle of MFD Deblocking Filter Row Store Scratch data surface
176 PMOS_RESOURCE presReferences[CODEC_MAX_NUM_REF_FRAME] = {};
177 PMOS_RESOURCE presVdencReferences[CODEC_MAX_NUM_REF_FRAME] = {};
178 PMOS_RESOURCE presSliceSizeStreamOutBuffer = nullptr;
179 PMOS_SURFACE ps4xDsSurface = nullptr;
180 PMOS_RESOURCE presMacroblockIldbStreamOutBuffer1 = nullptr;
181 PMOS_RESOURCE presMacroblockIldbStreamOutBuffer2 = nullptr;
182 PMOS_RESOURCE * references = nullptr;
183 MOS_MEMCOMP_STATE Ps4xDsSurfMmcState = MOS_MEMCOMP_DISABLED;
184 };
185
_MHW_PAR_T(MFX_IND_OBJ_BASE_ADDR_STATE)186 struct _MHW_PAR_T(MFX_IND_OBJ_BASE_ADDR_STATE)
187 {
188 uint32_t Mode = 0;
189 PMOS_RESOURCE presDataBuffer = nullptr;
190 uint32_t dwDataSize = 0;
191 uint32_t dwDataOffset = 0;
192 PMOS_RESOURCE presMvObjectBuffer = nullptr;
193 uint32_t dwMvObjectSize = 0;
194 uint32_t dwMvObjectOffset = 0;
195 PMOS_RESOURCE presPakBaseObjectBuffer = nullptr;
196 uint32_t dwPakBaseObjectSize = 0;
197 };
198
_MHW_PAR_T(MFX_BSP_BUF_BASE_ADDR_STATE)199 struct _MHW_PAR_T(MFX_BSP_BUF_BASE_ADDR_STATE)
200 {
201 PMOS_RESOURCE presBsdMpcRowStoreScratchBuffer = nullptr;
202 PMOS_RESOURCE presMprRowStoreScratchBuffer = nullptr;
203 PMOS_RESOURCE presBitplaneBuffer = nullptr;
204 };
205
_MHW_PAR_T(MFX_PAK_INSERT_OBJECT)206 struct _MHW_PAR_T(MFX_PAK_INSERT_OBJECT)
207 {
208 uint32_t dwPadding = 0;
209 bool bitstreamstartresetResetbitstreamstartingpos = false;
210 bool endofsliceflagLastdstdatainsertcommandflag = false;
211 bool lastheaderflagLastsrcheaderdatainsertcommandflag = false;
212 bool emulationflagEmulationbytebitsinsertenable = false;
213 uint32_t skipemulbytecntSkipEmulationByteCount = 0;
214 uint32_t databitsinlastdwSrcdataendingbitinclusion50 = 0;
215 bool sliceHeaderIndicator = false;
216 bool headerlengthexcludefrmsize = false;
217 };
218
219 /*AVC CMDS BELOW*/
_MHW_PAR_T(MFX_AVC_IMG_STATE)220 struct _MHW_PAR_T(MFX_AVC_IMG_STATE)
221 {
222 uint32_t frameSize = 0;
223 uint16_t frameWidth = 0;
224 uint16_t frameHeight = 0;
225 uint8_t imgstructImageStructureImgStructure10 = 0;
226 uint16_t weightedBipredIdc = 0;
227 uint16_t weightedPredFlag = 0;
228 char firstChromaQpOffset = 0;
229 char secondChromaQpOffset = 0;
230 bool fieldpicflag = false;
231 bool mbaffflameflag = false;
232 bool vdencEnabled = true;
233 uint16_t framembonlyflag = 0;
234 uint16_t transform8X8Flag = 0;
235 uint16_t direct8X8Infflag = 0;
236 uint16_t constrainedipredflag = 0;
237 uint32_t imgdisposableflag = 0;
238 uint16_t entropycodingflag = 0;
239 uint8_t mbmvformatflag = 0;
240 uint8_t chromaformatidc = 0;
241 uint8_t mvunpackedflag = 0;
242 bool mbstatenabled = false;
243 uint8_t intrambmaxbitflagIntrambmaxsizereportmask = 0;
244 uint8_t intermbmaxbitflagIntermbmaxsizereportmask = 0;
245 uint8_t frameszoverflagFramebitratemaxreportmask = 0;
246 uint8_t frameszunderflagFramebitrateminreportmask = 0;
247 uint8_t intraIntermbipcmflagForceipcmcontrolmask = 0;
248 uint8_t mbratectrlflagMbLevelRateControlEnablingFlag = 0;
249 uint32_t trellisQuantizationRoundingTqr = 0;
250 uint32_t trellisQuantizationEnabledTqenb = 0;
251 uint32_t intrambmaxsz = 0;
252 uint32_t intermbmaxsz = 0;
253 uint32_t framebitratemin = 0;
254 uint32_t framebitrateminunitmode = 0;
255 uint32_t framebitrateminunit = 0;
256 uint32_t framebitratemax = 0;
257 uint32_t framebitratemaxunitmode = 0;
258 uint32_t framebitratemaxunit = 0;
259 uint32_t framebitratemindelta = 0;
260 uint32_t framebitratemaxdelta = 0;
261 bool sliceStatsStreamoutEnable = false;
262 char initialQpValue = 0;
263 uint8_t numberOfActiveReferencePicturesFromL0 = 0;
264 uint8_t numberOfActiveReferencePicturesFromL1 = 0;
265 uint8_t numberOfReferenceFrames = 0;
266 bool picOrderPresentFlag = false;
267 bool deltaPicOrderAlwaysZeroFlag = false;
268 uint32_t picOrderCntType = 0;
269 uint8_t sliceGroupMapType = 0;
270 bool redundantPicCntPresentFlag = false;
271 uint8_t numSliceGroupsMinus1 = 0;
272 bool deblockingFilterControlPresentFlag = false;
273 uint32_t log2MaxFrameNumMinus4 = 0;
274 uint32_t log2MaxPicOrderCntLsbMinus4 = 0;
275 uint16_t sliceGroupChangeRate = 0;
276 uint16_t currPicFrameNum = 0;
277 uint16_t currentFrameViewId = 0;
278 uint8_t maxViewIdxl0 = 0;
279 uint8_t maxViewIdxl1 = 0;
280 bool extendedRhodomainStatisticsEnable = false;
281 uint32_t thresholdSizeInBytes = 0;
282 uint32_t targetSliceSizeInBytes = 0;
283 PCODEC_AVC_PIC_PARAMS avcPicParams = nullptr;
284 PCODEC_MVC_EXT_PIC_PARAMS mvcExtPicParams = nullptr;
285 uint8_t activeFrameCnt = 0;
286 bool decodeInUse = false;
287 uint32_t numMBs = 0;
288 uint32_t imgStructImageStructureImgStructure10 = 0;
289 uint32_t interViewOrderDisable = 0;
290 bool vdaqmEnable = false;
291
292 __MHW_VDBOX_MFX_WRAPPER_EXT(MFX_AVC_IMG_STATE_CMDPAR_EXT);
293 };
294
_MHW_PAR_T(MFX_AVC_REF_IDX_STATE)295 struct _MHW_PAR_T(MFX_AVC_REF_IDX_STATE)
296 {
297 uint32_t uiList = 0;
298 uint32_t referenceListEntry[8] = {};
299 CODEC_PICTURE CurrPic = {};
300 uint32_t numRefForList[2] = {};
301 PCODEC_PIC_ID pAvcPicIdx = nullptr;
302 void ** avcRefList = nullptr;
303 bool intelEntrypointInUse = false;
304 bool picIdRemappingInUse = false;
305 CODEC_PICTURE refPicList[2][32] = {};
306 bool dummyReference = false;
307 bool oneOnOneMapping = false;
308 };
309
_MHW_PAR_T(MFX_AVC_WEIGHTOFFSET_STATE)310 struct _MHW_PAR_T(MFX_AVC_WEIGHTOFFSET_STATE)
311 {
312 uint32_t uiList = 0;
313 int16_t Weights[2][32][3][2] = {};
314 bool decodeInUse = false;
315 uint32_t weightoffset[96] = {};
316 };
317
_MHW_PAR_T(MFX_AVC_SLICE_STATE)318 struct _MHW_PAR_T(MFX_AVC_SLICE_STATE)
319 {
320 uint8_t sliceType = 0;
321 uint8_t log2WeightDenomLuma = 0;
322 uint8_t log2WeightDenomChroma = 0;
323 uint8_t numberOfReferencePicturesInInterPredictionList0 = 0;
324 uint8_t numberOfReferencePicturesInInterPredictionList1 = 0;
325 uint8_t sliceAlphaC0OffsetDiv2 = 0;
326 uint8_t sliceBetaOffsetDiv2 = 0;
327 int8_t sliceQuantizationParameter = 0;
328 uint8_t cabacInitIdc10 = 0;
329 uint8_t disableDeblockingFilterIndicator = 0;
330 uint8_t directPredictionType = 0;
331 uint8_t weightedPredictionIndicator = 0;
332 uint16_t sliceStartMbNum = 0;
333 uint32_t sliceHorizontalPosition = 0;
334 uint32_t sliceVerticalPosition = 0;
335 uint32_t nextSliceHorizontalPosition = 0;
336 uint32_t nextSliceVerticalPosition = 0;
337 uint8_t sliceId30 = 0;
338 bool cabaczerowordinsertionenable = false;
339 bool emulationbytesliceinsertenable = false;
340 bool tailInsertionPresentInBitstream = false;
341 bool slicedataInsertionPresentInBitstream = false;
342 bool headerInsertionPresentInBitstream = false;
343 bool isLastSlice = false;
344 uint8_t roundintra = 0;
345 uint8_t roundinter = 0;
346 bool roundinterenable = false;
347 bool intelEntrypointInUse = false;
348 bool picIdRemappingInUse = false;
349 bool shortFormatInUse = false;
350 PMOS_RESOURCE presDataBuffer = nullptr;
351 PCODEC_AVC_PIC_PARAMS avcPicParams = nullptr;
352 PCODEC_MVC_EXT_PIC_PARAMS mvcExtPicParams = nullptr;
353 PCODEC_PIC_ID avcPicIdx = {};
354 bool phantomSlice = false;
355 PCODEC_AVC_SLICE_PARAMS avcSliceParams = nullptr;
356 uint32_t Offset = 0;
357 uint32_t Length = 0;
358 uint32_t nextOffset = 0;
359 uint32_t nextLength = 0;
360 uint32_t sliceIndex = 0;
361 bool fullFrameData = 0;
362 uint32_t totalBytesConsumed = 0;
363 bool decodeInUse = false;
364 };
365
_MHW_PAR_T(MFX_AVC_DIRECTMODE_STATE)366 struct _MHW_PAR_T(MFX_AVC_DIRECTMODE_STATE)
367 {
368 CODEC_PICTURE CurrPic = {};
369 uint32_t uiUsedForReferenceFlags = 0;
370 PMOS_RESOURCE presAvcDmvBuffers = nullptr;
371 uint8_t ucAvcDmvIdx = 0;
372 PCODEC_PIC_ID pAvcPicIdx = nullptr;
373 void** avcRefList = nullptr;
374 bool bPicIdRemappingInUse = false;
375 bool bDisableDmvBuffers = false;
376 MOS_RESOURCE resAvcDmvBuffers[18] = {};
377 };
378
_MHW_PAR_T(MFD_AVC_SLICEADDR)379 struct _MHW_PAR_T(MFD_AVC_SLICEADDR)
380 {
381 bool decodeInUse = false;
382 uint32_t IndirectBsdDataLength = 0;
383 uint32_t IndirectBsdDataStartAddress = 0;
384 PMOS_RESOURCE presDataBuffer = nullptr;
385 uint32_t dwSliceIndex = 0;
386 uint32_t dwTotalBytesConsumed = 0;
387 PCODEC_AVC_SLICE_PARAMS avcSliceParams = nullptr;
388 };
389
_MHW_PAR_T(MFD_AVC_BSD_OBJECT)390 struct _MHW_PAR_T(MFD_AVC_BSD_OBJECT)
391 {
392 bool LastsliceFlag = false;
393 uint32_t IntraPredmode4X48X8LumaErrorControlBit = 0;
394
395 uint32_t IntraPredictionErrorControlBitAppliedToIntra16X16Intra8X8Intra4X4LumaAndChroma = 0;
396 uint32_t Intra8X84X4PredictionErrorConcealmentControlBit = 0;
397 uint32_t ISliceConcealmentMode = 0;
398 uint32_t IndirectBsdDataLength = 0;
399 uint32_t IndirectBsdDataStartAddress = 0;
400 uint32_t FirstMbByteOffsetOfSliceDataOrSliceHeader = 0;
401 uint32_t FirstMacroblockMbBitOffset = 0;
402 uint32_t FixPrevMbSkipped = 0;
403 PMOS_RESOURCE presDataBuffer = nullptr;
404 uint32_t dwSliceIndex = 0;
405 uint32_t dwTotalBytesConsumed = 0;
406 bool decodeInUse = false;
407 PCODEC_AVC_SLICE_PARAMS pAvcSliceParams = nullptr;
408 };
409
_MHW_PAR_T(MFD_AVC_PICID_STATE)410 struct _MHW_PAR_T(MFD_AVC_PICID_STATE)
411 {
412 bool bPicIdRemappingInUse = false;
413 PCODEC_PIC_ID pAvcPicIdx = nullptr;
414 uint32_t Pictureidlist1616Bits[8] = {};
415 uint32_t PictureidRemappingDisable = 0;
416 };
417
_MHW_PAR_T(MFD_AVC_DPB_STATE)418 struct _MHW_PAR_T(MFD_AVC_DPB_STATE)
419 {
420 PCODEC_AVC_PIC_PARAMS pAvcPicParams = nullptr;
421 PCODEC_MVC_EXT_PIC_PARAMS pMvcExtPicParams = nullptr;
422 PCODEC_REF_LIST * ppAvcRefList = nullptr;
423 bool bPicIdRemappingInUse = false;
424 uint32_t NonExistingframeFlag161Bit = 0;
425 uint32_t LongtermframeFlag161Bit = 0;
426 uint32_t usedForRef = 0;
427 int16_t refFrameOrder[CODEC_MAX_NUM_REF_FRAME] = {0};
428 PCODEC_PIC_ID pAvcPicIdx = nullptr;
429 };
430
_MHW_PAR_T(MFX_JPEG_PIC_STATE)431 struct _MHW_PAR_T(MFX_JPEG_PIC_STATE)
432 {
433 bool decodeInUse = false;
434
435 uint8_t inputFormatYuv = 0;
436 uint8_t rotation = 0;
437 uint8_t outputFormatYuv = 0;
438 bool verticalDownSamplingEnable = false;
439 bool horizontalDownSamplingEnable = false;
440 bool verticalUpSamplingEnable = false;
441
442 uint8_t outputMcuStructure = 0;
443 uint8_t inputSurfaceFormatYuv = 0;
444 uint8_t pixelsInVerticalLastMcu = 0;
445 uint8_t pixelsInHorizontalLastMcu = 0;
446 uint32_t frameWidthInBlocksMinus1 = 0;
447 uint32_t frameHeightInBlocksMinus1 = 0;
448
449 uint32_t Mode = 0;
450 CodecDecodeJpegPicParams *pJpegPicParams = nullptr;
451 uint32_t dwOutputFormat = 0;
452 uint32_t dwWidthInBlocks = 0;
453 uint32_t dwHeightInBlocks = 0;
454 };
455
_MHW_PAR_T(MFC_JPEG_HUFF_TABLE_STATE)456 struct _MHW_PAR_T(MFC_JPEG_HUFF_TABLE_STATE)
457 {
458 uint8_t huffTableId = 0;
459 uint32_t dcTable[12] = {};
460 uint32_t acTable[162] = {};
461 };
462
_MHW_PAR_T(MFC_JPEG_SCAN_OBJECT)463 struct _MHW_PAR_T(MFC_JPEG_SCAN_OBJECT)
464 {
465 uint32_t mcuCount = 0;
466 uint16_t restartInterval = 0;
467 uint8_t huffmanDcTable = 0;
468 uint8_t huffmanAcTable = 0;
469 };
470
_MHW_PAR_T(MFX_JPEG_HUFF_TABLE_STATE)471 struct _MHW_PAR_T(MFX_JPEG_HUFF_TABLE_STATE)
472 {
473 uint32_t huffTableID = 0;
474 void * pDCBits = nullptr;
475 void * pDCValues = nullptr;
476 void * pACBits = nullptr;
477 void * pACValues = nullptr;
478 };
479
_MHW_PAR_T(MFD_JPEG_BSD_OBJECT)480 struct _MHW_PAR_T(MFD_JPEG_BSD_OBJECT)
481 {
482 uint32_t indirectDataLength = 0;
483 uint32_t dataStartAddress = 0;
484 uint32_t scanHorizontalPosition = 0;
485 uint32_t scanVerticalPosition = 0;
486 bool interleaved = false;
487 int16_t scanComponent = 0;
488 uint32_t mcuCount = 0;
489 uint32_t restartInterval = 0;
490 };
491
492 /*MPEG2 CMDS BELOW*/
_MHW_PAR_T(MFX_MPEG2_PIC_STATE)493 struct _MHW_PAR_T(MFX_MPEG2_PIC_STATE)
494 {
495 uint16_t ScanOrder = 0;
496 uint16_t IntraVlcFormat = 0;
497 uint16_t QuantizerScaleType = 0;
498 uint16_t ConcealmentMotionVectorFlag = 0;
499 uint16_t FramePredictionFrameDct = 0;
500 uint16_t TffTopFieldFirst = 0;
501 uint16_t PictureStructure = 0;
502 uint16_t IntraDcPrecision = 0;
503 uint16_t FCode00 = 0;
504 uint16_t FCode01 = 0;
505 uint16_t FCode10 = 0;
506 uint16_t FCode11 = 0;
507
508 int32_t PictureCodingType = 0;
509 uint32_t ISliceConcealmentMode = 0;
510 uint32_t PBSliceConcealmentMode = 0;
511 uint32_t PBSlicePredictedBidirMotionTypeOverrideBiDirectionMvTypeOverride = 0;
512 uint32_t PBSlicePredictedMotionVectorOverrideFinalMvValueOverride = 0;
513 uint32_t SliceConcealmentDisableBit = 0;
514
515 uint16_t Framewidthinmbsminus170PictureWidthInMacroblocks = 0;
516 uint16_t Frameheightinmbsminus170PictureHeightInMacroblocks = 0;
517
518 uint16_t mfxMpeg2PicStatePar0 = 0;
519
520 uint32_t Roundintradc = 0;
521 uint32_t Roundinterdc = 0;
522 uint32_t Roundintraac = 0;
523 uint32_t Roundinterac = 0;
524 };
525
_MHW_PAR_T(MFD_MPEG2_BSD_OBJECT)526 struct _MHW_PAR_T(MFD_MPEG2_BSD_OBJECT)
527 {
528 bool decodeInUse = false;
529 PMOS_RESOURCE presDataBuffer = nullptr;
530 uint32_t dwDataStartOffset = 0;
531
532 uint32_t IndirectBsdDataLength = 0;
533 uint32_t IndirectDataStartAddress = 0;
534
535 uint32_t FirstMacroblockBitOffset = 0;
536 bool IsLastMb = false;
537 bool LastPicSlice = false;
538 bool MbRowLastSlice = false;
539 uint32_t MacroblockCount = 0;
540 uint32_t SliceHorizontalPosition = 0;
541 uint32_t SliceVerticalPosition = 0;
542
543 int32_t QuantizerScaleCode = 0;
544 uint16_t NextSliceHorizontalPosition = 0;
545 uint16_t NextSliceVerticalPosition = 0;
546 };
547
548 /*VP8 CMDS BELOW*/
_MHW_PAR_T(MFX_VP8_PIC_STATE)549 struct _MHW_PAR_T(MFX_VP8_PIC_STATE)
550 {
551 uint32_t dwCoefProbTableOffset = 0;
552 PMOS_RESOURCE presCoefProbBuffer = nullptr;
553 PMOS_RESOURCE presSegmentationIdStreamBuffer = nullptr;
554 // DW1
555 uint32_t FrameWidthMinus1 = 0;
556 uint32_t FrameHeightMinus1 = 0;
557 // DW2
558 uint32_t McFilterSelect = 0;
559 uint32_t ChromaFullPixelMcFilterMode = 0;
560 uint32_t Dblkfiltertype = 0;
561 uint32_t Skeyframeflag = 0;
562 uint32_t SegmentationIdStreamoutEnable = 0;
563 uint32_t SegmentationIdStreaminEnable = 0;
564 uint32_t SegmentEnableFlag = 0;
565 uint32_t UpdateMbsegmentMapFlag = 0;
566 uint32_t MbNocoeffSkipflag = 0;
567 uint32_t ModeReferenceLoopFilterDeltaEnabled = 0;
568 uint32_t GoldenRefPictureMvSignbiasFlag = 0;
569 uint32_t AlternateRefPicMvSignbiasFlag = 0;
570 uint32_t DeblockSharpnessLevel = 0;
571 // DW3
572 uint32_t DblkfilterlevelForSegment3 = 0;
573 uint32_t DblkfilterlevelForSegment2 = 0;
574 uint32_t DblkfilterlevelForSegment1 = 0;
575 uint32_t DblkfilterlevelForSegment0 = 0;
576 // DW4
577 uint32_t QuantizerValue0Blocktype0Y1Dc = 0;
578 uint32_t QuantizerValue0Blocktype1Y1Ac = 0;
579 // DW5
580 uint32_t QuantizerValue0Blocktype2Uvdc = 0;
581 uint32_t QuantizerValue0Blocktype3Uvac = 0;
582 // DW6
583 uint32_t QuantizerValue0Blocktype4Y2Dc = 0;
584 uint32_t QuantizerValue0Blocktype5Y2Ac = 0;
585 // DW7
586 uint32_t QuantizerValue1Blocktype0Y1Dc = 0;
587 uint32_t QuantizerValue1Blocktype1Y1Ac = 0;
588 // DW8
589 uint32_t QuantizerValue1Blocktype2Uvdc = 0;
590 uint32_t QuantizerValue1Blocktype3Uvac = 0;
591 // DW9
592 uint32_t QuantizerValue1Blocktype4Y2Dc = 0;
593 uint32_t QuantizerValue1Blocktype5Y2Ac = 0;
594 // DW10
595 uint32_t QuantizerValue2Blocktype0Y1Dc = 0;
596 uint32_t QuantizerValue2Blocktype1Y1Ac = 0;
597 // DW11
598 uint32_t QuantizerValue2Blocktype2Uvdc = 0;
599 uint32_t QuantizerValue2Blocktype3Uvac = 0;
600 // DW12
601 uint32_t QuantizerValue2Blocktype4Y2Dc = 0;
602 uint32_t QuantizerValue2Blocktype5Y2Ac = 0;
603 // DW13
604 uint32_t QuantizerValue3Blocktype0Y1Dc = 0;
605 uint32_t QuantizerValue3Blocktype1Y1Ac = 0;
606 // DW14
607 uint32_t QuantizerValue3Blocktype2Uvdc = 0;
608 uint32_t QuantizerValue3Blocktype3Uvac = 0;
609 // DW15
610 uint32_t QuantizerValue3Blocktype4Y2Dc = 0;
611 uint32_t QuantizerValue3Blocktype5Y2Ac = 0;
612 // DW19
613 uint32_t Mbsegmentidtreeprobs0 = 0;
614 uint32_t Mbsegmentidtreeprobs1 = 0;
615 uint32_t Mbsegmentidtreeprobs2 = 0;
616 // DW20
617 uint32_t Mbnocoeffskipfalseprob = 0;
618 uint32_t Intrambprob = 0;
619 uint32_t Interpredfromlastrefprob = 0;
620 uint32_t Interpredfromgrefrefprob = 0;
621 // DW21
622 uint32_t Ymodeprob3 = 0;
623 uint32_t Ymodeprob2 = 0;
624 uint32_t Ymodeprob1 = 0;
625 uint32_t Ymodeprob0 = 0;
626 // DW22
627 uint32_t Uvmodeprob2 = 0;
628 uint32_t Uvmodeprob1 = 0;
629 uint32_t Uvmodeprob0 = 0;
630 // DW23
631 uint32_t Mvupdateprobs00 = 0;
632 uint32_t Mvupdateprobs01 = 0;
633 uint32_t Mvupdateprobs02 = 0;
634 uint32_t Mvupdateprobs03 = 0;
635 // DW24
636 uint32_t Mvupdateprobs04 = 0;
637 uint32_t Mvupdateprobs05 = 0;
638 uint32_t Mvupdateprobs06 = 0;
639 uint32_t Mvupdateprobs07 = 0;
640 // DW25
641 uint32_t Mvupdateprobs08 = 0;
642 uint32_t Mvupdateprobs09 = 0;
643 uint32_t Mvupdateprobs010 = 0;
644 uint32_t Mvupdateprobs011 = 0;
645 // DW26
646 uint32_t Mvupdateprobs012 = 0;
647 uint32_t Mvupdateprobs013 = 0;
648 uint32_t Mvupdateprobs014 = 0;
649 uint32_t Mvupdateprobs015 = 0;
650 // DW27
651 uint32_t Mvupdateprobs016 = 0;
652 uint32_t Mvupdateprobs017 = 0;
653 uint32_t Mvupdateprobs018 = 0;
654 // DW28
655 uint32_t Mvupdateprobs10 = 0;
656 uint32_t Mvupdateprobs11 = 0;
657 uint32_t Mvupdateprobs12 = 0;
658 uint32_t Mvupdateprobs13 = 0;
659 // DW29
660 uint32_t Mvupdateprobs14 = 0;
661 uint32_t Mvupdateprobs15 = 0;
662 uint32_t Mvupdateprobs16 = 0;
663 uint32_t Mvupdateprobs17 = 0;
664 // DW30
665 uint32_t Mvupdateprobs18 = 0;
666 uint32_t Mvupdateprobs19 = 0;
667 uint32_t Mvupdateprobs110 = 0;
668 uint32_t Mvupdateprobs111 = 0;
669 // DW31
670 uint32_t Mvupdateprobs112 = 0;
671 uint32_t Mvupdateprobs113 = 0;
672 uint32_t Mvupdateprobs114 = 0;
673 uint32_t Mvupdateprobs115 = 0;
674 // DW32
675 uint32_t Mvupdateprobs116 = 0;
676 uint32_t Mvupdateprobs117 = 0;
677 uint32_t Mvupdateprobs118 = 0;
678 // DW33
679 uint32_t Reflfdelta0ForIntraFrame = 0;
680 uint32_t Reflfdelta1ForLastFrame = 0;
681 uint32_t Reflfdelta2ForGoldenFrame = 0;
682 uint32_t Reflfdelta3ForAltrefFrame = 0;
683 // DW34
684 uint32_t Modelfdelta0ForBPredMode = 0;
685 uint32_t Modelfdelta1ForZeromvMode = 0;
686 uint32_t Modelfdelta2ForNearestNearAndNewMode = 0;
687 uint32_t Modelfdelta3ForSplitmvMode = 0;
688 };
689
_MHW_PAR_T(MFD_VP8_BSD_OBJECT)690 struct _MHW_PAR_T(MFD_VP8_BSD_OBJECT)
691 {
692 // DW1
693 uint32_t CodedNumOfCoeffTokenPartitions = 0;
694 uint32_t Partition0CpbacEntropyRange = 0;
695 uint32_t Partition0CpbacEntropyCount = 0;
696 // DW2
697 uint32_t Partition0CpbacEntropyValue = 0;
698 // DW3
699 uint32_t IndirectPartition0DataLength = 0;
700 // DW4
701 uint32_t IndirectPartition0DataStartOffset = 0;
702 // DW5
703 uint32_t IndirectPartition1DataLength = 0;
704 // DW6
705 uint32_t IndirectPartition1DataStartOffset = 0;
706 // DW7-8
707 uint32_t IndirectPartition2DataLength = 0;
708 uint32_t IndirectPartition2DataStartOffset = 0;
709 // DW9-10
710 uint32_t IndirectPartition3DataLength = 0;
711 uint32_t IndirectPartition3DataStartOffset = 0;
712 // DW11-12
713 uint32_t IndirectPartition4DataLength = 0;
714 uint32_t IndirectPartition4DataStartOffset = 0;
715 // DW13-14
716 uint32_t IndirectPartition5DataLength = 0;
717 uint32_t IndirectPartition5DataStartOffset = 0;
718 // DW15-16
719 uint32_t IndirectPartition6DataLength = 0;
720 uint32_t IndirectPartition6DataStartOffset = 0;
721 // DW17-18
722 uint32_t IndirectPartition7DataLength = 0;
723 uint32_t IndirectPartition7DataStartOffset = 0;
724 // DW19-20
725 uint32_t IndirectPartition8DataLength = 0;
726 uint32_t IndirectPartition8DataStartOffset = 0;
727 };
728
_MHW_PAR_T(MFD_IT_OBJECT)729 struct _MHW_PAR_T(MFD_IT_OBJECT)
730 {
731 uint32_t dwDCTLength = 0;
732 uint32_t DwordLength = 0;
733 uint32_t IndirectItCoeffDataStartAddressOffset = 0;
734 };
735
_MHW_PAR_T(MFD_IT_OBJECT_MPEG2_INLINE_DATA)736 struct _MHW_PAR_T(MFD_IT_OBJECT_MPEG2_INLINE_DATA)
737 {
738 CodecDecodeMpeg2MbParams *pMBParams = nullptr;
739
740 int32_t CodingType = 0;
741 int16_t sPackedMVs0[4] = {};
742 int16_t sPackedMVs1[4] = {};
743
744 uint16_t CodedBlockPattern = 0;
745 bool Lastmbinrow = false;
746
747 uint32_t Horzorigin = 0;
748 uint32_t Vertorigin = 0;
749 };
750
751 } // namespace mfx
752 } // namespace vdbox
753 } // namespace mhw
754
755 #endif //__MHW_VDBOX_MFX_CMDPAR_H__
756
757