1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (C) 2020-2025 Intel Corporation
4 */
5
6 #ifndef __IVPU_HW_H__
7 #define __IVPU_HW_H__
8
9 #include <linux/kfifo.h>
10
11 #include "ivpu_drv.h"
12 #include "ivpu_hw_btrs.h"
13 #include "ivpu_hw_ip.h"
14
15 #define IVPU_HW_IRQ_FIFO_LENGTH 1024
16
17 #define IVPU_HW_IRQ_SRC_IPC 1
18 #define IVPU_HW_IRQ_SRC_MMU_EVTQ 2
19 #define IVPU_HW_IRQ_SRC_DCT 3
20
21 struct ivpu_addr_range {
22 resource_size_t start;
23 resource_size_t end;
24 };
25
26 struct ivpu_hw_info {
27 struct {
28 bool (*btrs_irq_handler)(struct ivpu_device *vdev, int irq);
29 bool (*ip_irq_handler)(struct ivpu_device *vdev, int irq);
30 DECLARE_KFIFO(fifo, u8, IVPU_HW_IRQ_FIFO_LENGTH);
31 } irq;
32 struct {
33 struct ivpu_addr_range global;
34 struct ivpu_addr_range user;
35 struct ivpu_addr_range shave;
36 struct ivpu_addr_range dma;
37 } ranges;
38 struct {
39 u8 min_ratio;
40 u8 max_ratio;
41 /*
42 * Pll ratio for the efficiency frequency. The VPU has optimum
43 * performance to power ratio at this frequency.
44 */
45 u8 pn_ratio;
46 u32 profiling_freq;
47 } pll;
48 u32 tile_fuse;
49 u32 sku;
50 u16 config;
51 int dma_bits;
52 ktime_t d0i3_entry_host_ts;
53 u64 d0i3_entry_vpu_ts;
54 atomic_t firewall_irq_counter;
55 };
56
57 int ivpu_hw_init(struct ivpu_device *vdev);
58 int ivpu_hw_power_up(struct ivpu_device *vdev);
59 int ivpu_hw_power_down(struct ivpu_device *vdev);
60 int ivpu_hw_reset(struct ivpu_device *vdev);
61 int ivpu_hw_boot_fw(struct ivpu_device *vdev);
62 void ivpu_hw_profiling_freq_drive(struct ivpu_device *vdev, bool enable);
63 void ivpu_irq_handlers_init(struct ivpu_device *vdev);
64 void ivpu_hw_irq_enable(struct ivpu_device *vdev);
65 void ivpu_hw_irq_disable(struct ivpu_device *vdev);
66 irqreturn_t ivpu_hw_irq_handler(int irq, void *ptr);
67
ivpu_hw_btrs_irq_handler(struct ivpu_device * vdev,int irq)68 static inline u32 ivpu_hw_btrs_irq_handler(struct ivpu_device *vdev, int irq)
69 {
70 return vdev->hw->irq.btrs_irq_handler(vdev, irq);
71 }
72
ivpu_hw_ip_irq_handler(struct ivpu_device * vdev,int irq)73 static inline u32 ivpu_hw_ip_irq_handler(struct ivpu_device *vdev, int irq)
74 {
75 return vdev->hw->irq.ip_irq_handler(vdev, irq);
76 }
77
ivpu_hw_range_init(struct ivpu_addr_range * range,u64 start,u64 size)78 static inline void ivpu_hw_range_init(struct ivpu_addr_range *range, u64 start, u64 size)
79 {
80 range->start = start;
81 range->end = start + size;
82 }
83
ivpu_hw_range_size(const struct ivpu_addr_range * range)84 static inline u64 ivpu_hw_range_size(const struct ivpu_addr_range *range)
85 {
86 return range->end - range->start;
87 }
88
ivpu_hw_dpu_max_freq_get(struct ivpu_device * vdev)89 static inline u32 ivpu_hw_dpu_max_freq_get(struct ivpu_device *vdev)
90 {
91 return ivpu_hw_btrs_dpu_max_freq_get(vdev);
92 }
93
ivpu_hw_irq_clear(struct ivpu_device * vdev)94 static inline void ivpu_hw_irq_clear(struct ivpu_device *vdev)
95 {
96 ivpu_hw_ip_irq_clear(vdev);
97 }
98
ivpu_hw_profiling_freq_get(struct ivpu_device * vdev)99 static inline u32 ivpu_hw_profiling_freq_get(struct ivpu_device *vdev)
100 {
101 return vdev->hw->pll.profiling_freq;
102 }
103
ivpu_hw_diagnose_failure(struct ivpu_device * vdev)104 static inline void ivpu_hw_diagnose_failure(struct ivpu_device *vdev)
105 {
106 ivpu_hw_ip_diagnose_failure(vdev);
107 ivpu_hw_btrs_diagnose_failure(vdev);
108 }
109
ivpu_hw_telemetry_offset_get(struct ivpu_device * vdev)110 static inline u32 ivpu_hw_telemetry_offset_get(struct ivpu_device *vdev)
111 {
112 return ivpu_hw_btrs_telemetry_offset_get(vdev);
113 }
114
ivpu_hw_telemetry_size_get(struct ivpu_device * vdev)115 static inline u32 ivpu_hw_telemetry_size_get(struct ivpu_device *vdev)
116 {
117 return ivpu_hw_btrs_telemetry_size_get(vdev);
118 }
119
ivpu_hw_telemetry_enable_get(struct ivpu_device * vdev)120 static inline u32 ivpu_hw_telemetry_enable_get(struct ivpu_device *vdev)
121 {
122 return ivpu_hw_btrs_telemetry_enable_get(vdev);
123 }
124
ivpu_hw_is_idle(struct ivpu_device * vdev)125 static inline bool ivpu_hw_is_idle(struct ivpu_device *vdev)
126 {
127 return ivpu_hw_btrs_is_idle(vdev);
128 }
129
ivpu_hw_wait_for_idle(struct ivpu_device * vdev)130 static inline int ivpu_hw_wait_for_idle(struct ivpu_device *vdev)
131 {
132 return ivpu_hw_btrs_wait_for_idle(vdev);
133 }
134
ivpu_hw_ipc_tx_set(struct ivpu_device * vdev,u32 vpu_addr)135 static inline void ivpu_hw_ipc_tx_set(struct ivpu_device *vdev, u32 vpu_addr)
136 {
137 ivpu_hw_ip_ipc_tx_set(vdev, vpu_addr);
138 }
139
ivpu_hw_db_set(struct ivpu_device * vdev,u32 db_id)140 static inline void ivpu_hw_db_set(struct ivpu_device *vdev, u32 db_id)
141 {
142 ivpu_hw_ip_db_set(vdev, db_id);
143 }
144
ivpu_hw_ipc_rx_addr_get(struct ivpu_device * vdev)145 static inline u32 ivpu_hw_ipc_rx_addr_get(struct ivpu_device *vdev)
146 {
147 return ivpu_hw_ip_ipc_rx_addr_get(vdev);
148 }
149
ivpu_hw_ipc_rx_count_get(struct ivpu_device * vdev)150 static inline u32 ivpu_hw_ipc_rx_count_get(struct ivpu_device *vdev)
151 {
152 return ivpu_hw_ip_ipc_rx_count_get(vdev);
153 }
154
155 #endif /* __IVPU_HW_H__ */
156