1 /******************************************************************************
2 *
3 * Copyright (C) 2015 The Android Open Source Project
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************
18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19 */
20
21 /*****************************************************************************/
22 /* Includes */
23 /*****************************************************************************/
24
25 /* System include files */
26 #include "stdio.h"
27
28 /* User include files */
29 #include "irc_datatypes.h"
30 #include "irc_common.h"
31 #include "irc_cntrl_param.h"
32 #include "irc_mem_req_and_acq.h"
33 #include "irc_rd_model.h"
34 #include "irc_est_sad.h"
35 #include "irc_fixed_point_error_bits.h"
36 #include "irc_vbr_storage_vbv.h"
37 #include "irc_picture_type.h"
38 #include "irc_bit_allocation.h"
39 #include "irc_mb_model_based.h"
40 #include "irc_cbr_buffer_control.h"
41 #include "irc_vbr_str_prms.h"
42 #include "irc_rate_control_api.h"
43 #include "irc_rate_control_api_structs.h"
44 #include "irc_trace_support.h"
45
46
47 #define MIN(a,b) (((a) < (b)) ? (a) : (b))
48 #define MAX(a,b) (((a) > (b)) ? (a) : (b))
49
50 #define DEV_Q 4 /*Q format(Shift) for Deviation range factor */
51 #define HI_DEV_FCTR 22 /* 1.4*16 */
52 #define LO_DEV_FCTR 12 /* 0.75*16 */
53 #define GET_HI_DEV_QP(Qprev) (( ((WORD32) Qprev)*HI_DEV_FCTR + (1<<(DEV_Q-1)))>>DEV_Q)
54 #define GET_LO_DEV_QP(Qprev) (( ((WORD32) Qprev)*LO_DEV_FCTR + (1<<(DEV_Q-1)))>>DEV_Q)
55 #define CLIP_QP(Qc, hi_d, lo_d) (((Qc) < (lo_d))?((lo_d)):(((Qc) > (hi_d))?(hi_d):(Qc)))
56
57 /*****************************************************************************
58 Function Name : fill_memtab
59 Description : fill memtab
60 Inputs :
61 ps_mem_tab - Memtab pointer
62 u4_size - Size of the memtab
63 i4_alignment - alignment of the memtab
64 e_usage - usage
65 e_mem_region - region
66 *****************************************************************************/
fill_memtab(itt_memtab_t * ps_mem_tab,WORD32 u4_size,WORD32 i4_alignment,ITT_MEM_USAGE_TYPE_E e_usage,ITT_MEM_REGION_E e_mem_region)67 void fill_memtab(itt_memtab_t *ps_mem_tab,
68 WORD32 u4_size,
69 WORD32 i4_alignment,
70 ITT_MEM_USAGE_TYPE_E e_usage,
71 ITT_MEM_REGION_E e_mem_region)
72 {
73 /* Make the size next multiple of alignment */
74 WORD32 i4_aligned_size = (((u4_size) + (i4_alignment-1)) & (~(i4_alignment-1)));
75
76 /* Fill the memtab */
77 ps_mem_tab->u4_size = i4_aligned_size;
78 ps_mem_tab->i4_alignment = i4_alignment;
79 ps_mem_tab->e_usage = e_usage;
80 ps_mem_tab->e_mem_region = e_mem_region;
81 }
82
83 /*****************************************************************************
84 Function Name : use_or_fill_base
85 Description : Get or Set base pointer for the memtab
86 Inputs :
87 ps_mem_tab - Memtab pointer
88 ptr_to_be_filled - Pointer to base pointer
89 e_func_type - Get/Set flag
90 *****************************************************************************/
use_or_fill_base(itt_memtab_t * ps_mem_tab,void ** ptr_to_be_filled,ITT_FUNC_TYPE_E e_func_type)91 WORD32 use_or_fill_base(itt_memtab_t *ps_mem_tab,
92 void **ptr_to_be_filled,
93 ITT_FUNC_TYPE_E e_func_type)
94 {
95 /* Fill base for freeing the allocated memory */
96 if (e_func_type == FILL_BASE)
97 {
98 if (ptr_to_be_filled[0] != 0)
99 {
100 ps_mem_tab->pv_base = ptr_to_be_filled[0];
101 return (0);
102 }
103 else
104 {
105 return (-1);
106 }
107 }
108 /* obtain the allocated memory from base pointer */
109 if (e_func_type == USE_BASE)
110 {
111 if (ps_mem_tab->pv_base != 0)
112 {
113 ptr_to_be_filled[0] = ps_mem_tab->pv_base;
114 return (0);
115 }
116 else
117 {
118 return (-1);
119 }
120 }
121 return (0);
122 }
123
124 /*****************************************************************************/
125 /* Restricts the quantization parameter variation within delta */
126 /*****************************************************************************/
127 /* static WORD32 restrict_swing(WORD32 cur_qp, WORD32 prev_qp, WORD32 delta_qp)
128 {
129 if((cur_qp) - (prev_qp) > (delta_qp)) (cur_qp) = (prev_qp) + (delta_qp) ;
130 if((prev_qp) - (cur_qp) > (delta_qp)) (cur_qp) = (prev_qp) - (delta_qp) ;
131 return cur_qp;
132 }*/
133
134 /*****************************************************************************
135 Function Name : rate_control_get_init_free_memtab
136 Description : Takes or gives memtab
137 Inputs : pps_rate_control_api - pointer to RC api pointer
138 ps_memtab - Memtab pointer
139 i4_use_base - Set during init, else 0
140 i4_fill_base - Set during free, else 0
141 *****************************************************************************/
irc_rate_control_num_fill_use_free_memtab(rate_control_handle * pps_rate_control_api,itt_memtab_t * ps_memtab,ITT_FUNC_TYPE_E e_func_type)142 WORD32 irc_rate_control_num_fill_use_free_memtab(rate_control_handle *pps_rate_control_api,
143 itt_memtab_t *ps_memtab,
144 ITT_FUNC_TYPE_E e_func_type)
145 {
146 WORD32 i4_mem_tab_idx = 0, i;
147 rate_control_api_t s_temp_rc_api;
148
149 /*
150 * Hack for al alloc, during which we dont have any state memory.
151 * Dereferencing can cause issues
152 */
153 if(e_func_type == GET_NUM_MEMTAB || e_func_type == FILL_MEMTAB)
154 (*pps_rate_control_api) = &s_temp_rc_api;
155
156 /*for src rate control state structure*/
157 if(e_func_type != GET_NUM_MEMTAB)
158 {
159 fill_memtab(&ps_memtab[i4_mem_tab_idx], sizeof(rate_control_api_t),
160 ALIGN_128_BYTE, PERSISTENT, DDR);
161 use_or_fill_base(&ps_memtab[0], (void**)pps_rate_control_api,
162 e_func_type);
163 }
164 i4_mem_tab_idx++;
165
166 /* Get the memory requirement of lower modules */
167 i4_mem_tab_idx += irc_ba_num_fill_use_free_memtab(
168 &pps_rate_control_api[0]->ps_bit_allocation,
169 &ps_memtab[i4_mem_tab_idx], e_func_type);
170
171 i4_mem_tab_idx += irc_cbr_buffer_num_fill_use_free_memtab(
172 &pps_rate_control_api[0]->ps_cbr_buffer,
173 &ps_memtab[i4_mem_tab_idx], e_func_type);
174
175 i4_mem_tab_idx += irc_est_sad_num_fill_use_free_memtab(
176 &pps_rate_control_api[0]->ps_est_sad,
177 &ps_memtab[i4_mem_tab_idx], e_func_type);
178
179 i4_mem_tab_idx += irc_mbrc_num_fill_use_free_memtab(
180 &pps_rate_control_api[0]->ps_mb_rate_control,
181 &ps_memtab[i4_mem_tab_idx], e_func_type);
182
183 i4_mem_tab_idx += irc_vbr_vbv_num_fill_use_free_memtab(
184 &pps_rate_control_api[0]->ps_vbr_storage_vbv,
185 &ps_memtab[i4_mem_tab_idx], e_func_type);
186
187 for(i = 0; i < MAX_PIC_TYPE; i++)
188 {
189 i4_mem_tab_idx += irc_rd_model_num_fill_use_free_memtab(
190 &pps_rate_control_api[0]->aps_rd_model[i],
191 &ps_memtab[i4_mem_tab_idx], e_func_type);
192 }
193 i4_mem_tab_idx += irc_pic_handling_num_fill_use_free_memtab(
194 &pps_rate_control_api[0]->ps_pic_handling,
195 &ps_memtab[i4_mem_tab_idx], e_func_type);
196
197 return (i4_mem_tab_idx);
198 }
199
200 /*****************************************************************************
201 Function Name : irc_initialise_rate_control
202 Description : Initialise the rate control structure
203 Inputs : ps_rate_control_api - api struct
204 e_rate_control_type - VBR, CBR (NLDRC/LDRC), VBR_STREAMING
205 u1_is_mb_level_rc_on - enabling mb level RC
206 u4_avg_bit_rate - bit rate to achieved across the entire
207 file size
208 u4_peak_bit_rate - max possible drain rate
209 u4_frame_rate - number of frames in 1000 seconds
210 u4_intra_frame_interval - num frames between two I frames
211 *au1_init_qp - init_qp for I,P,B
212 *****************************************************************************/
irc_initialise_rate_control(rate_control_api_t * ps_rate_control_api,rc_type_e e_rate_control_type,UWORD8 u1_is_mb_level_rc_on,UWORD32 u4_avg_bit_rate,UWORD32 * pu4_peak_bit_rate,UWORD32 u4_min_bit_rate,UWORD32 u4_frame_rate,UWORD32 u4_max_delay,UWORD32 u4_intra_frame_interval,WORD32 i4_inter_frm_int,UWORD8 * pu1_init_qp,UWORD32 u4_max_vbv_buff_size,WORD32 i4_max_inter_frm_int,WORD32 i4_is_gop_closed,UWORD8 * pu1_min_max_qp,WORD32 i4_use_est_intra_sad,UWORD32 u4_src_ticks,UWORD32 u4_tgt_ticks)213 void irc_initialise_rate_control(rate_control_api_t *ps_rate_control_api,
214 rc_type_e e_rate_control_type,
215 UWORD8 u1_is_mb_level_rc_on,
216 UWORD32 u4_avg_bit_rate,
217 UWORD32 *pu4_peak_bit_rate,
218 UWORD32 u4_min_bit_rate,
219 UWORD32 u4_frame_rate,
220 UWORD32 u4_max_delay,
221 UWORD32 u4_intra_frame_interval,
222 WORD32 i4_inter_frm_int,
223 UWORD8 *pu1_init_qp,
224 UWORD32 u4_max_vbv_buff_size,
225 WORD32 i4_max_inter_frm_int,
226 WORD32 i4_is_gop_closed,
227 UWORD8 *pu1_min_max_qp,
228 WORD32 i4_use_est_intra_sad,
229 UWORD32 u4_src_ticks,
230 UWORD32 u4_tgt_ticks)
231 {
232 WORD32 i;
233 UWORD32 u4_frms_in_delay_prd;
234
235 X_PROD_Y_DIV_Z(u4_frame_rate, u4_max_delay, 1000000, u4_frms_in_delay_prd);
236 ps_rate_control_api->e_rc_type = e_rate_control_type;
237 ps_rate_control_api->u1_is_mb_level_rc_on = u1_is_mb_level_rc_on;
238
239 TRACE_PRINTF((const WORD8*)"RC type = %d\n", e_rate_control_type);
240
241 /* Set the avg_bitrate_changed flag for each pic_type to 0 */
242 for(i = 0; i < MAX_PIC_TYPE; i++)
243 {
244 ps_rate_control_api->au1_avg_bitrate_changed[i] = 0;
245 }
246
247 /* Initialize the pic_handling module */
248 irc_init_pic_handling(ps_rate_control_api->ps_pic_handling,
249 (WORD32)u4_intra_frame_interval,
250 i4_inter_frm_int, i4_max_inter_frm_int,
251 i4_is_gop_closed);
252
253 /*** Initialize the rate control modules ***/
254 if(ps_rate_control_api->e_rc_type != CONST_QP)
255 {
256 UWORD32 au4_num_pics_in_delay_prd[MAX_PIC_TYPE];
257
258 /* Initialize the model parameter structures */
259 for(i = 0; i < MAX_PIC_TYPE; i++)
260 {
261 irc_init_frm_rc_rd_model(ps_rate_control_api->aps_rd_model[i],
262 MAX_FRAMES_MODELLED);
263 }
264
265 /* Initialize the buffer mechanism */
266 if((ps_rate_control_api->e_rc_type == VBR_STORAGE)
267 || (ps_rate_control_api->e_rc_type
268 == VBR_STORAGE_DVD_COMP))
269 {
270 /* Assuming both the peak bit rates are same for a VBR_STORAGE and
271 VBR_STORAGE_DVD_COMP */
272 if(pu4_peak_bit_rate[0] != pu4_peak_bit_rate[1])
273 {
274 TRACE_PRINTF((const WORD8*)"For VBR_STORAGE and VBR_STORAGE_DVD_COMP the peak bit rates should be same\n");
275 }
276 irc_init_vbr_vbv(ps_rate_control_api->ps_vbr_storage_vbv,
277 (WORD32)pu4_peak_bit_rate[0],
278 (WORD32)u4_frame_rate,
279 (WORD32)u4_max_vbv_buff_size);
280 }
281 else if(ps_rate_control_api->e_rc_type == CBR_NLDRC)
282 {
283 UWORD32 u4_avg_bit_rate_copy[MAX_NUM_DRAIN_RATES];
284 for(i = 0; i < MAX_NUM_DRAIN_RATES; i++)
285 {
286 u4_avg_bit_rate_copy[i] = u4_avg_bit_rate;
287 }
288 /* In case of CBR the num pics in delay is ignored */
289 for(i = 0; i < MAX_PIC_TYPE; i++)
290 au4_num_pics_in_delay_prd[i] = 0;
291
292 irc_init_cbr_buffer(ps_rate_control_api->ps_cbr_buffer,
293 u4_max_delay, u4_frame_rate,
294 (WORD32 *)u4_avg_bit_rate_copy,
295 au4_num_pics_in_delay_prd,
296 u4_max_vbv_buff_size);
297 }
298 else if(ps_rate_control_api->e_rc_type == VBR_STREAMING)
299 {
300 irc_init_vbv_str_prms(&ps_rate_control_api->s_vbr_str_prms,
301 u4_intra_frame_interval, u4_src_ticks,
302 u4_tgt_ticks, u4_frms_in_delay_prd);
303
304 /* Get the number of pics of each type in delay period */
305 irc_get_vsp_num_pics_in_dly_prd(
306 &ps_rate_control_api->s_vbr_str_prms,
307 au4_num_pics_in_delay_prd);
308
309 irc_init_cbr_buffer(ps_rate_control_api->ps_cbr_buffer,
310 u4_max_delay, u4_frame_rate,
311 (WORD32 *)pu4_peak_bit_rate,
312 au4_num_pics_in_delay_prd,
313 u4_max_vbv_buff_size);
314 }
315
316 /* Initialize the SAD estimation module */
317 irc_init_est_sad(ps_rate_control_api->ps_est_sad, i4_use_est_intra_sad);
318
319 /* Initialize the bit allocation module according to VBR or CBR */
320 if((ps_rate_control_api->e_rc_type == VBR_STORAGE)
321 || (ps_rate_control_api->e_rc_type == VBR_STREAMING)
322 || (ps_rate_control_api->e_rc_type
323 == VBR_STORAGE_DVD_COMP))
324 {
325 irc_ba_init_bit_allocation(ps_rate_control_api->ps_bit_allocation,
326 ps_rate_control_api->ps_pic_handling,
327 VBR_BIT_ALLOC_PERIOD, u4_avg_bit_rate,
328 u4_frame_rate,
329 (WORD32 *)pu4_peak_bit_rate,
330 u4_min_bit_rate);
331 }
332 else if(ps_rate_control_api->e_rc_type == CBR_NLDRC)
333 {
334 irc_ba_init_bit_allocation(ps_rate_control_api->ps_bit_allocation,
335 ps_rate_control_api->ps_pic_handling,
336 CBR_BIT_ALLOC_PERIOD, u4_avg_bit_rate,
337 u4_frame_rate,
338 (WORD32 *)pu4_peak_bit_rate,
339 u4_min_bit_rate);
340 }
341
342 /*
343 * u1_scd_detected will be initialized to 1 when a Scene change is
344 * detected
345 */
346 ps_rate_control_api->u1_scd_detected = 0;
347 }
348
349 /* Initialize the init_qp */
350 for(i = 0; i < MAX_PIC_TYPE; i++)
351 {
352 ps_rate_control_api->au1_init_qp[i] = pu1_init_qp[i];
353 ps_rate_control_api->au1_prev_frm_qp[i] = pu1_init_qp[i];
354 ps_rate_control_api->au1_min_max_qp[(i << 1)] =
355 pu1_min_max_qp[(i << 1)];
356 ps_rate_control_api->au1_min_max_qp[(i << 1) + 1] = pu1_min_max_qp[(i
357 << 1) + 1];
358 }
359
360 /* Initialize the is_first_frm_encoded */
361 for(i = 0; i < MAX_PIC_TYPE; i++)
362 {
363 ps_rate_control_api->au1_is_first_frm_coded[i] = 0;
364 }
365 ps_rate_control_api->u1_is_first_frm = 1;
366
367 /*
368 * Control flag for delayed impact after a change in peak bitrate has been
369 * made
370 */
371 ps_rate_control_api->u4_frms_in_delay_prd_for_peak_bit_rate_change = 0;
372 for(i = 0; i < MAX_NUM_DRAIN_RATES; i++)
373 {
374 ps_rate_control_api->au4_new_peak_bit_rate[i] = pu4_peak_bit_rate[i];
375 }
376
377 /* Initialize the mb level rate control module */
378 irc_init_mb_level_rc(ps_rate_control_api->ps_mb_rate_control);
379 X_PROD_Y_DIV_Z(u4_avg_bit_rate, 1000, u4_frame_rate,
380 ps_rate_control_api->i4_prev_frm_est_bits);
381
382 ps_rate_control_api->prev_ref_pic_type = I_PIC;
383 }
384
385 /******************************************************************************
386 *Description : calls irc_add_pic_to_stack
387 ******************************************************************************/
irc_add_picture_to_stack(rate_control_api_t * rate_control_api,WORD32 i4_enc_pic_id)388 void irc_add_picture_to_stack(rate_control_api_t *rate_control_api,
389 WORD32 i4_enc_pic_id)
390 {
391 /* Call the routine to add the pic to stack in encode order */
392 irc_add_pic_to_stack(rate_control_api->ps_pic_handling, i4_enc_pic_id);
393 }
394
irc_add_picture_to_stack_re_enc(rate_control_api_t * rate_control_api,WORD32 i4_enc_pic_id,picture_type_e e_pic_type)395 void irc_add_picture_to_stack_re_enc(rate_control_api_t *rate_control_api,
396 WORD32 i4_enc_pic_id,
397 picture_type_e e_pic_type)
398 {
399 /*
400 * In case of a re-encoder, the pics will come in the encode order itself.
401 * So, there is no need to buffer the pics up
402 */
403 irc_add_pic_to_stack_re_enc(rate_control_api->ps_pic_handling,
404 i4_enc_pic_id, e_pic_type);
405 }
406
407 /*******************************************************************************
408 Description : Decides the picture type based on the state
409 ******************************************************************************/
irc_get_picture_details(rate_control_handle rate_control_api,WORD32 * pi4_pic_id,WORD32 * pi4_pic_disp_order_no,picture_type_e * pe_pic_type)410 void irc_get_picture_details(rate_control_handle rate_control_api,
411 WORD32 *pi4_pic_id,
412 WORD32 *pi4_pic_disp_order_no,
413 picture_type_e *pe_pic_type)
414 {
415 /* Call to get the pic_details */
416 irc_get_pic_from_stack(rate_control_api->ps_pic_handling, pi4_pic_id,
417 pi4_pic_disp_order_no, pe_pic_type);
418 }
419
420 /*******************************************************************************
421 * Description : Gets the frame level qp for the given picture type
422 ******************************************************************************/
irc_get_frame_level_qp(rate_control_api_t * ps_rate_control_api,picture_type_e e_pic_type,WORD32 i4_ud_max_bits)423 UWORD8 irc_get_frame_level_qp(rate_control_api_t *ps_rate_control_api,
424 picture_type_e e_pic_type,
425 WORD32 i4_ud_max_bits)
426 {
427 UWORD8 u1_frame_qp, i;
428
429 if((ps_rate_control_api->e_rc_type != VBR_STORAGE)
430 && (ps_rate_control_api->e_rc_type != VBR_STORAGE_DVD_COMP)
431 && (ps_rate_control_api->e_rc_type != CBR_NLDRC)
432 && (ps_rate_control_api->e_rc_type != CONST_QP)
433 && (ps_rate_control_api->e_rc_type != VBR_STREAMING))
434 {
435 TRACE_PRINTF((const WORD8*)(const WORD8*)" Only VBR,NLDRC and CONST QP supported for now \n");
436 return (0);
437 }
438
439 if(ps_rate_control_api->e_rc_type != CONST_QP)
440 {
441 UWORD8 u1_is_first_frm_coded = 1;
442
443 /* Check whether at least one frame of a each picture type gets encoded*/
444 /* Check whether it is an IPP or IPB kind of encoding */
445 if((ps_rate_control_api->au1_is_first_frm_coded[I_PIC]
446 && ps_rate_control_api->au1_is_first_frm_coded[P_PIC])
447 || ((irc_pic_type_get_intra_frame_interval(
448 ps_rate_control_api->ps_pic_handling)
449 == 1)
450 && (ps_rate_control_api->au1_is_first_frm_coded[I_PIC])))
451 {
452 if(e_pic_type != B_PIC)
453 u1_is_first_frm_coded = 1;
454 else
455 {
456 for(i = 0; i < MAX_PIC_TYPE; i++)
457 {
458 u1_is_first_frm_coded &=
459 ps_rate_control_api->au1_is_first_frm_coded[i];
460 }
461 }
462 }
463 else
464 {
465 u1_is_first_frm_coded = 0;
466 }
467
468 if(u1_is_first_frm_coded)
469 {
470 WORD32 i4_cur_est_texture_bits, i4_cur_est_header_bits;
471 WORD32 i4_cur_est_bits;
472 UWORD32 u4_estimated_sad;
473
474 /* Force I frame updation of rem_bits_in_frame*/
475 if(irc_get_forced_I_frame_cur_frm_flag(
476 ps_rate_control_api->ps_pic_handling) == 1)
477 {
478 irc_ba_change_rem_bits_in_prd_at_force_I_frame(
479 ps_rate_control_api->ps_bit_allocation,
480 ps_rate_control_api->ps_pic_handling);
481 irc_reset_forced_I_frame_cur_frm_flag(
482 ps_rate_control_api->ps_pic_handling);
483 }
484
485 /* Get the estimated texture bits allocated for the current frame*/
486 i4_cur_est_texture_bits = irc_ba_get_cur_frm_est_texture_bits(
487 ps_rate_control_api->ps_bit_allocation,
488 ps_rate_control_api->aps_rd_model,
489 ps_rate_control_api->ps_est_sad,
490 ps_rate_control_api->ps_pic_handling, e_pic_type);
491
492 /* Get the estimated header bits*/
493 i4_cur_est_header_bits = irc_ba_get_cur_frm_est_header_bits(
494 ps_rate_control_api->ps_bit_allocation, e_pic_type);
495
496 /* Total estimated bits */
497 i4_cur_est_bits = i4_cur_est_header_bits + i4_cur_est_texture_bits;
498
499 TRACE_PRINTF((const WORD8*)"ft %d, etb = %d, eb %d, ", e_pic_type,
500 i4_cur_est_texture_bits, i4_cur_est_bits);
501
502 /* Threshold the estimated bits based on the buffer fullness*/
503 if(ps_rate_control_api->e_rc_type == VBR_STORAGE)
504 {
505 WORD32 i4_cur_frm_max_bit_possible;
506 i4_cur_frm_max_bit_possible = irc_get_max_target_bits(
507 ps_rate_control_api->ps_vbr_storage_vbv);
508
509 if(i4_cur_est_bits > i4_cur_frm_max_bit_possible)
510 {
511 /* Assuming header would consume the same amount of bits */
512 i4_cur_est_texture_bits = i4_cur_frm_max_bit_possible
513 - i4_cur_est_header_bits;
514 }
515 }
516 else if(ps_rate_control_api->e_rc_type == VBR_STORAGE_DVD_COMP)
517 {
518 WORD32 i4_rem_bits_in_gop, i4_rem_frms_in_gop, i;
519 WORD32 i4_cur_frm_max_bit_possible,
520 ai4_rem_frms_in_gop[MAX_PIC_TYPE];
521 irc_pic_type_get_rem_frms_in_gop(
522 ps_rate_control_api->ps_pic_handling,
523 ai4_rem_frms_in_gop);
524 i4_rem_bits_in_gop = irc_get_rem_bits_in_period(
525 ps_rate_control_api);
526 i4_rem_frms_in_gop = 0;
527 for(i = 0; i < MAX_PIC_TYPE; i++)
528 i4_rem_frms_in_gop += ai4_rem_frms_in_gop[i];
529
530 /* Threshold the bits based on estimated buffer fullness */
531 i4_cur_frm_max_bit_possible = irc_get_max_tgt_bits_dvd_comp(
532 ps_rate_control_api->ps_vbr_storage_vbv,
533 i4_rem_bits_in_gop, i4_rem_frms_in_gop,
534 e_pic_type);
535
536 if(i4_cur_est_bits > i4_cur_frm_max_bit_possible)
537 {
538 /* Assuming header would consume the same amount of bits */
539 i4_cur_est_texture_bits = i4_cur_frm_max_bit_possible
540 - i4_cur_est_header_bits;
541
542 }
543 }
544 else if(ps_rate_control_api->e_rc_type == CBR_NLDRC)
545 {
546 WORD32 i4_cur_frm_bits_acc_buffer =
547 irc_cbr_buffer_constraint_check(
548 ps_rate_control_api->ps_cbr_buffer,
549 i4_cur_est_bits, e_pic_type);
550
551 /* Assuming the header would consume the same amount of bits */
552 i4_cur_est_texture_bits = i4_cur_frm_bits_acc_buffer
553 - i4_cur_est_header_bits;
554
555 }
556 else if(ps_rate_control_api->e_rc_type == VBR_STREAMING)
557 {
558 WORD32 i4_cur_frm_bits_acc_buffer =
559 irc_vbr_stream_buffer_constraint_check(
560 ps_rate_control_api->ps_cbr_buffer,
561 i4_cur_est_bits, e_pic_type);
562
563 /* Assuming the header would consume the same amount of bits */
564 i4_cur_est_texture_bits = i4_cur_frm_bits_acc_buffer
565 - i4_cur_est_header_bits;
566 }
567
568 TRACE_PRINTF((const WORD8*)"emtb = %d, ", i4_cur_est_texture_bits);
569
570 /*
571 * If the estimated texture bits go to values less than zero
572 * due to buffer underflow, make the estimated target bits to go
573 * to zero
574 */
575 if(i4_cur_est_texture_bits < 0)
576 i4_cur_est_texture_bits = 0;
577
578 ps_rate_control_api->i4_prev_frm_est_bits = (i4_cur_est_texture_bits
579 + i4_cur_est_header_bits);
580
581 /* Clip est_texture_bits according to the user-defined max value */
582 if((i4_cur_est_texture_bits
583 > (i4_ud_max_bits - i4_cur_est_header_bits))
584 && (e_pic_type != I_PIC))
585 {
586 i4_cur_est_texture_bits = (i4_ud_max_bits
587 - i4_cur_est_header_bits);
588 TRACE_PRINTF((const WORD8*)"udcb = %d, ",
589 i4_ud_max_bits - i4_cur_est_header_bits);
590 }
591
592 /* Calculate the estimated SAD for corresponding frame*/
593 u4_estimated_sad = irc_get_est_sad(ps_rate_control_api->ps_est_sad,
594 e_pic_type);
595
596 /* Query the model for the Qp for the corresponding frame*/
597
598 /*
599 * The check is because the model gives a negative QP when the
600 * i4_cur_est_texture_bits is less than or equal to 0
601 * [This is a bug in the model]. As a temporary fix, the frame QP
602 * is being set to the max QP allowed
603 */
604 if(i4_cur_est_texture_bits > 0)
605 {
606 u1_frame_qp = irc_find_qp_for_target_bits(
607 ps_rate_control_api->aps_rd_model[e_pic_type],
608 i4_cur_est_texture_bits,
609 u4_estimated_sad,
610 ps_rate_control_api->au1_min_max_qp[(e_pic_type
611 << 1)],
612 ps_rate_control_api->au1_min_max_qp[(e_pic_type
613 << 1) + 1]);
614 }
615 else
616 {
617 u1_frame_qp = ps_rate_control_api->au1_min_max_qp[(e_pic_type
618 << 1) + 1];
619 }
620
621 TRACE_PRINTF((const WORD8*)"ehb %d, etb %d, fqp %d, es %d, eb %d, ",
622 i4_cur_est_header_bits, i4_cur_est_texture_bits,
623 u1_frame_qp, u4_estimated_sad, i4_cur_est_bits);
624
625 /* Restricting the QP swing if the average bit rate has changed */
626 if(ps_rate_control_api->au1_avg_bitrate_changed[e_pic_type] == 0)
627 {
628 WORD32 prev_qp;
629 WORD32 hi_dev_qp, lo_dev_qp;
630 /* Restricting the qp swing */
631 prev_qp = ps_rate_control_api->au1_prev_frm_qp[ps_rate_control_api->prev_ref_pic_type];
632
633 if(ps_rate_control_api->prev_ref_pic_type != e_pic_type)
634 {
635 if(e_pic_type == I_PIC)
636 {
637 /*
638 * Constrain I-frame QP to be within specified limit of
639 * prev_ref_qp/Kp
640 */
641 prev_qp = (P_TO_I_RATIO * prev_qp + (1 << (K_Q - 1)))
642 >> (K_Q);
643 }
644 else if(e_pic_type == P_PIC)
645 {
646 /*
647 * Constrain P-frame QP to be within specified limit of
648 * Kp*prev_ref_qp
649 */
650 prev_qp = (I_TO_P_RATIO * prev_qp + (1 << (K_Q - 1)))
651 >> (K_Q);
652 }
653 else if(ps_rate_control_api->prev_ref_pic_type == P_PIC)
654 {
655 /* current frame is B-pic */
656 /* Constrain B-frame QP to be within specified limit of
657 * prev_ref_qp/Kb
658 */
659 prev_qp = (P_TO_B_RATIO * prev_qp + (1 << (K_Q - 1)))
660 >> (K_Q);
661 }
662 else /* if(ps_rate_control_api->prev_ref_pic_type == I_PIC*/
663 {
664 /* current frame is B-pic */
665 /*
666 * Constrain B-frame QP to be within specified limit of
667 * prev_ref_qp/Kb
668 */
669 prev_qp = (P_TO_B_RATIO * I_TO_P_RATIO * prev_qp
670 + (1 << (K_Q + K_Q - 1)))
671 >> (K_Q + K_Q);
672 }
673 }
674
675 /*
676 * Due to the inexact nature of translation tables, QP may
677 * get locked at some values. This is because of the inexactness of
678 * the tables causing a change of +-1 in back and forth translations.
679 * In that case, if we restrict the QP swing to +-1, we will get
680 * the lock up condition. Hence we make it such that we will have
681 * a swing of atleast +- 2 from prev_qp
682 */
683
684 lo_dev_qp = GET_LO_DEV_QP(prev_qp);
685 lo_dev_qp = MIN(lo_dev_qp, prev_qp - 2);
686 lo_dev_qp = MAX(lo_dev_qp, ps_rate_control_api->au1_min_max_qp[(e_pic_type << 1)]);
687
688 hi_dev_qp = GET_HI_DEV_QP(prev_qp);
689 hi_dev_qp = MAX(hi_dev_qp, prev_qp + 2);
690 hi_dev_qp = MIN(hi_dev_qp, ps_rate_control_api->au1_min_max_qp[(e_pic_type << 1) + 1]);
691
692 u1_frame_qp = (UWORD8)CLIP_QP((WORD32)u1_frame_qp, hi_dev_qp , lo_dev_qp);
693
694 }
695 else
696 {
697 ps_rate_control_api->au1_avg_bitrate_changed[e_pic_type] = 0;
698 }
699 }
700 else
701 {
702 /*
703 * The u1_is_first_frm_coded gets reset
704 * a) at start of sequence
705 * b) whenever there is a scene change.
706 * In both cases since we do not have any estimate about the
707 * current frame, we just send in the previous frame qp value.IN
708 * Scene change case the previous QP is incremented by 4 , This is
709 * done because the Scene changed VOP will have over consumed and
710 * chances of future frames skipping is very high. For the init
711 * case, the previous frame QP is initialized with the init qp
712 */
713 if((ps_rate_control_api->u1_scd_detected)
714 && (ps_rate_control_api->e_rc_type != CONST_QP))
715 {
716 /*
717 * If scene change is detected, I frame Qp would have been
718 * updated
719 */
720 /* Use a QP calculated in the prev update fxn */
721 u1_frame_qp = ps_rate_control_api->u1_frm_qp_after_scd;
722 }
723 else
724 {
725 u1_frame_qp = ps_rate_control_api->au1_prev_frm_qp[e_pic_type];
726 }
727 }
728 }
729 else
730 {
731 u1_frame_qp = ps_rate_control_api->au1_init_qp[e_pic_type];
732 }
733
734 TRACE_PRINTF((const WORD8*)"fqp %d\n", u1_frame_qp);
735
736 return (u1_frame_qp);
737 }
738
739 /*******************************************************************************
740 *Function Name : irc_get_buffer_status
741 *Description : Gets the state of VBV buffer
742 *Outputs : 0 = normal, 1 = underflow, 2= overflow
743 *Returns : vbv_buf_status_e
744 ******************************************************************************/
irc_get_buffer_status(rate_control_api_t * ps_rate_control_api,WORD32 i4_total_frame_bits,picture_type_e e_pic_type,WORD32 * pi4_num_bits_to_prevent_vbv_underflow)745 vbv_buf_status_e irc_get_buffer_status(rate_control_api_t *ps_rate_control_api,
746 WORD32 i4_total_frame_bits,
747 picture_type_e e_pic_type,
748 WORD32 *pi4_num_bits_to_prevent_vbv_underflow)
749 {
750 vbv_buf_status_e e_buf_status = VBV_NORMAL;
751
752 /* Get the buffer status for the current total consumed bits and error bits*/
753 if(ps_rate_control_api->e_rc_type == VBR_STORAGE_DVD_COMP)
754 {
755 e_buf_status = irc_get_vbv_buffer_status(
756 ps_rate_control_api->ps_vbr_storage_vbv,
757 i4_total_frame_bits,
758 pi4_num_bits_to_prevent_vbv_underflow);
759
760 TRACE_PRINTF((const WORD8*)"e_buf_status = %d\n", e_buf_status);
761 }
762 else if(ps_rate_control_api->e_rc_type == VBR_STORAGE)
763 {
764 /* For VBR case since there is not underflow returning the max value */
765 pi4_num_bits_to_prevent_vbv_underflow[0] = irc_get_max_vbv_buf_size(
766 ps_rate_control_api->ps_vbr_storage_vbv);
767 e_buf_status = VBV_NORMAL;
768 }
769 else if(ps_rate_control_api->e_rc_type == CBR_NLDRC)
770 {
771 e_buf_status = irc_get_cbr_buffer_status(
772 ps_rate_control_api->ps_cbr_buffer, i4_total_frame_bits,
773 pi4_num_bits_to_prevent_vbv_underflow, e_pic_type);
774
775 }
776 else if(ps_rate_control_api->e_rc_type == VBR_STREAMING)
777 {
778 /* For VBR_streaming, error bits are computed according to peak bitrate*/
779 e_buf_status = irc_get_cbr_buffer_status(
780 ps_rate_control_api->ps_cbr_buffer, i4_total_frame_bits,
781 pi4_num_bits_to_prevent_vbv_underflow, e_pic_type);
782 }
783 return e_buf_status;
784 }
785
786 /*******************************************************************************
787 Function Name : irc_update_pic_handling_state
788 Description : If the forward path and the backward path of rate control
789 ******************************************************************************/
irc_update_pic_handling_state(rate_control_api_t * ps_rate_control_api,picture_type_e e_pic_type)790 void irc_update_pic_handling_state(rate_control_api_t *ps_rate_control_api,
791 picture_type_e e_pic_type)
792 {
793 irc_update_pic_handling(ps_rate_control_api->ps_pic_handling, e_pic_type);
794 }
795
796 /******************************************************************************
797 Function Name : irc_update_frame_level_info
798 Description : Updates the frame level information into the rate control
799 structure
800 ******************************************************************************/
irc_update_frame_level_info(rate_control_api_t * ps_rate_control_api,picture_type_e e_pic_type,WORD32 * pi4_mb_type_sad,WORD32 i4_total_frame_bits,WORD32 i4_model_updation_hdr_bits,WORD32 * pi4_mb_type_tex_bits,WORD32 * pi4_tot_mb_type_qp,WORD32 * pi4_tot_mb_in_type,WORD32 i4_avg_activity,UWORD8 u1_is_scd,WORD32 i4_is_it_a_skip,WORD32 i4_intra_frm_cost,WORD32 i4_is_pic_handling_done)801 void irc_update_frame_level_info(rate_control_api_t *ps_rate_control_api,
802 picture_type_e e_pic_type,
803 WORD32 *pi4_mb_type_sad,
804 WORD32 i4_total_frame_bits,
805 WORD32 i4_model_updation_hdr_bits,
806 WORD32 *pi4_mb_type_tex_bits,
807 WORD32 *pi4_tot_mb_type_qp,
808 WORD32 *pi4_tot_mb_in_type,
809 WORD32 i4_avg_activity,
810 UWORD8 u1_is_scd,
811 WORD32 i4_is_it_a_skip,
812 WORD32 i4_intra_frm_cost,
813 WORD32 i4_is_pic_handling_done)
814 {
815 UWORD8 u1_num_skips = 0;
816 WORD32 i;
817 UWORD32 u4_frame_sad = 0;
818 WORD32 i4_tot_texture_bits = 0;
819 WORD32 i4_tot_mbs = 0;
820 WORD32 i4_avg_qp = 0;
821
822 /* SCD not supported in case of IPB encoder */
823 if(u1_is_scd && (irc_pic_type_get_inter_frame_interval(
824 ps_rate_control_api->ps_pic_handling) > 1))
825 {
826 u1_is_scd = 0;
827 }
828
829 /* For frames that contain plane areas that differ from reference frames, encoder
830 * might generate more INTRA MBs because of lower SAD compared with INTER MBs.
831 * Such cases should not be treated as scene change.
832 * For such frames bits consumed will be lesser than the allocated bits.
833 */
834 if(i4_total_frame_bits < ps_rate_control_api->i4_prev_frm_est_bits)
835 {
836 u1_is_scd = 0;
837 }
838 TRACE_PRINTF((const WORD8*)"i4_total_frame_bits %d\n", i4_total_frame_bits);
839
840 if(!i4_is_it_a_skip && !i4_is_pic_handling_done)
841 {
842 /* Update the pic_handling struct */
843 irc_update_pic_handling(ps_rate_control_api->ps_pic_handling,
844 e_pic_type);
845 }
846
847 if(ps_rate_control_api->e_rc_type != CONST_QP)
848 {
849 if(!i4_is_it_a_skip)
850 {
851 WORD32 i4_new_period_flag;
852 /******************************************************************
853 Calculate the total values from the individual values
854 ******************************************************************/
855 for(i = 0; i < MAX_MB_TYPE; i++)
856 u4_frame_sad += pi4_mb_type_sad[i];
857 for(i = 0; i < MAX_MB_TYPE; i++)
858 i4_tot_texture_bits += pi4_mb_type_tex_bits[i];
859 for(i = 0; i < MAX_MB_TYPE; i++)
860 i4_avg_qp += pi4_tot_mb_type_qp[i];
861 for(i = 0; i < MAX_MB_TYPE; i++)
862 i4_tot_mbs += pi4_tot_mb_in_type[i];
863 i4_avg_qp /= i4_tot_mbs; /* Calculate the average QP */
864
865 if(ps_rate_control_api->u1_is_mb_level_rc_on)
866 {
867 /*
868 * The model needs to take into consideration the average
869 * activity of the entire frame while estimating the QP. Thus
870 * the frame sad values are scaled by the average activity
871 * before updating it into the model.
872 */
873 if(!i4_avg_activity)
874 i4_avg_activity = 1;
875 i4_intra_frm_cost *= i4_avg_activity;
876 u4_frame_sad *= i4_avg_activity;
877 }
878
879 /******************************************************************
880 Update the bit allocation module
881 NOTE: For bit allocation module, the pic_type should not be
882 modified to that of 'I', in case of a SCD.
883 ******************************************************************/
884 i4_new_period_flag = irc_is_last_frame_in_gop(
885 ps_rate_control_api->ps_pic_handling);
886 irc_ba_update_cur_frm_consumed_bits(
887 ps_rate_control_api->ps_bit_allocation,
888 ps_rate_control_api->ps_pic_handling,
889 i4_total_frame_bits, i4_model_updation_hdr_bits,
890 e_pic_type, u1_is_scd, i4_new_period_flag);
891
892 if(1 == i4_new_period_flag
893 && ((ps_rate_control_api->e_rc_type == VBR_STORAGE)
894 || (ps_rate_control_api->e_rc_type
895 == VBR_STORAGE_DVD_COMP)))
896 {
897 irc_ba_check_and_update_bit_allocation(
898 ps_rate_control_api->ps_bit_allocation,
899 ps_rate_control_api->ps_pic_handling,
900 irc_get_cur_vbv_buf_size(
901 ps_rate_control_api->ps_vbr_storage_vbv),
902 irc_get_max_vbv_buf_size(
903 ps_rate_control_api->ps_vbr_storage_vbv),
904 irc_get_max_bits_per_tgt_frm(
905 ps_rate_control_api->ps_vbr_storage_vbv),
906 i4_total_frame_bits);
907 }
908 }
909
910 /**********************************************************************
911 Update the buffer status
912 *********************************************************************/
913 /*
914 * This update is done after overflow and underflow handling to
915 * account for the actual bits dumped
916 */
917 if((ps_rate_control_api->e_rc_type == VBR_STORAGE)
918 || (ps_rate_control_api->e_rc_type
919 == VBR_STORAGE_DVD_COMP))
920 {
921 irc_update_vbr_vbv(ps_rate_control_api->ps_vbr_storage_vbv,
922 i4_total_frame_bits);
923 }
924 else if(ps_rate_control_api->e_rc_type == CBR_NLDRC)
925 {
926 irc_update_cbr_buffer(ps_rate_control_api->ps_cbr_buffer,
927 i4_total_frame_bits, e_pic_type);
928 }
929 else if(ps_rate_control_api->e_rc_type == VBR_STREAMING)
930 {
931 UWORD32 au4_num_pics_in_delay_prd[MAX_PIC_TYPE];
932
933 irc_get_vsp_num_pics_in_dly_prd(
934 &ps_rate_control_api->s_vbr_str_prms,
935 au4_num_pics_in_delay_prd);
936
937 irc_update_cbr_buffer(ps_rate_control_api->ps_cbr_buffer,
938 i4_total_frame_bits, e_pic_type);
939
940 irc_update_vbr_str_prms(&ps_rate_control_api->s_vbr_str_prms,
941 e_pic_type);
942
943 irc_change_cbr_vbv_num_pics_in_delay_period(
944 ps_rate_control_api->ps_cbr_buffer,
945 au4_num_pics_in_delay_prd);
946
947 /*
948 * If the change_in_peak_bitrate flag is set, after the delay period
949 * update the peak_bitrate and the buffer parameters
950 */
951 if(!ps_rate_control_api->u4_frms_in_delay_prd_for_peak_bit_rate_change)
952 {
953 irc_ba_change_ba_peak_bit_rate(
954 ps_rate_control_api->ps_bit_allocation,
955 (WORD32 *)&ps_rate_control_api->au4_new_peak_bit_rate[0]);
956 irc_change_cbr_vbv_bit_rate(
957 ps_rate_control_api->ps_cbr_buffer,
958 (WORD32 *)&ps_rate_control_api->au4_new_peak_bit_rate[0]);
959 }
960 if(ps_rate_control_api->u4_frms_in_delay_prd_for_peak_bit_rate_change)
961 ps_rate_control_api->u4_frms_in_delay_prd_for_peak_bit_rate_change--;
962 }
963
964 if(!i4_is_it_a_skip)
965 {
966 /*******************************************************************
967 Handle the SCENE CHANGE DETECTED
968 1) Make the picture type as I, so that updation happens as if it is
969 an I frame
970 2) Reset model, SAD and flag to restart the estimation process
971 ******************************************************************/
972 if(u1_is_scd)
973 {
974 WORD32 i4_frm_qp_after_scd;
975 UWORD32 u4_prev_I_frm_sad;
976
977 e_pic_type = I_PIC;
978
979 /* Scale scd qp based on SCD Frm sad and previous I Frm sad */
980 /* frm_qp_after_scd = (avg_qp * cur_frm_sad)/prev_I_frm_sad */
981
982 /*
983 * QP for the next frame should take care of
984 * 1) due to scene change, the current picture has consumed more
985 * bits
986 * 2) relative complexity of the previous scene and the current
987 * scene
988 */
989
990 /* Get the intra SAD for the previous scene */
991 u4_prev_I_frm_sad = irc_get_est_sad(
992 ps_rate_control_api->ps_est_sad, I_PIC);
993
994 /*
995 * Scale the QP based on the SAD ratio of the current pic and
996 * previous scene intra SAD
997 */
998 X_PROD_Y_DIV_Z(i4_avg_qp, u4_frame_sad, u4_prev_I_frm_sad,
999 i4_frm_qp_after_scd);
1000
1001 /* Limit the next frame qp by 50% across both the sides */
1002 if(i4_frm_qp_after_scd > ((i4_avg_qp * 3) >> 1))
1003 {
1004 i4_frm_qp_after_scd = (i4_avg_qp * 3) >> 1;
1005 }
1006 else if(i4_frm_qp_after_scd < (i4_avg_qp >> 1))
1007 {
1008 i4_frm_qp_after_scd = (i4_avg_qp >> 1);
1009 }
1010
1011 /*
1012 * Ensure that the next frame QP is within the min_max limit of
1013 * QP allowed
1014 */
1015 if(i4_frm_qp_after_scd
1016 > ps_rate_control_api->au1_min_max_qp[(e_pic_type
1017 << 1) + 1])
1018 {
1019 i4_frm_qp_after_scd =
1020 ps_rate_control_api->au1_min_max_qp[(e_pic_type
1021 << 1) + 1];
1022 }
1023 else if(i4_frm_qp_after_scd
1024 < ps_rate_control_api->au1_min_max_qp[(e_pic_type
1025 << 1)])
1026 {
1027 i4_frm_qp_after_scd =
1028 ps_rate_control_api->au1_min_max_qp[(e_pic_type
1029 << 1)];
1030 }
1031
1032 /* Update the state var */
1033 ps_rate_control_api->u1_frm_qp_after_scd =
1034 (UWORD8)i4_frm_qp_after_scd;
1035
1036 /* re-set model */
1037 for(i = 0; i < MAX_PIC_TYPE; i++)
1038 {
1039 irc_reset_frm_rc_rd_model(
1040 ps_rate_control_api->aps_rd_model[i]);
1041 }
1042
1043 /* Reset the SAD estimation module */
1044 irc_reset_est_sad(ps_rate_control_api->ps_est_sad);
1045
1046 /* Reset flag */
1047 for(i = 0; i < MAX_PIC_TYPE; i++)
1048 {
1049 ps_rate_control_api->au1_is_first_frm_coded[i] = 0;
1050 }
1051
1052 /* Reset the MB Rate control */
1053 irc_init_mb_level_rc(ps_rate_control_api->ps_mb_rate_control);
1054
1055 /*Set u1_scd_detected flag*/
1056 ps_rate_control_api->u1_scd_detected = 1;
1057
1058 /*
1059 * Adjust the average QP for the frame based on bits
1060 * consumption
1061 */
1062 /*
1063 * Initialize the QP for each picture type according to the
1064 * average QP of the SCD pic
1065 */
1066 ps_rate_control_api->au1_prev_frm_qp[I_PIC] = (UWORD8)i4_avg_qp;
1067
1068 TRACE_PRINTF((const WORD8*)"SCD DETECTED\n");
1069 }
1070 else
1071 {
1072 ps_rate_control_api->u1_scd_detected = 0;
1073 /**************************************************************
1074 Update the Qp used by the current frame
1075 **************************************************************/
1076 ps_rate_control_api->au1_prev_frm_qp[e_pic_type] =
1077 (UWORD8)i4_avg_qp;
1078 }
1079
1080 /********************************************************************
1081 Update the model of the correponding picture type
1082 NOTE: For SCD, we force the frame type from 'P' to that of a 'I'
1083 ******************************************************************/
1084 /*
1085 * For very simple sequences no bits are consumed by texture. These
1086 * frames do not add any information to the model and so not added
1087 */
1088 if(i4_tot_texture_bits && u4_frame_sad)
1089 {
1090 irc_add_frame_to_rd_model(
1091 ps_rate_control_api->aps_rd_model[e_pic_type],
1092 i4_tot_texture_bits, (UWORD8)i4_avg_qp,
1093 u4_frame_sad, u1_num_skips);
1094
1095 /*
1096 * At least one proper frame in added into the model. Until that
1097 * keep using the initial QP
1098 */
1099 ps_rate_control_api->au1_is_first_frm_coded[e_pic_type] = 1;
1100 }
1101
1102 if(i4_avg_activity)
1103 {
1104 /* Update the mb_level model */
1105 irc_mb_update_frame_level(
1106 ps_rate_control_api->ps_mb_rate_control,
1107 i4_avg_activity);
1108 }
1109
1110 /******************************************************************
1111 Update the sad estimation module
1112 NOTE: For SCD, we force the frame type from 'P' to that of a 'I'
1113 ******************************************************************/
1114 if(u4_frame_sad)
1115 {
1116 irc_update_actual_sad(ps_rate_control_api->ps_est_sad,
1117 u4_frame_sad, e_pic_type);
1118
1119 irc_update_actual_sad_for_intra(ps_rate_control_api->ps_est_sad,
1120 i4_intra_frm_cost);
1121 }
1122
1123 /*
1124 * Update the variable which denotes that a frame has been
1125 * encountered
1126 */
1127 ps_rate_control_api->u1_is_first_frm = 0;
1128
1129 }
1130 }
1131
1132 /* Store the prev encoded picture type for restricting Qp swing */
1133 if((e_pic_type == I_PIC) || (e_pic_type == P_PIC))
1134 {
1135 ps_rate_control_api->prev_ref_pic_type = e_pic_type;
1136 }
1137
1138 TRACE_PRINTF((const WORD8*)"ft %d,hb %d,tb %d,qp %d,fs %d\n", e_pic_type,
1139 i4_model_updation_hdr_bits, i4_tot_texture_bits, i4_avg_qp,
1140 u4_frame_sad);
1141
1142 return;
1143 }
1144
1145 /*******************************************************************************
1146 MB Level API functions
1147 ******************************************************************************/
1148
1149 /******************************************************************************
1150 Function Name : irc_init_mb_rc_frame_level
1151 Description : Initialise the frame level details required for a mb level
1152 ******************************************************************************/
1153
irc_init_mb_rc_frame_level(rate_control_api_t * ps_rate_control_api,UWORD8 u1_frame_qp)1154 void irc_init_mb_rc_frame_level(rate_control_api_t *ps_rate_control_api,
1155 UWORD8 u1_frame_qp)
1156 {
1157 irc_mb_init_frame_level(ps_rate_control_api->ps_mb_rate_control,
1158 u1_frame_qp);
1159 }
1160
1161 /******************************************************************************
1162 Function Name : irc_get_mb_level_qp
1163 Description : Get the mb level qp
1164 *****************************************************************************/
irc_get_mb_level_qp(rate_control_api_t * ps_rate_control_api,WORD32 i4_cur_mb_activity,WORD32 * pi4_mb_qp,picture_type_e e_pic_type)1165 void irc_get_mb_level_qp(rate_control_api_t *ps_rate_control_api,
1166 WORD32 i4_cur_mb_activity,
1167 WORD32 *pi4_mb_qp,
1168 picture_type_e e_pic_type)
1169 {
1170 if(ps_rate_control_api->u1_is_mb_level_rc_on)
1171 {
1172 irc_get_mb_qp(ps_rate_control_api->ps_mb_rate_control,
1173 i4_cur_mb_activity, pi4_mb_qp);
1174
1175 /* Truncating the QP to the Max and Min Qp values possible */
1176 if(pi4_mb_qp[1] < ps_rate_control_api->au1_min_max_qp[e_pic_type << 1])
1177 {
1178 pi4_mb_qp[1] = ps_rate_control_api->au1_min_max_qp[e_pic_type << 1];
1179 }
1180 if(pi4_mb_qp[1]
1181 > ps_rate_control_api->au1_min_max_qp[(e_pic_type << 1)
1182 + 1])
1183 {
1184 pi4_mb_qp[1] = ps_rate_control_api->au1_min_max_qp[(e_pic_type << 1)
1185 + 1];
1186 }
1187 }
1188 else
1189 {
1190 WORD32 i4_qp;
1191 i4_qp = irc_get_frm_level_qp(ps_rate_control_api->ps_mb_rate_control);
1192 /* Both the qp are used for */
1193 pi4_mb_qp[0] = i4_qp; /* Used as feedback for the rate control */
1194 pi4_mb_qp[1] = i4_qp; /* Used for quantising the MB*/
1195 }
1196 }
1197
1198 /****************************************************************************
1199 Function Name : irc_get_bits_to_stuff
1200 Description : Gets the bits to stuff to prevent Underflow of Encoder Buffer
1201 *****************************************************************************/
irc_get_bits_to_stuff(rate_control_api_t * ps_rate_control_api,WORD32 i4_tot_consumed_bits,picture_type_e e_pic_type)1202 WORD32 irc_get_bits_to_stuff(rate_control_api_t *ps_rate_control_api,
1203 WORD32 i4_tot_consumed_bits,
1204 picture_type_e e_pic_type)
1205 {
1206 WORD32 i4_bits_to_stuff;
1207 /* Get the CBR bits to stuff*/
1208 i4_bits_to_stuff = irc_get_cbr_bits_to_stuff(
1209 ps_rate_control_api->ps_cbr_buffer, i4_tot_consumed_bits,
1210 e_pic_type);
1211 return i4_bits_to_stuff;
1212 }
1213
1214 /****************************************************************************
1215 Function Name : irc_get_prev_frm_est_bits
1216 Description : Returns previous frame estimated bits
1217 *****************************************************************************/
irc_get_prev_frm_est_bits(rate_control_api_t * ps_rate_control_api)1218 WORD32 irc_get_prev_frm_est_bits(rate_control_api_t *ps_rate_control_api)
1219 {
1220 return (ps_rate_control_api->i4_prev_frm_est_bits);
1221 }
1222
1223 /******************************************************************************
1224 Control Level API functions
1225 Logic: The control call sets the state structure of the rate control api
1226 accordingly such that the next process call would implement the same.
1227 ******************************************************************************/
1228
irc_change_inter_frm_int_call(rate_control_api_t * ps_rate_control_api,WORD32 i4_inter_frm_int)1229 void irc_change_inter_frm_int_call(rate_control_api_t *ps_rate_control_api,
1230 WORD32 i4_inter_frm_int)
1231 {
1232 irc_pic_handling_register_new_inter_frm_interval(
1233 ps_rate_control_api->ps_pic_handling, i4_inter_frm_int);
1234 }
1235
irc_change_intra_frm_int_call(rate_control_api_t * ps_rate_control_api,WORD32 i4_intra_frm_int)1236 void irc_change_intra_frm_int_call(rate_control_api_t *ps_rate_control_api,
1237 WORD32 i4_intra_frm_int)
1238 {
1239 irc_pic_handling_register_new_int_frm_interval(
1240 ps_rate_control_api->ps_pic_handling, i4_intra_frm_int);
1241
1242 if(ps_rate_control_api->e_rc_type == VBR_STREAMING)
1243 {
1244 irc_change_vsp_ifi(&ps_rate_control_api->s_vbr_str_prms,
1245 i4_intra_frm_int);
1246 }
1247 }
1248
1249 /****************************************************************************
1250 Function Name : irc_change_avg_bit_rate
1251 Description : Whenever the average bit rate changes, the excess bits is
1252 between the changed bit rate and the old one is re-distributed
1253 in the bit allocation module
1254 *****************************************************************************/
irc_change_avg_bit_rate(rate_control_api_t * ps_rate_control_api,UWORD32 u4_average_bit_rate)1255 void irc_change_avg_bit_rate(rate_control_api_t *ps_rate_control_api,
1256 UWORD32 u4_average_bit_rate)
1257 {
1258 int i;
1259 if(ps_rate_control_api->e_rc_type != CONST_QP)
1260 {
1261 /*
1262 * Bit Allocation Module: distribute the excess/deficit bits between the
1263 * old and the new frame rate to all the remaining frames
1264 */
1265 irc_ba_change_remaining_bits_in_period(
1266 ps_rate_control_api->ps_bit_allocation,
1267 ps_rate_control_api->ps_pic_handling,
1268 u4_average_bit_rate,
1269 irc_ba_get_frame_rate(
1270 ps_rate_control_api->ps_bit_allocation),
1271 (WORD32 *)(ps_rate_control_api->au4_new_peak_bit_rate));
1272 }
1273 if(ps_rate_control_api->e_rc_type == CBR_NLDRC)
1274 {
1275 UWORD32 u4_average_bit_rate_copy[MAX_NUM_DRAIN_RATES];
1276 for(i = 0; i < MAX_NUM_DRAIN_RATES; i++)
1277 {
1278 u4_average_bit_rate_copy[i] = u4_average_bit_rate;
1279 }
1280 irc_change_cbr_vbv_bit_rate(ps_rate_control_api->ps_cbr_buffer,
1281 (WORD32 *)(u4_average_bit_rate_copy));
1282 }
1283
1284 /*
1285 * This is done only for average bitrate changing somewhere after the model
1286 * stabilizes.Here it is assumed that user will not do this call after
1287 * first few frames. If we dont have this check, what would happen is since
1288 * the model has not stabilized, also bitrate has changed before the first
1289 * frame, we dont restrict the qp. Qp can go to very bad values after init
1290 * qp since if swing is disabled.
1291 * This check will become buggy if change bitrate is called say somewhere
1292 * after first two frames.Bottom line - RC init is done during create and
1293 * this call is done just before first process.And we want to differentiate
1294 * between this call done before first process and the call which is done
1295 * during run time
1296 */
1297 if(ps_rate_control_api->u1_is_first_frm == 0)
1298 {
1299 for(i = 0; i < MAX_PIC_TYPE; i++)
1300 {
1301 ps_rate_control_api->au1_avg_bitrate_changed[i] = 1;
1302 }
1303 }
1304 }
1305
1306 /****************************************************************************
1307 Function Name : irc_change_frame_rate
1308 Description : Does the necessary changes whenever there is a change in
1309 frame rate
1310 *****************************************************************************/
irc_change_frame_rate(rate_control_api_t * ps_rate_control_api,UWORD32 u4_frame_rate,UWORD32 u4_src_ticks,UWORD32 u4_tgt_ticks)1311 void irc_change_frame_rate(rate_control_api_t *ps_rate_control_api,
1312 UWORD32 u4_frame_rate,
1313 UWORD32 u4_src_ticks,
1314 UWORD32 u4_tgt_ticks)
1315 {
1316
1317 if(ps_rate_control_api->e_rc_type != CONST_QP)
1318 {
1319 UWORD32 u4_frms_in_delay_prd = ((u4_frame_rate
1320 * irc_get_cbr_buffer_delay(
1321 ps_rate_control_api->ps_cbr_buffer))
1322 / 1000000);
1323 if((ps_rate_control_api->e_rc_type == VBR_STORAGE)
1324 || (ps_rate_control_api->e_rc_type
1325 == VBR_STORAGE_DVD_COMP))
1326 {
1327 irc_change_vbr_vbv_frame_rate(
1328 ps_rate_control_api->ps_vbr_storage_vbv,
1329 u4_frame_rate);
1330 }
1331 else if(ps_rate_control_api->e_rc_type == CBR_NLDRC)
1332 {
1333 irc_change_cbr_vbv_tgt_frame_rate(
1334 ps_rate_control_api->ps_cbr_buffer, u4_frame_rate);
1335 }
1336 else if(ps_rate_control_api->e_rc_type == VBR_STREAMING)
1337 {
1338 UWORD32 au4_num_pics_in_delay_prd[MAX_PIC_TYPE];
1339 irc_change_vsp_tgt_ticks(&ps_rate_control_api->s_vbr_str_prms,
1340 u4_tgt_ticks);
1341 irc_change_vsp_src_ticks(&ps_rate_control_api->s_vbr_str_prms,
1342 u4_src_ticks);
1343 irc_change_vsp_fidp(&ps_rate_control_api->s_vbr_str_prms,
1344 u4_frms_in_delay_prd);
1345
1346 irc_get_vsp_num_pics_in_dly_prd(
1347 &ps_rate_control_api->s_vbr_str_prms,
1348 au4_num_pics_in_delay_prd);
1349 irc_change_cbr_vbv_tgt_frame_rate(
1350 ps_rate_control_api->ps_cbr_buffer, u4_frame_rate);
1351 irc_change_cbr_vbv_num_pics_in_delay_period(
1352 ps_rate_control_api->ps_cbr_buffer,
1353 au4_num_pics_in_delay_prd);
1354 }
1355
1356 /*
1357 * Bit Allocation Module: distribute the excess/deficit bits between the
1358 * old and the new frame rate to all the remaining frames
1359 */
1360 irc_ba_change_remaining_bits_in_period(
1361 ps_rate_control_api->ps_bit_allocation,
1362 ps_rate_control_api->ps_pic_handling,
1363 irc_ba_get_bit_rate(
1364 ps_rate_control_api->ps_bit_allocation),
1365 u4_frame_rate,
1366 (WORD32 *)(ps_rate_control_api->au4_new_peak_bit_rate));
1367 }
1368 }
1369
1370 /****************************************************************************
1371 Function Name : irc_change_frm_rate_for_bit_alloc
1372 Description : Does the necessary changes only in the bit_allocation module
1373 there is a change in frame rate
1374 *****************************************************************************/
irc_change_frm_rate_for_bit_alloc(rate_control_api_t * ps_rate_control_api,UWORD32 u4_frame_rate)1375 void irc_change_frm_rate_for_bit_alloc(rate_control_api_t *ps_rate_control_api,
1376 UWORD32 u4_frame_rate)
1377 {
1378
1379 if(ps_rate_control_api->e_rc_type != CONST_QP)
1380 {
1381 /*
1382 * Bit Allocation Module: distribute the excess/deficit bits between the
1383 * old and the new frame rate to all the remaining frames
1384 */
1385 irc_ba_change_remaining_bits_in_period(
1386 ps_rate_control_api->ps_bit_allocation,
1387 ps_rate_control_api->ps_pic_handling,
1388 irc_ba_get_bit_rate(
1389 ps_rate_control_api->ps_bit_allocation),
1390 u4_frame_rate,
1391 (WORD32 *)(ps_rate_control_api->au4_new_peak_bit_rate));
1392
1393 if(ps_rate_control_api->e_rc_type == VBR_STORAGE
1394 || ps_rate_control_api->e_rc_type
1395 == VBR_STORAGE_DVD_COMP)
1396 {
1397 irc_change_vbr_max_bits_per_tgt_frm(
1398 ps_rate_control_api->ps_vbr_storage_vbv,
1399 u4_frame_rate);
1400 }
1401 }
1402 }
1403
irc_change_init_qp(rate_control_api_t * ps_rate_control_api,UWORD8 * pu1_init_qp)1404 void irc_change_init_qp(rate_control_api_t *ps_rate_control_api,
1405 UWORD8 *pu1_init_qp)
1406 {
1407 WORD32 i;
1408 /* Initialize the init_qp */
1409 for(i = 0; i < MAX_PIC_TYPE; i++)
1410 {
1411 ps_rate_control_api->au1_init_qp[i] = pu1_init_qp[i];
1412 ps_rate_control_api->au1_prev_frm_qp[i] = pu1_init_qp[i];
1413 }
1414 }
1415
irc_change_min_max_qp(rate_control_api_t * ps_rate_control_api,UWORD8 * pu1_min_max_qp)1416 void irc_change_min_max_qp(rate_control_api_t *ps_rate_control_api,
1417 UWORD8 *pu1_min_max_qp)
1418 {
1419 WORD32 i;
1420 for(i = 0; i < MAX_PIC_TYPE; i++)
1421 {
1422 ps_rate_control_api->au1_min_max_qp[(i << 1)] =
1423 pu1_min_max_qp[(i << 1)];
1424 ps_rate_control_api->au1_min_max_qp[(i << 1) + 1] = pu1_min_max_qp[(i
1425 << 1) + 1];
1426 }
1427 }
1428
1429 /****************************************************************************
1430 Function Name : irc_change_peak_bit_rate
1431 Description : Does the necessary changes whenever there is a change in
1432 peak bit rate
1433 *****************************************************************************/
irc_change_peak_bit_rate(rate_control_api_t * ps_rate_control_api,UWORD32 * pu4_peak_bit_rate)1434 WORD32 irc_change_peak_bit_rate(rate_control_api_t *ps_rate_control_api,
1435 UWORD32 *pu4_peak_bit_rate)
1436 {
1437 WORD32 i4_ret_val = RC_OK;
1438 int i;
1439
1440 /*
1441 * Buffer Mechanism Module: Re-initialize the number of bits consumed per
1442 * frame
1443 */
1444 if(ps_rate_control_api->e_rc_type == VBR_STORAGE
1445 || ps_rate_control_api->e_rc_type == VBR_STORAGE_DVD_COMP)
1446 {
1447 /* Send the new peak bit rate and the old frame rate */
1448 irc_change_vbr_vbv_bit_rate(ps_rate_control_api->ps_vbr_storage_vbv,
1449 pu4_peak_bit_rate[0]);
1450 irc_ba_change_ba_peak_bit_rate(ps_rate_control_api->ps_bit_allocation,
1451 (WORD32 *)pu4_peak_bit_rate);
1452
1453 for(i = 0; i < MAX_NUM_DRAIN_RATES; i++)
1454 {
1455 ps_rate_control_api->au4_new_peak_bit_rate[i] =
1456 pu4_peak_bit_rate[i];
1457 }
1458 }
1459 else if(ps_rate_control_api->e_rc_type == VBR_STREAMING)
1460 {
1461 if(ps_rate_control_api->u4_frms_in_delay_prd_for_peak_bit_rate_change)
1462 {
1463 /*
1464 * Means that change in peak bit rate has been made twice before the
1465 * previous change could take effect
1466 */
1467 i4_ret_val = RC_BENIGN_ERR;
1468 }
1469 /*
1470 * If the change happens before encoding the first frame make the
1471 * effect immediately else delay the effect
1472 */
1473 if(ps_rate_control_api->u1_is_first_frm)
1474 {
1475 for(i = 0; i < MAX_NUM_DRAIN_RATES; i++)
1476 {
1477 ps_rate_control_api->au4_new_peak_bit_rate[i] =
1478 pu4_peak_bit_rate[i];
1479 }
1480 irc_ba_change_ba_peak_bit_rate(
1481 ps_rate_control_api->ps_bit_allocation,
1482 (WORD32 *)pu4_peak_bit_rate);
1483 irc_change_cbr_vbv_bit_rate(ps_rate_control_api->ps_cbr_buffer,
1484 (WORD32 *)pu4_peak_bit_rate);
1485 }
1486 else
1487 {
1488 UWORD32 au4_num_pics_in_delay_prd[MAX_NUM_DRAIN_RATES];
1489 /*
1490 * Else store the number of frames after which the effect should
1491 * happen and then update the peak bitrate
1492 */
1493 ps_rate_control_api->u4_frms_in_delay_prd_for_peak_bit_rate_change =
1494 irc_get_vsp_num_pics_in_dly_prd(
1495 &ps_rate_control_api->s_vbr_str_prms,
1496 au4_num_pics_in_delay_prd);
1497 for(i = 0; i < MAX_NUM_DRAIN_RATES; i++)
1498 {
1499 ps_rate_control_api->au4_new_peak_bit_rate[i] =
1500 pu4_peak_bit_rate[i];
1501 }
1502 }
1503 }
1504
1505 return (i4_ret_val);
1506 }
1507
irc_change_buffer_delay(rate_control_api_t * ps_rate_control_api,UWORD32 u4_buffer_delay)1508 void irc_change_buffer_delay(rate_control_api_t *ps_rate_control_api,
1509 UWORD32 u4_buffer_delay)
1510 {
1511 UWORD32 u4_frms_in_delay_prd = ((irc_ba_get_frame_rate(
1512 ps_rate_control_api->ps_bit_allocation) * u4_buffer_delay)
1513 / 1000000);
1514
1515 /* Initialize the rate control modules */
1516 if(ps_rate_control_api->e_rc_type == CBR_NLDRC)
1517 {
1518 irc_change_cbr_buffer_delay(ps_rate_control_api->ps_cbr_buffer,
1519 u4_buffer_delay);
1520 }
1521 else if(ps_rate_control_api->e_rc_type == VBR_STORAGE
1522 || ps_rate_control_api->e_rc_type == VBR_STORAGE_DVD_COMP)
1523 {
1524 UWORD32 au4_num_pics_in_delay_prd[MAX_PIC_TYPE];
1525
1526 irc_change_vsp_fidp(&ps_rate_control_api->s_vbr_str_prms,
1527 u4_frms_in_delay_prd);
1528
1529 /* Get the number of pics of each type in delay period */
1530 irc_get_vsp_num_pics_in_dly_prd(&ps_rate_control_api->s_vbr_str_prms,
1531 au4_num_pics_in_delay_prd);
1532
1533 irc_change_cbr_vbv_num_pics_in_delay_period(
1534 ps_rate_control_api->ps_cbr_buffer,
1535 au4_num_pics_in_delay_prd);
1536 }
1537 }
1538
1539 /* Getter functions to get the current rate control parameters */
irc_get_frame_rate(rate_control_api_t * ps_rate_control_api)1540 UWORD32 irc_get_frame_rate(rate_control_api_t *ps_rate_control_api)
1541 {
1542 return (irc_ba_get_frame_rate(ps_rate_control_api->ps_bit_allocation));
1543 }
1544
irc_get_bit_rate(rate_control_api_t * ps_rate_control_api)1545 UWORD32 irc_get_bit_rate(rate_control_api_t *ps_rate_control_api)
1546 {
1547 return (irc_ba_get_bit_rate(ps_rate_control_api->ps_bit_allocation));
1548 }
1549
irc_get_peak_bit_rate(rate_control_api_t * ps_rate_control_api,WORD32 i4_index)1550 UWORD32 irc_get_peak_bit_rate(rate_control_api_t *ps_rate_control_api,
1551 WORD32 i4_index)
1552 {
1553 return (ps_rate_control_api->au4_new_peak_bit_rate[i4_index]);
1554 }
1555
irc_get_intra_frame_interval(rate_control_api_t * ps_rate_control_api)1556 UWORD32 irc_get_intra_frame_interval(rate_control_api_t *ps_rate_control_api)
1557 {
1558 return (irc_pic_type_get_intra_frame_interval(
1559 ps_rate_control_api->ps_pic_handling));
1560 }
1561
irc_get_inter_frame_interval(rate_control_api_t * ps_rate_control_api)1562 UWORD32 irc_get_inter_frame_interval(rate_control_api_t *ps_rate_control_api)
1563 {
1564 return (irc_pic_type_get_inter_frame_interval(
1565 ps_rate_control_api->ps_pic_handling));
1566 }
1567
irc_get_rc_type(rate_control_api_t * ps_rate_control_api)1568 rc_type_e irc_get_rc_type(rate_control_api_t *ps_rate_control_api)
1569 {
1570 return (ps_rate_control_api->e_rc_type);
1571 }
1572
irc_get_bits_per_frame(rate_control_api_t * ps_rate_control_api)1573 WORD32 irc_get_bits_per_frame(rate_control_api_t *ps_rate_control_api)
1574 {
1575 WORD32 i4_bits_per_frm;
1576
1577 X_PROD_Y_DIV_Z(irc_ba_get_bit_rate(ps_rate_control_api->ps_bit_allocation),
1578 (UWORD32)1000,
1579 irc_ba_get_frame_rate(ps_rate_control_api->ps_bit_allocation),
1580 i4_bits_per_frm);
1581
1582 return (i4_bits_per_frm);
1583 }
1584
irc_get_max_delay(rate_control_api_t * ps_rate_control_api)1585 UWORD32 irc_get_max_delay(rate_control_api_t *ps_rate_control_api)
1586 {
1587 return (irc_get_cbr_buffer_delay(ps_rate_control_api->ps_cbr_buffer));
1588 }
1589
irc_get_seq_no(rate_control_api_t * ps_rate_control_api)1590 UWORD32 irc_get_seq_no(rate_control_api_t *ps_rate_control_api)
1591 {
1592 return (irc_pic_type_get_disp_order_no(ps_rate_control_api->ps_pic_handling));
1593 }
1594
irc_get_rem_frames_in_gop(rate_control_api_t * ps_rate_control_api)1595 UWORD32 irc_get_rem_frames_in_gop(rate_control_api_t *ps_rate_control_api)
1596 {
1597 WORD32 ai4_rem_frms_in_period[MAX_PIC_TYPE];
1598 WORD32 j;
1599 UWORD32 u4_rem_frms_in_period = 0;
1600
1601 /* Get the rem_frms_in_gop & the frms_in_gop from the pic_type state struct */
1602 irc_pic_type_get_rem_frms_in_gop(ps_rate_control_api->ps_pic_handling,
1603 ai4_rem_frms_in_period);
1604
1605 /* Depending on the number of gops in a period, find the num_frms_in_prd */
1606 for(j = 0; j < MAX_PIC_TYPE; j++)
1607 {
1608 u4_rem_frms_in_period += ai4_rem_frms_in_period[j];
1609 }
1610
1611 return (u4_rem_frms_in_period);
1612 }
1613
1614 /****************************************************************************
1615 Function Name : irc_flush_buf_frames
1616 Description : API call to flush the buffered up frames
1617 *****************************************************************************/
irc_flush_buf_frames(rate_control_api_t * ps_rate_control_api)1618 void irc_flush_buf_frames(rate_control_api_t *ps_rate_control_api)
1619 {
1620 irc_flush_frame_from_pic_stack(ps_rate_control_api->ps_pic_handling);
1621 }
1622
1623 /****************************************************************************
1624 Function Name : irc_flush_buf_frames
1625 Description : API call to flush the buffered up frames
1626 *****************************************************************************/
1627
irc_post_encode_frame_skip(rate_control_api_t * ps_rate_control_api,picture_type_e e_pic_type)1628 void irc_post_encode_frame_skip(rate_control_api_t *ps_rate_control_api,
1629 picture_type_e e_pic_type)
1630 {
1631 irc_skip_encoded_frame(ps_rate_control_api->ps_pic_handling, e_pic_type);
1632 }
1633
1634 /****************************************************************************
1635 Function Name : irc_force_I_frame
1636 Description : API call to force an I frame
1637 *****************************************************************************/
irc_force_I_frame(rate_control_api_t * ps_rate_control_api)1638 void irc_force_I_frame(rate_control_api_t *ps_rate_control_api)
1639 {
1640 irc_set_force_I_frame_flag(ps_rate_control_api->ps_pic_handling);
1641 }
1642
1643 /****************************************************************************
1644 * Function Name : rc_get_rem_bits_in_gop
1645 * Description : API call to get remaining bits in GOP
1646 * *****************************************************************************/
irc_get_rem_bits_in_period(rate_control_api_t * ps_rate_control_api)1647 WORD32 irc_get_rem_bits_in_period(rate_control_api_t *ps_rate_control_api)
1648 {
1649 return (irc_ba_get_rem_bits_in_period(
1650 ps_rate_control_api->ps_bit_allocation,
1651 ps_rate_control_api->ps_pic_handling));
1652 }
1653
1654 /****************************************************************************
1655 * Function Name : irc_get_vbv_buf_fullness
1656 * Description : API call to get VBV buffer fullness
1657 ******************************************************************************/
irc_get_vbv_buf_fullness(rate_control_api_t * ps_rate_control_api)1658 WORD32 irc_get_vbv_buf_fullness(rate_control_api_t *ps_rate_control_api)
1659 {
1660 return (irc_get_cur_vbv_buf_size(ps_rate_control_api->ps_vbr_storage_vbv));
1661 }
1662
irc_get_vbv_buf_size(rate_control_api_t * ps_rate_control_api)1663 WORD32 irc_get_vbv_buf_size(rate_control_api_t *ps_rate_control_api)
1664 {
1665 if(ps_rate_control_api->e_rc_type == CBR_NLDRC
1666 || ps_rate_control_api->e_rc_type == VBR_STREAMING)
1667 {
1668 return (irc_get_cbr_buffer_size(ps_rate_control_api->ps_cbr_buffer));
1669 }
1670 else
1671 {
1672 return (irc_get_max_vbv_buf_size(
1673 ps_rate_control_api->ps_vbr_storage_vbv));
1674 }
1675 }
1676
irc_get_vbv_fulness_with_cur_bits(rate_control_api_t * ps_rate_control_api,UWORD32 u4_bits)1677 WORD32 irc_get_vbv_fulness_with_cur_bits(rate_control_api_t *ps_rate_control_api,
1678 UWORD32 u4_bits)
1679 {
1680 return (irc_vbv_get_vbv_buf_fullness(
1681 ps_rate_control_api->ps_vbr_storage_vbv, u4_bits));
1682 }
1683
irc_set_avg_mb_act(rate_control_api_t * ps_rate_control_api,WORD32 i4_avg_activity)1684 void irc_set_avg_mb_act(rate_control_api_t *ps_rate_control_api,
1685 WORD32 i4_avg_activity)
1686 {
1687 irc_mb_update_frame_level(ps_rate_control_api->ps_mb_rate_control,
1688 i4_avg_activity);
1689 return;
1690 }
1691