xref: /aosp_15_r20/external/coreboot/src/soc/amd/common/block/aoac/aoac.c (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <stdint.h>
4 #include <amdblocks/acpimmio.h>
5 #include <amdblocks/aoac.h>
6 
7 /* This initiates the power on sequence, but doesn't wait for the device to be powered on. */
power_on_aoac_device(unsigned int dev)8 void power_on_aoac_device(unsigned int dev)
9 {
10 	uint8_t byte = aoac_read8(AOAC_DEV_D3_CTL(dev));
11 	byte |= FCH_AOAC_PWR_ON_DEV;
12 	byte &= ~FCH_AOAC_TARGET_DEVICE_STATE;
13 	byte |= FCH_AOAC_D0_INITIALIZED;
14 	aoac_write8(AOAC_DEV_D3_CTL(dev), byte);
15 }
16 
power_off_aoac_device(unsigned int dev)17 void power_off_aoac_device(unsigned int dev)
18 {
19 	uint8_t byte = aoac_read8(AOAC_DEV_D3_CTL(dev));
20 	byte &= ~FCH_AOAC_PWR_ON_DEV;
21 	aoac_write8(AOAC_DEV_D3_CTL(dev), byte);
22 }
23 
is_aoac_device_enabled(unsigned int dev)24 bool is_aoac_device_enabled(unsigned int dev)
25 {
26 	uint8_t byte = aoac_read8(AOAC_DEV_D3_STATE(dev));
27 	byte &= (FCH_AOAC_PWR_RST_STATE | FCH_AOAC_REF_CLK_OK_STATE);
28 	if (byte == (FCH_AOAC_PWR_RST_STATE | FCH_AOAC_REF_CLK_OK_STATE))
29 		return true;
30 	else
31 		return false;
32 }
33