Searched defs:is_depthwise (Results 1 – 7 of 7) sorted by relevance
| /aosp_15_r20/external/tensorflow/tensorflow/core/kernels/mkl/ |
| H A D | mkl_conv_ops.h | 192 bool is_depthwise) { in GetFilterSizeInMklOrder()
294 bool is_depthwise) { in GetFilterSizeInMklOrder()
543 memory::dims* pad_r, bool is_grouped_convolution, bool is_depthwise) { in GetOutputAndPadSizeInMklOrder()
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| H A D | mkl_conv_ops.cc | 2214 accu_type, has_bias, is_depthwise, is_native) \ argument
2226 is_depthwise, is_native) \ argument
2234 is_depthwise, is_native) \ argument
2241 op, kernel, output_type, accu_type, has_bias, is_depthwise, is_native) \ argument
2251 accu_type, has_bias, is_depthwise, is_native) argument
2300 accu_type, has_bias, is_depthwise, is_native) \ argument
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| /aosp_15_r20/external/tensorflow/tensorflow/compiler/mlir/lite/transforms/ |
| H A D | optimize.cc | 142 bool is_depthwise) { in CanFuseConvOrDepthwiseConvShapes()
168 bool is_depthwise) { in CanFuseConvOrDepthwiseConv()
180 bool is_depthwise) { in CanFuseConvOrDepthwiseConv()
267 ElementsAttr ExpandTo4DForConvImpl(Attribute a, bool is_depthwise) { in ExpandTo4DForConvImpl()
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| /aosp_15_r20/external/pytorch/aten/src/ATen/native/mkldnn/xpu/ |
| H A D | Conv.cpp | 131 bool ConvParams::is_depthwise(const at::Tensor& input, const at::Tensor& weight) in is_depthwise() function in at::native::xpu::impl::ConvParams
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| /aosp_15_r20/external/XNNPACK/bench/ |
| H A D | convolution.cc | 522 bool is_depthwise = false; in tflite_convolution_f32() local
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| /aosp_15_r20/external/pytorch/aten/src/ATen/native/vulkan/ops/ |
| H A D | Convolution.cpp | 35 inline bool is_depthwise(const IntArrayRef weight_size, const int64_t groups) { in is_depthwise() function
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| /aosp_15_r20/external/pytorch/aten/src/ATen/native/ |
| H A D | Convolution.cpp | 605 bool is_depthwise(const at::Tensor& input, const at::Tensor& weight) const { in is_depthwise() function
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