1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2015, 2016 ARM Ltd.
4 */
5
6 #include <linux/uaccess.h>
7 #include <linux/interrupt.h>
8 #include <linux/cpu.h>
9 #include <linux/kvm_host.h>
10 #include <kvm/arm_vgic.h>
11 #include <asm/kvm_emulate.h>
12 #include <asm/kvm_mmu.h>
13 #include "vgic.h"
14
15 /*
16 * Initialization rules: there are multiple stages to the vgic
17 * initialization, both for the distributor and the CPU interfaces. The basic
18 * idea is that even though the VGIC is not functional or not requested from
19 * user space, the critical path of the run loop can still call VGIC functions
20 * that just won't do anything, without them having to check additional
21 * initialization flags to ensure they don't look at uninitialized data
22 * structures.
23 *
24 * Distributor:
25 *
26 * - kvm_vgic_early_init(): initialization of static data that doesn't
27 * depend on any sizing information or emulation type. No allocation
28 * is allowed there.
29 *
30 * - vgic_init(): allocation and initialization of the generic data
31 * structures that depend on sizing information (number of CPUs,
32 * number of interrupts). Also initializes the vcpu specific data
33 * structures. Can be executed lazily for GICv2.
34 *
35 * CPU Interface:
36 *
37 * - kvm_vgic_vcpu_init(): initialization of static data that doesn't depend
38 * on any sizing information. Private interrupts are allocated if not
39 * already allocated at vgic-creation time.
40 */
41
42 /* EARLY INIT */
43
44 /**
45 * kvm_vgic_early_init() - Initialize static VGIC VCPU data structures
46 * @kvm: The VM whose VGIC districutor should be initialized
47 *
48 * Only do initialization of static structures that don't require any
49 * allocation or sizing information from userspace. vgic_init() called
50 * kvm_vgic_dist_init() which takes care of the rest.
51 */
kvm_vgic_early_init(struct kvm * kvm)52 void kvm_vgic_early_init(struct kvm *kvm)
53 {
54 struct vgic_dist *dist = &kvm->arch.vgic;
55
56 xa_init_flags(&dist->lpi_xa, XA_FLAGS_LOCK_IRQ);
57 }
58
59 /* CREATION */
60
61 static int vgic_allocate_private_irqs_locked(struct kvm_vcpu *vcpu, u32 type);
62
63 /**
64 * kvm_vgic_create: triggered by the instantiation of the VGIC device by
65 * user space, either through the legacy KVM_CREATE_IRQCHIP ioctl (v2 only)
66 * or through the generic KVM_CREATE_DEVICE API ioctl.
67 * irqchip_in_kernel() tells you if this function succeeded or not.
68 * @kvm: kvm struct pointer
69 * @type: KVM_DEV_TYPE_ARM_VGIC_V[23]
70 */
kvm_vgic_create(struct kvm * kvm,u32 type)71 int kvm_vgic_create(struct kvm *kvm, u32 type)
72 {
73 struct kvm_vcpu *vcpu;
74 unsigned long i;
75 int ret;
76
77 /*
78 * This function is also called by the KVM_CREATE_IRQCHIP handler,
79 * which had no chance yet to check the availability of the GICv2
80 * emulation. So check this here again. KVM_CREATE_DEVICE does
81 * the proper checks already.
82 */
83 if (type == KVM_DEV_TYPE_ARM_VGIC_V2 &&
84 !kvm_vgic_global_state.can_emulate_gicv2)
85 return -ENODEV;
86
87 /* Must be held to avoid race with vCPU creation */
88 lockdep_assert_held(&kvm->lock);
89
90 ret = -EBUSY;
91 if (!lock_all_vcpus(kvm))
92 return ret;
93
94 mutex_lock(&kvm->arch.config_lock);
95
96 if (irqchip_in_kernel(kvm)) {
97 ret = -EEXIST;
98 goto out_unlock;
99 }
100
101 kvm_for_each_vcpu(i, vcpu, kvm) {
102 if (vcpu_has_run_once(vcpu))
103 goto out_unlock;
104 }
105 ret = 0;
106
107 if (type == KVM_DEV_TYPE_ARM_VGIC_V2)
108 kvm->max_vcpus = VGIC_V2_MAX_CPUS;
109 else
110 kvm->max_vcpus = VGIC_V3_MAX_CPUS;
111
112 if (atomic_read(&kvm->online_vcpus) > kvm->max_vcpus) {
113 ret = -E2BIG;
114 goto out_unlock;
115 }
116
117 kvm_for_each_vcpu(i, vcpu, kvm) {
118 ret = vgic_allocate_private_irqs_locked(vcpu, type);
119 if (ret)
120 break;
121 }
122
123 if (ret) {
124 kvm_for_each_vcpu(i, vcpu, kvm) {
125 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
126 kfree(vgic_cpu->private_irqs);
127 vgic_cpu->private_irqs = NULL;
128 }
129
130 goto out_unlock;
131 }
132
133 kvm->arch.vgic.in_kernel = true;
134 kvm->arch.vgic.vgic_model = type;
135
136 kvm->arch.vgic.vgic_dist_base = VGIC_ADDR_UNDEF;
137
138 if (type == KVM_DEV_TYPE_ARM_VGIC_V2)
139 kvm->arch.vgic.vgic_cpu_base = VGIC_ADDR_UNDEF;
140 else
141 INIT_LIST_HEAD(&kvm->arch.vgic.rd_regions);
142
143 out_unlock:
144 mutex_unlock(&kvm->arch.config_lock);
145 unlock_all_vcpus(kvm);
146 return ret;
147 }
148
149 /* INIT/DESTROY */
150
151 /**
152 * kvm_vgic_dist_init: initialize the dist data structures
153 * @kvm: kvm struct pointer
154 * @nr_spis: number of spis, frozen by caller
155 */
kvm_vgic_dist_init(struct kvm * kvm,unsigned int nr_spis)156 static int kvm_vgic_dist_init(struct kvm *kvm, unsigned int nr_spis)
157 {
158 struct vgic_dist *dist = &kvm->arch.vgic;
159 struct kvm_vcpu *vcpu0 = kvm_get_vcpu(kvm, 0);
160 int i;
161
162 dist->spis = kcalloc(nr_spis, sizeof(struct vgic_irq), GFP_KERNEL_ACCOUNT);
163 if (!dist->spis)
164 return -ENOMEM;
165
166 /*
167 * In the following code we do not take the irq struct lock since
168 * no other action on irq structs can happen while the VGIC is
169 * not initialized yet:
170 * If someone wants to inject an interrupt or does a MMIO access, we
171 * require prior initialization in case of a virtual GICv3 or trigger
172 * initialization when using a virtual GICv2.
173 */
174 for (i = 0; i < nr_spis; i++) {
175 struct vgic_irq *irq = &dist->spis[i];
176
177 irq->intid = i + VGIC_NR_PRIVATE_IRQS;
178 INIT_LIST_HEAD(&irq->ap_list);
179 raw_spin_lock_init(&irq->irq_lock);
180 irq->vcpu = NULL;
181 irq->target_vcpu = vcpu0;
182 kref_init(&irq->refcount);
183 switch (dist->vgic_model) {
184 case KVM_DEV_TYPE_ARM_VGIC_V2:
185 irq->targets = 0;
186 irq->group = 0;
187 break;
188 case KVM_DEV_TYPE_ARM_VGIC_V3:
189 irq->mpidr = 0;
190 irq->group = 1;
191 break;
192 default:
193 kfree(dist->spis);
194 dist->spis = NULL;
195 return -EINVAL;
196 }
197 }
198 return 0;
199 }
200
vgic_allocate_private_irqs_locked(struct kvm_vcpu * vcpu,u32 type)201 static int vgic_allocate_private_irqs_locked(struct kvm_vcpu *vcpu, u32 type)
202 {
203 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
204 int i;
205
206 lockdep_assert_held(&vcpu->kvm->arch.config_lock);
207
208 if (vgic_cpu->private_irqs)
209 return 0;
210
211 vgic_cpu->private_irqs = kcalloc(VGIC_NR_PRIVATE_IRQS,
212 sizeof(struct vgic_irq),
213 GFP_KERNEL_ACCOUNT);
214
215 if (!vgic_cpu->private_irqs)
216 return -ENOMEM;
217
218 /*
219 * Enable and configure all SGIs to be edge-triggered and
220 * configure all PPIs as level-triggered.
221 */
222 for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) {
223 struct vgic_irq *irq = &vgic_cpu->private_irqs[i];
224
225 INIT_LIST_HEAD(&irq->ap_list);
226 raw_spin_lock_init(&irq->irq_lock);
227 irq->intid = i;
228 irq->vcpu = NULL;
229 irq->target_vcpu = vcpu;
230 kref_init(&irq->refcount);
231 if (vgic_irq_is_sgi(i)) {
232 /* SGIs */
233 irq->enabled = 1;
234 irq->config = VGIC_CONFIG_EDGE;
235 } else {
236 /* PPIs */
237 irq->config = VGIC_CONFIG_LEVEL;
238 }
239
240 switch (type) {
241 case KVM_DEV_TYPE_ARM_VGIC_V3:
242 irq->group = 1;
243 irq->mpidr = kvm_vcpu_get_mpidr_aff(vcpu);
244 break;
245 case KVM_DEV_TYPE_ARM_VGIC_V2:
246 irq->group = 0;
247 irq->targets = BIT(vcpu->vcpu_id);
248 break;
249 }
250 }
251
252 return 0;
253 }
254
vgic_allocate_private_irqs(struct kvm_vcpu * vcpu,u32 type)255 static int vgic_allocate_private_irqs(struct kvm_vcpu *vcpu, u32 type)
256 {
257 int ret;
258
259 mutex_lock(&vcpu->kvm->arch.config_lock);
260 ret = vgic_allocate_private_irqs_locked(vcpu, type);
261 mutex_unlock(&vcpu->kvm->arch.config_lock);
262
263 return ret;
264 }
265
266 /**
267 * kvm_vgic_vcpu_init() - Initialize static VGIC VCPU data
268 * structures and register VCPU-specific KVM iodevs
269 *
270 * @vcpu: pointer to the VCPU being created and initialized
271 *
272 * Only do initialization, but do not actually enable the
273 * VGIC CPU interface
274 */
kvm_vgic_vcpu_init(struct kvm_vcpu * vcpu)275 int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu)
276 {
277 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
278 struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
279 int ret = 0;
280
281 vgic_cpu->rd_iodev.base_addr = VGIC_ADDR_UNDEF;
282
283 INIT_LIST_HEAD(&vgic_cpu->ap_list_head);
284 raw_spin_lock_init(&vgic_cpu->ap_list_lock);
285 atomic_set(&vgic_cpu->vgic_v3.its_vpe.vlpi_count, 0);
286
287 if (!irqchip_in_kernel(vcpu->kvm))
288 return 0;
289
290 ret = vgic_allocate_private_irqs(vcpu, dist->vgic_model);
291 if (ret)
292 return ret;
293
294 /*
295 * If we are creating a VCPU with a GICv3 we must also register the
296 * KVM io device for the redistributor that belongs to this VCPU.
297 */
298 if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) {
299 mutex_lock(&vcpu->kvm->slots_lock);
300 ret = vgic_register_redist_iodev(vcpu);
301 mutex_unlock(&vcpu->kvm->slots_lock);
302 }
303 return ret;
304 }
305
kvm_vgic_vcpu_enable(struct kvm_vcpu * vcpu)306 static void kvm_vgic_vcpu_enable(struct kvm_vcpu *vcpu)
307 {
308 if (kvm_vgic_global_state.type == VGIC_V2)
309 vgic_v2_enable(vcpu);
310 else
311 vgic_v3_enable(vcpu);
312 }
313
314 /*
315 * vgic_init: allocates and initializes dist and vcpu data structures
316 * depending on two dimensioning parameters:
317 * - the number of spis
318 * - the number of vcpus
319 * The function is generally called when nr_spis has been explicitly set
320 * by the guest through the KVM DEVICE API. If not nr_spis is set to 256.
321 * vgic_initialized() returns true when this function has succeeded.
322 */
vgic_init(struct kvm * kvm)323 int vgic_init(struct kvm *kvm)
324 {
325 struct vgic_dist *dist = &kvm->arch.vgic;
326 struct kvm_vcpu *vcpu;
327 int ret = 0;
328 unsigned long idx;
329
330 lockdep_assert_held(&kvm->arch.config_lock);
331
332 if (vgic_initialized(kvm))
333 return 0;
334
335 /* Are we also in the middle of creating a VCPU? */
336 if (kvm->created_vcpus != atomic_read(&kvm->online_vcpus))
337 return -EBUSY;
338
339 /* freeze the number of spis */
340 if (!dist->nr_spis)
341 dist->nr_spis = VGIC_NR_IRQS_LEGACY - VGIC_NR_PRIVATE_IRQS;
342
343 ret = kvm_vgic_dist_init(kvm, dist->nr_spis);
344 if (ret)
345 goto out;
346
347 /*
348 * If we have GICv4.1 enabled, unconditionally request enable the
349 * v4 support so that we get HW-accelerated vSGIs. Otherwise, only
350 * enable it if we present a virtual ITS to the guest.
351 */
352 if (vgic_supports_direct_msis(kvm)) {
353 ret = vgic_v4_init(kvm);
354 if (ret)
355 goto out;
356 }
357
358 kvm_for_each_vcpu(idx, vcpu, kvm)
359 kvm_vgic_vcpu_enable(vcpu);
360
361 ret = kvm_vgic_setup_default_irq_routing(kvm);
362 if (ret)
363 goto out;
364
365 vgic_debug_init(kvm);
366
367 /*
368 * If userspace didn't set the GIC implementation revision,
369 * default to the latest and greatest. You know want it.
370 */
371 if (!dist->implementation_rev)
372 dist->implementation_rev = KVM_VGIC_IMP_REV_LATEST;
373 dist->initialized = true;
374
375 out:
376 return ret;
377 }
378
kvm_vgic_dist_destroy(struct kvm * kvm)379 static void kvm_vgic_dist_destroy(struct kvm *kvm)
380 {
381 struct vgic_dist *dist = &kvm->arch.vgic;
382 struct vgic_redist_region *rdreg, *next;
383
384 dist->ready = false;
385 dist->initialized = false;
386
387 kfree(dist->spis);
388 dist->spis = NULL;
389 dist->nr_spis = 0;
390 dist->vgic_dist_base = VGIC_ADDR_UNDEF;
391
392 if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) {
393 list_for_each_entry_safe(rdreg, next, &dist->rd_regions, list)
394 vgic_v3_free_redist_region(kvm, rdreg);
395 INIT_LIST_HEAD(&dist->rd_regions);
396 } else {
397 dist->vgic_cpu_base = VGIC_ADDR_UNDEF;
398 }
399
400 if (vgic_supports_direct_msis(kvm))
401 vgic_v4_teardown(kvm);
402
403 xa_destroy(&dist->lpi_xa);
404 }
405
__kvm_vgic_vcpu_destroy(struct kvm_vcpu * vcpu)406 static void __kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu)
407 {
408 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
409
410 /*
411 * Retire all pending LPIs on this vcpu anyway as we're
412 * going to destroy it.
413 */
414 vgic_flush_pending_lpis(vcpu);
415
416 INIT_LIST_HEAD(&vgic_cpu->ap_list_head);
417 kfree(vgic_cpu->private_irqs);
418 vgic_cpu->private_irqs = NULL;
419
420 if (vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) {
421 /*
422 * If this vCPU is being destroyed because of a failed creation
423 * then unregister the redistributor to avoid leaving behind a
424 * dangling pointer to the vCPU struct.
425 *
426 * vCPUs that have been successfully created (i.e. added to
427 * kvm->vcpu_array) get unregistered in kvm_vgic_destroy(), as
428 * this function gets called while holding kvm->arch.config_lock
429 * in the VM teardown path and would otherwise introduce a lock
430 * inversion w.r.t. kvm->srcu.
431 *
432 * vCPUs that failed creation are torn down outside of the
433 * kvm->arch.config_lock and do not get unregistered in
434 * kvm_vgic_destroy(), meaning it is both safe and necessary to
435 * do so here.
436 */
437 if (kvm_get_vcpu_by_id(vcpu->kvm, vcpu->vcpu_id) != vcpu)
438 vgic_unregister_redist_iodev(vcpu);
439
440 vgic_cpu->rd_iodev.base_addr = VGIC_ADDR_UNDEF;
441 }
442 }
443
kvm_vgic_vcpu_destroy(struct kvm_vcpu * vcpu)444 void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu)
445 {
446 struct kvm *kvm = vcpu->kvm;
447
448 mutex_lock(&kvm->slots_lock);
449 __kvm_vgic_vcpu_destroy(vcpu);
450 mutex_unlock(&kvm->slots_lock);
451 }
452
kvm_vgic_destroy(struct kvm * kvm)453 void kvm_vgic_destroy(struct kvm *kvm)
454 {
455 struct kvm_vcpu *vcpu;
456 unsigned long i;
457
458 mutex_lock(&kvm->slots_lock);
459 mutex_lock(&kvm->arch.config_lock);
460
461 vgic_debug_destroy(kvm);
462
463 kvm_for_each_vcpu(i, vcpu, kvm)
464 __kvm_vgic_vcpu_destroy(vcpu);
465
466 kvm_vgic_dist_destroy(kvm);
467
468 mutex_unlock(&kvm->arch.config_lock);
469
470 if (kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3)
471 kvm_for_each_vcpu(i, vcpu, kvm)
472 vgic_unregister_redist_iodev(vcpu);
473
474 mutex_unlock(&kvm->slots_lock);
475 }
476
477 /**
478 * vgic_lazy_init: Lazy init is only allowed if the GIC exposed to the guest
479 * is a GICv2. A GICv3 must be explicitly initialized by userspace using the
480 * KVM_DEV_ARM_VGIC_GRP_CTRL KVM_DEVICE group.
481 * @kvm: kvm struct pointer
482 */
vgic_lazy_init(struct kvm * kvm)483 int vgic_lazy_init(struct kvm *kvm)
484 {
485 int ret = 0;
486
487 if (unlikely(!vgic_initialized(kvm))) {
488 /*
489 * We only provide the automatic initialization of the VGIC
490 * for the legacy case of a GICv2. Any other type must
491 * be explicitly initialized once setup with the respective
492 * KVM device call.
493 */
494 if (kvm->arch.vgic.vgic_model != KVM_DEV_TYPE_ARM_VGIC_V2)
495 return -EBUSY;
496
497 mutex_lock(&kvm->arch.config_lock);
498 ret = vgic_init(kvm);
499 mutex_unlock(&kvm->arch.config_lock);
500 }
501
502 return ret;
503 }
504
505 /* RESOURCE MAPPING */
506
507 /**
508 * kvm_vgic_map_resources - map the MMIO regions
509 * @kvm: kvm struct pointer
510 *
511 * Map the MMIO regions depending on the VGIC model exposed to the guest
512 * called on the first VCPU run.
513 * Also map the virtual CPU interface into the VM.
514 * v2 calls vgic_init() if not already done.
515 * v3 and derivatives return an error if the VGIC is not initialized.
516 * vgic_ready() returns true if this function has succeeded.
517 */
kvm_vgic_map_resources(struct kvm * kvm)518 int kvm_vgic_map_resources(struct kvm *kvm)
519 {
520 struct vgic_dist *dist = &kvm->arch.vgic;
521 enum vgic_type type;
522 gpa_t dist_base;
523 int ret = 0;
524
525 if (likely(vgic_ready(kvm)))
526 return 0;
527
528 mutex_lock(&kvm->slots_lock);
529 mutex_lock(&kvm->arch.config_lock);
530 if (vgic_ready(kvm))
531 goto out;
532
533 if (!irqchip_in_kernel(kvm))
534 goto out;
535
536 if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V2) {
537 ret = vgic_v2_map_resources(kvm);
538 type = VGIC_V2;
539 } else {
540 ret = vgic_v3_map_resources(kvm);
541 type = VGIC_V3;
542 }
543
544 if (ret)
545 goto out;
546
547 dist_base = dist->vgic_dist_base;
548 mutex_unlock(&kvm->arch.config_lock);
549
550 ret = vgic_register_dist_iodev(kvm, dist_base, type);
551 if (ret) {
552 kvm_err("Unable to register VGIC dist MMIO regions\n");
553 goto out_slots;
554 }
555
556 /*
557 * kvm_io_bus_register_dev() guarantees all readers see the new MMIO
558 * registration before returning through synchronize_srcu(), which also
559 * implies a full memory barrier. As such, marking the distributor as
560 * 'ready' here is guaranteed to be ordered after all vCPUs having seen
561 * a completely configured distributor.
562 */
563 dist->ready = true;
564 goto out_slots;
565 out:
566 mutex_unlock(&kvm->arch.config_lock);
567 out_slots:
568 if (ret)
569 kvm_vm_dead(kvm);
570
571 mutex_unlock(&kvm->slots_lock);
572
573 return ret;
574 }
575
576 /* GENERIC PROBE */
577
kvm_vgic_cpu_up(void)578 void kvm_vgic_cpu_up(void)
579 {
580 enable_percpu_irq(kvm_vgic_global_state.maint_irq, 0);
581 }
582
583
kvm_vgic_cpu_down(void)584 void kvm_vgic_cpu_down(void)
585 {
586 disable_percpu_irq(kvm_vgic_global_state.maint_irq);
587 }
588
vgic_maintenance_handler(int irq,void * data)589 static irqreturn_t vgic_maintenance_handler(int irq, void *data)
590 {
591 /*
592 * We cannot rely on the vgic maintenance interrupt to be
593 * delivered synchronously. This means we can only use it to
594 * exit the VM, and we perform the handling of EOIed
595 * interrupts on the exit path (see vgic_fold_lr_state).
596 */
597 return IRQ_HANDLED;
598 }
599
600 static struct gic_kvm_info *gic_kvm_info;
601
vgic_set_kvm_info(const struct gic_kvm_info * info)602 void __init vgic_set_kvm_info(const struct gic_kvm_info *info)
603 {
604 BUG_ON(gic_kvm_info != NULL);
605 gic_kvm_info = kmalloc(sizeof(*info), GFP_KERNEL);
606 if (gic_kvm_info)
607 *gic_kvm_info = *info;
608 }
609
610 /**
611 * kvm_vgic_init_cpu_hardware - initialize the GIC VE hardware
612 *
613 * For a specific CPU, initialize the GIC VE hardware.
614 */
kvm_vgic_init_cpu_hardware(void)615 void kvm_vgic_init_cpu_hardware(void)
616 {
617 BUG_ON(preemptible());
618
619 /*
620 * We want to make sure the list registers start out clear so that we
621 * only have the program the used registers.
622 */
623 if (kvm_vgic_global_state.type == VGIC_V2)
624 vgic_v2_init_lrs();
625 else
626 kvm_call_hyp(__vgic_v3_init_lrs);
627 }
628
629 /**
630 * kvm_vgic_hyp_init: populates the kvm_vgic_global_state variable
631 * according to the host GIC model. Accordingly calls either
632 * vgic_v2/v3_probe which registers the KVM_DEVICE that can be
633 * instantiated by a guest later on .
634 */
kvm_vgic_hyp_init(void)635 int kvm_vgic_hyp_init(void)
636 {
637 bool has_mask;
638 int ret;
639
640 if (!gic_kvm_info)
641 return -ENODEV;
642
643 has_mask = !gic_kvm_info->no_maint_irq_mask;
644
645 if (has_mask && !gic_kvm_info->maint_irq) {
646 kvm_err("No vgic maintenance irq\n");
647 return -ENXIO;
648 }
649
650 /*
651 * If we get one of these oddball non-GICs, taint the kernel,
652 * as we have no idea of how they *really* behave.
653 */
654 if (gic_kvm_info->no_hw_deactivation) {
655 kvm_info("Non-architectural vgic, tainting kernel\n");
656 add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK);
657 kvm_vgic_global_state.no_hw_deactivation = true;
658 }
659
660 switch (gic_kvm_info->type) {
661 case GIC_V2:
662 ret = vgic_v2_probe(gic_kvm_info);
663 break;
664 case GIC_V3:
665 ret = vgic_v3_probe(gic_kvm_info);
666 if (!ret) {
667 static_branch_enable(&kvm_vgic_global_state.gicv3_cpuif);
668 kvm_info("GIC system register CPU interface enabled\n");
669 }
670 break;
671 default:
672 ret = -ENODEV;
673 }
674
675 kvm_vgic_global_state.maint_irq = gic_kvm_info->maint_irq;
676
677 kfree(gic_kvm_info);
678 gic_kvm_info = NULL;
679
680 if (ret)
681 return ret;
682
683 if (!has_mask && !kvm_vgic_global_state.maint_irq)
684 return 0;
685
686 ret = request_percpu_irq(kvm_vgic_global_state.maint_irq,
687 vgic_maintenance_handler,
688 "vgic", kvm_get_running_vcpus());
689 if (ret) {
690 kvm_err("Cannot register interrupt %d\n",
691 kvm_vgic_global_state.maint_irq);
692 return ret;
693 }
694
695 kvm_info("vgic interrupt IRQ%d\n", kvm_vgic_global_state.maint_irq);
696 return 0;
697 }
698