xref: /aosp_15_r20/external/mesa3d/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.h (revision 6104692788411f58d303aa86923a9ff6ecaded22)
1 /*
2  * Copyright © 2016 Red Hat.
3  * Copyright © 2016 Bas Nieuwenhuizen
4  *
5  * based on amdgpu winsys.
6  * Copyright © 2011 Marek Olšák <[email protected]>
7  * Copyright © 2015 Advanced Micro Devices, Inc.
8  *
9  * SPDX-License-Identifier: MIT
10  */
11 
12 #ifndef RADV_AMDGPU_CS_H
13 #define RADV_AMDGPU_CS_H
14 
15 #include <amdgpu.h>
16 #include <assert.h>
17 #include <stdint.h>
18 #include <string.h>
19 
20 #include "radv_amdgpu_winsys.h"
21 #include "radv_radeon_winsys.h"
22 
23 enum { MAX_RINGS_PER_TYPE = 8 };
24 
25 struct radv_amdgpu_fence {
26    struct amdgpu_cs_fence fence;
27 };
28 
29 struct radv_amdgpu_ctx {
30    struct radv_amdgpu_winsys *ws;
31    amdgpu_context_handle ctx;
32    struct radv_amdgpu_fence last_submission[AMDGPU_HW_IP_NUM + 1][MAX_RINGS_PER_TYPE];
33 
34    struct radeon_winsys_bo *fence_bo;
35 
36    uint32_t queue_syncobj[AMDGPU_HW_IP_NUM + 1][MAX_RINGS_PER_TYPE];
37    bool queue_syncobj_wait[AMDGPU_HW_IP_NUM + 1][MAX_RINGS_PER_TYPE];
38 };
39 
40 static inline struct radv_amdgpu_ctx *
radv_amdgpu_ctx(struct radeon_winsys_ctx * base)41 radv_amdgpu_ctx(struct radeon_winsys_ctx *base)
42 {
43    return (struct radv_amdgpu_ctx *)base;
44 }
45 
46 void radv_amdgpu_cs_init_functions(struct radv_amdgpu_winsys *ws);
47 
48 #endif /* RADV_AMDGPU_CS_H */
49