| /aosp_15_r20/external/google-breakpad/src/processor/ |
| H A D | disassembler_objdump_unittest.cc | 278 const TestMemoryRegion load_reg(kX86TestEip, {0x8b, 0x06}); // mov eax, [esi]; variable
373 const TestMemoryRegion load_reg(kAMD64TestRip, variable
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| /aosp_15_r20/external/mesa3d/src/compiler/nir/ |
| H A D | nir_trivialize_registers.c | 379 nir_intrinsic_instr *load_reg = nir_load_reg_for_def(src->ssa); in trivialize_source() local
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| /aosp_15_r20/external/libdav1d/src/arm/32/ |
| H A D | mc16.S | 1284 .macro load_reg s0, s1, strd, d0, d1, d2, d3, d4, d5, d6 macro
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| H A D | mc.S | 1087 .macro load_reg s0, s1, strd, d0, d1, d2, d3, d4, d5, d6 macro
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| /aosp_15_r20/external/mesa3d/src/nouveau/mme/ |
| H A D | mme_fermi_sim.c | 36 static uint32_t load_reg(struct mme_fermi_sim *sim, enum mme_fermi_reg reg) in load_reg() function
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| H A D | mme_tu104_sim.c | 118 load_reg(struct mme_tu104_sim *sim, in load_reg() function
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| /aosp_15_r20/external/kmod/libkmod/ |
| H A D | libkmod-file.c | 395 static int load_reg(struct kmod_file *file) in load_reg() function
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| /aosp_15_r20/external/libdav1d/src/arm/64/ |
| H A D | mc16.S | 1339 .macro load_reg s0, s1, strd, wd, d0, d1, d2, d3, d4, d5, d6 macro
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| H A D | mc.S | 1151 .macro load_reg s0, s1, strd, wd, d0, d1, d2, d3, d4, d5, d6 macro
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| /aosp_15_r20/external/mesa3d/src/gallium/auxiliary/gallivm/ |
| H A D | lp_bld_nir.h | 184 LLVMValueRef (*load_reg)(struct lp_build_nir_context *bld_base, member
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| /aosp_15_r20/external/mesa3d/src/intel/compiler/elk/ |
| H A D | elk_vec4_nir.cpp | 226 nir_intrinsic_instr *load_reg = nir_load_reg_for_def(src.ssa); in get_nir_src() local
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| H A D | elk_fs_nir.cpp | 972 nir_intrinsic_instr *load_reg = in fs_nir_emit_alu() local
1920 nir_intrinsic_instr *load_reg = nir_load_reg_for_def(src.ssa); in get_nir_src() local
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| /aosp_15_r20/external/mesa3d/src/intel/compiler/ |
| H A D | brw_fs_nir.cpp | 923 nir_intrinsic_instr *load_reg = in fs_nir_emit_alu() local
1876 nir_intrinsic_instr *load_reg = nir_load_reg_for_def(src.ssa); in get_nir_src() local
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| /aosp_15_r20/art/compiler/optimizing/ |
| H A D | intrinsics_arm64.cc | 5027 CPURegister load_reg = out; in GenerateVarHandleGet() local
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