1 /* 2 * Copyright (c) 2017-2019, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file codechal_encode_hevc_mbenc_g12.h 24 //! \brief HEVC dual-pipe base class kernel interface for GEN12 platform. 25 //! 26 27 #ifndef __CODECHAL_ENCODE_HEVC_MBENC_G12_H__ 28 #define __CODECHAL_ENCODE_HEVC_MBENC_G12_H__ 29 30 #include "codechal_encode_hevc_g12.h" 31 #include "codechal_kernel_intra_dist_mdf_g12.h" 32 33 //! MBENC B kernel Curbe structure 34 typedef struct _MbencBcurbeDataG12 35 { 36 // DWORD 0 37 uint32_t DW0_FrameWidthInSamples : MOS_BITFIELD_RANGE(0, 15); // PicW should be a multiple of 8 38 uint32_t DW0_FrameHeightInSamples : MOS_BITFIELD_RANGE(16, 31); // PicH should be a multiple of 8 39 40 // DWORD 1 41 uint32_t DW1_Log2MaxCUSize : MOS_BITFIELD_RANGE(0, 3); 42 uint32_t DW1_Log2MinCUSize : MOS_BITFIELD_RANGE(4, 7); 43 uint32_t DW1_Log2MaxTUSize : MOS_BITFIELD_RANGE(8, 11); 44 uint32_t DW1_Log2MinTUSize : MOS_BITFIELD_RANGE(12, 15); 45 uint32_t DW1_MaxNumIMESearchCenter : MOS_BITFIELD_RANGE(16, 18); 46 uint32_t DW1_MaxIntraRdeIter : MOS_BITFIELD_RANGE(19, 21); 47 uint32_t DW1_IntraRDOQEnable : MOS_BITFIELD_BIT(22); 48 uint32_t DW1_QPType : MOS_BITFIELD_RANGE(23, 24); 49 uint32_t DW1_MaxTransformDepthInter : MOS_BITFIELD_RANGE(25, 26); 50 uint32_t DW1_MaxTransformDepthIntra : MOS_BITFIELD_RANGE(27, 28); 51 uint32_t DW1_Log2ParallelMergeLevel : MOS_BITFIELD_RANGE(29, 31); 52 53 // DWORD 2 54 uint32_t DW2_CornerNeighborPixel0 : MOS_BITFIELD_RANGE(0, 7); 55 uint32_t DW2_IntraNeighborAvailFlags : MOS_BITFIELD_RANGE(8, 13); 56 uint32_t DW2_ChromaFormatType : MOS_BITFIELD_RANGE(14, 15); 57 uint32_t DW2_SubPelMode : MOS_BITFIELD_RANGE(16, 17); 58 uint32_t DW2_Reserved_0 : MOS_BITFIELD_RANGE(18, 19); 59 uint32_t DW2_InterSADMeasure : MOS_BITFIELD_RANGE(20, 21); 60 uint32_t DW2_IntraSADMeasureAdj : MOS_BITFIELD_RANGE(22, 23); 61 uint32_t DW2_IntraPredictionMask : MOS_BITFIELD_RANGE(24, 26); 62 uint32_t DW2_RefIDCostMode : MOS_BITFIELD_BIT(27); 63 uint32_t DW2_TUBasedCostSetting : MOS_BITFIELD_RANGE(28, 30); 64 uint32_t DW2_Reserved_1 : MOS_BITFIELD_BIT(31); 65 66 // DWORD 3 67 uint32_t DW3_ExplicitModeEn : MOS_BITFIELD_BIT(0); 68 uint32_t DW3_AdaptiveEn : MOS_BITFIELD_BIT(1); 69 uint32_t DW3_Reserved_0 : MOS_BITFIELD_RANGE(2, 4); 70 uint32_t DW3_EarlyImeSuccessEn : MOS_BITFIELD_BIT(5); 71 uint32_t DW3_IntraSpeedMode : MOS_BITFIELD_BIT(6); 72 uint32_t DW3_IMECostCentersSel : MOS_BITFIELD_BIT(7); 73 uint32_t DW3_RDEQuantRoundValue : MOS_BITFIELD_RANGE(8, 15); 74 uint32_t DW3_IMERefWindowSize : MOS_BITFIELD_RANGE(16, 17); 75 uint32_t DW3_IntraComputeType : MOS_BITFIELD_BIT(18); 76 uint32_t DW3_Depth0IntraPrediction : MOS_BITFIELD_BIT(19); 77 uint32_t DW3_TUDepthControl : MOS_BITFIELD_RANGE(20, 21); 78 uint32_t DW3_IntraTuRecFeedbackDisable : MOS_BITFIELD_BIT(22); 79 uint32_t DW3_MergeListBiDisable : MOS_BITFIELD_BIT(23); 80 uint32_t DW3_EarlyImeStop : MOS_BITFIELD_RANGE(24, 31); 81 82 // DWORD 4 83 uint32_t DW4_SliceQP : MOS_BITFIELD_RANGE(0, 6); 84 uint32_t DW4_SliceQPSign : MOS_BITFIELD_BIT(7); 85 uint32_t DW4_ConcurrentGroupNum : MOS_BITFIELD_RANGE(8, 15); 86 uint32_t DW4_ModeIntra32x32Cost : MOS_BITFIELD_RANGE(16, 23); 87 uint32_t DW4_ModeIntraNonDC32x32Cost : MOS_BITFIELD_RANGE(24, 31); 88 89 // DWORD 5 90 uint32_t DW5_ModeIntra16x16Cost : MOS_BITFIELD_RANGE(0, 7); 91 uint32_t DW5_ModeIntraNonDC16x16Cost : MOS_BITFIELD_RANGE(8, 15); 92 uint32_t DW5_ModeIntra8x8Cost : MOS_BITFIELD_RANGE(16, 23); 93 uint32_t DW5_ModeIntraNonDC8x8Cost : MOS_BITFIELD_RANGE(24, 31); 94 95 // DWORD 6 96 uint32_t DW6_ModeIntraNonPred : MOS_BITFIELD_RANGE(0, 7); 97 uint32_t DW6_ModeIntraCUCost : MOS_BITFIELD_RANGE(8, 15); 98 uint32_t DW6_ModeIntraNonDCCost : MOS_BITFIELD_RANGE(16, 23); 99 uint32_t DW6_Reserved_0 : MOS_BITFIELD_RANGE(24, 31); 100 101 // DWORD 7 102 uint32_t DW7_Reserved_0 : MOS_BITFIELD_RANGE(0, 23); 103 uint32_t DW7_ChromaIntraModeCost : MOS_BITFIELD_RANGE(24, 31); 104 105 // DWORD 8 106 uint32_t DW8_IntraLumaModeMasks0_31 : MOS_BITFIELD_RANGE(0, 31); 107 108 // DWORD 9 109 uint32_t DW9_IntraLumaModeMasks32_34 : MOS_BITFIELD_RANGE(0, 2); 110 uint32_t DW9_IntraChromaModeMask : MOS_BITFIELD_RANGE(3, 7); 111 uint32_t DW9_PenaltyForIntraNonDCPredMode : MOS_BITFIELD_RANGE(8, 15); 112 uint32_t DW9_NeighborPixelChromaValueCbCrPair : MOS_BITFIELD_RANGE(16, 31); 113 114 // DWORD 10 115 uint32_t DW10_IntraPredModeLeftNbrBlk0 : MOS_BITFIELD_RANGE(0, 7); 116 uint32_t DW10_IntraPredModeLeftNbrBlk1 : MOS_BITFIELD_RANGE(8, 15); 117 uint32_t DW10_IntraPredModeLeftNbrBlk2 : MOS_BITFIELD_RANGE(16, 23); 118 uint32_t DW10_IntraPredModeLeftNbrBlk3 : MOS_BITFIELD_RANGE(24, 31); 119 120 // DWORD 11 121 uint32_t DW11_IntraPredModeTopNbrBlk0 : MOS_BITFIELD_RANGE(0, 7); 122 uint32_t DW11_IntraPredModeTopNbrBlk1 : MOS_BITFIELD_RANGE(8, 15); 123 uint32_t DW11_IntraPredModeTopNbrBlk2 : MOS_BITFIELD_RANGE(16, 23); 124 uint32_t DW11_IntraPredModeTopNbrBlk3 : MOS_BITFIELD_RANGE(24, 31); 125 126 // DWORD 12 127 uint32_t DW12_IntraModeCostMPM : MOS_BITFIELD_RANGE(0, 7); 128 uint32_t DW12_IntraPUModeCost : MOS_BITFIELD_RANGE(8, 15); 129 uint32_t DW12_IntraPUNxNCost : MOS_BITFIELD_RANGE(16, 23); 130 uint32_t DW12_Reserved_0 : MOS_BITFIELD_RANGE(24, 31); 131 132 // DWORD 13 133 uint32_t DW13_IntraTUDept0Cost : MOS_BITFIELD_RANGE(0, 7); 134 uint32_t DW13_IntraTUDept1Cost : MOS_BITFIELD_RANGE(8, 15); 135 uint32_t DW13_IntraTUDept2Cost : MOS_BITFIELD_RANGE(16, 23); 136 uint32_t DW13_Reserved_0 : MOS_BITFIELD_RANGE(24, 31); 137 138 // DWORD 14 139 uint32_t DW14_IntraTU4x4CBFCost : MOS_BITFIELD_RANGE(0, 7); 140 uint32_t DW14_IntraTU8x8CBFCost : MOS_BITFIELD_RANGE(8, 15); 141 uint32_t DW14_IntraTU16x16CBFCost : MOS_BITFIELD_RANGE(16, 23); 142 uint32_t DW14_IntraTU32x32CBFCost : MOS_BITFIELD_RANGE(24, 31); 143 144 // DWORD 15 145 uint32_t DW15_LambdaRD : MOS_BITFIELD_RANGE(0, 15); 146 uint32_t DW15_Reserved_0 : MOS_BITFIELD_RANGE(16, 31); 147 148 // DWORD 16 149 uint32_t DW16_PictureQp_B : MOS_BITFIELD_RANGE(0, 7); 150 uint32_t DW16_PictureQp_P : MOS_BITFIELD_RANGE(8, 15); 151 uint32_t DW16_PictureQp_I : MOS_BITFIELD_RANGE(16, 23); 152 uint32_t DW16_Reserved_0 : MOS_BITFIELD_RANGE(24, 31); 153 154 // DWORD 17 155 uint32_t DW17_IntraNonDC8x8Penalty : MOS_BITFIELD_RANGE(0, 7); 156 uint32_t DW17_IntraNonDC32x32Penalty : MOS_BITFIELD_RANGE(8, 15); 157 uint32_t DW17_NumRowOfTile : MOS_BITFIELD_RANGE(16, 23); 158 uint32_t DW17_NumColOfTile : MOS_BITFIELD_RANGE(24, 31); 159 160 //DWORD 18 161 uint32_t DW18_TransquantBypassEnableFlag : MOS_BITFIELD_BIT(0); 162 uint32_t DW18_PCMEnabledFlag : MOS_BITFIELD_BIT(1); 163 uint32_t DW18_Reserved_0 : MOS_BITFIELD_RANGE(2, 3); 164 uint32_t DW18_CuQpDeltaEnabledFlag : MOS_BITFIELD_BIT(4); 165 uint32_t DW18_SteppingSelection : MOS_BITFIELD_RANGE(5, 6); 166 uint32_t DW18_RegionsInSliceEnable : MOS_BITFIELD_BIT(7); 167 uint32_t DW18_HMEFlag : MOS_BITFIELD_RANGE(8, 9); 168 uint32_t DW18_Reserved_1 : MOS_BITFIELD_RANGE(10, 15); 169 uint32_t DW18_Cu64SkipCheckOnly : MOS_BITFIELD_BIT(16); 170 uint32_t DW18_EnableCu64Check : MOS_BITFIELD_BIT(17); 171 uint32_t DW18_Cu642Nx2NCheckOnly : MOS_BITFIELD_BIT(18); 172 uint32_t DW18_EnableCu64AmpCheck : MOS_BITFIELD_BIT(19); 173 uint32_t DW18_Reserved_2 : MOS_BITFIELD_BIT(20); 174 uint32_t DW18_DisablePIntra : MOS_BITFIELD_BIT(21); 175 uint32_t DW18_DisableIntraTURec : MOS_BITFIELD_BIT(22); 176 uint32_t DW18_InheritIntraModeFromTU0 : MOS_BITFIELD_BIT(23); 177 uint32_t DW18_Reserved_3 : MOS_BITFIELD_RANGE(24, 26); 178 uint32_t DW18_CostScalingForRA : MOS_BITFIELD_BIT(27); 179 uint32_t DW18_DisableIntraNxN : MOS_BITFIELD_BIT(28); 180 uint32_t DW18_Reserved_4 : MOS_BITFIELD_RANGE(29, 31); 181 182 //DWORD 19 183 uint32_t DW19_MaxRefIdxL0 : MOS_BITFIELD_RANGE(0, 7); 184 uint32_t DW19_MaxRefIdxL1 : MOS_BITFIELD_RANGE(8, 15); 185 uint32_t DW19_MaxBRefIdxL0 : MOS_BITFIELD_RANGE(16, 23); 186 uint32_t DW19_Reserved_0 : MOS_BITFIELD_RANGE(24, 31); 187 188 //DWORD 20 189 uint32_t DW20_EarlyTermination : MOS_BITFIELD_BIT(0); 190 uint32_t DW20_Skip : MOS_BITFIELD_BIT(1); 191 uint32_t DW20_SkipEarlyTermSize : MOS_BITFIELD_RANGE(2, 3); 192 uint32_t DW20_Dynamic64Enable : MOS_BITFIELD_RANGE(4, 5); 193 uint32_t DW20_Dynamic64Order : MOS_BITFIELD_RANGE(6, 7); 194 uint32_t DW20_Dynamic64Th : MOS_BITFIELD_RANGE(8, 11); 195 uint32_t DW20_DynamicOrderTh : MOS_BITFIELD_RANGE(12, 15); 196 uint32_t DW20_BFrameQPOffset : MOS_BITFIELD_RANGE(16, 23); 197 uint32_t DW20_IncreaseExitThresh : MOS_BITFIELD_RANGE(24, 27); 198 uint32_t DW20_Dynamic64Min32 : MOS_BITFIELD_RANGE(28, 29); 199 uint32_t DW20_Reserved_0 : MOS_BITFIELD_BIT(30); 200 uint32_t DW20_LastFrameIsIntra : MOS_BITFIELD_BIT(31); 201 202 //DWORD 21 203 uint32_t DW21_LenSP : MOS_BITFIELD_RANGE(0, 7); 204 uint32_t DW21_MaxNumSU : MOS_BITFIELD_RANGE(8, 15); 205 uint32_t DW21_Reserved_0 : MOS_BITFIELD_RANGE(16, 31); 206 207 //DWORD 22 208 uint32_t DW22_CostTableIndex : MOS_BITFIELD_RANGE(0, 7); 209 uint32_t DW22_NumRegions : MOS_BITFIELD_RANGE(8, 15); 210 uint32_t DW22_Reserved_0 : MOS_BITFIELD_RANGE(16, 31); 211 212 //DWORD 23 213 uint32_t DW23_SliceType : MOS_BITFIELD_RANGE(0, 1); 214 uint32_t DW23_TemporalMvpEnableFlag : MOS_BITFIELD_BIT(2); 215 uint32_t DW23_CollocatedFromL0Flag : MOS_BITFIELD_BIT(3); 216 uint32_t DW23_TheSameRefList : MOS_BITFIELD_BIT(4); 217 uint32_t DW23_IsLowDelay : MOS_BITFIELD_BIT(5); 218 uint32_t DW23_Reserved_0 : MOS_BITFIELD_RANGE(6, 7); 219 uint32_t DW23_MaxNumMergeCand : MOS_BITFIELD_RANGE(8, 15); 220 uint32_t DW23_NumRefIdxL0 : MOS_BITFIELD_RANGE(16, 23); 221 uint32_t DW23_NumRefIdxL1 : MOS_BITFIELD_RANGE(24, 31); 222 223 //DWORD 24 224 uint32_t DW24_FwdPocNumber_L0_mTb_0 : MOS_BITFIELD_RANGE(0, 7); 225 uint32_t DW24_BwdPocNumber_L1_mTb_0 : MOS_BITFIELD_RANGE(8, 15); 226 uint32_t DW24_FwdPocNumber_L0_mTb_1 : MOS_BITFIELD_RANGE(16, 23); 227 uint32_t DW24_BwdPocNumber_L1_mTb_1 : MOS_BITFIELD_RANGE(24, 31); 228 229 //DWORD 25 230 uint32_t DW25_FwdPocNumber_L0_mTb_2 : MOS_BITFIELD_RANGE(0, 7); 231 uint32_t DW25_BwdPocNumber_L1_mTb_2 : MOS_BITFIELD_RANGE(8, 15); 232 uint32_t DW25_FwdPocNumber_L0_mTb_3 : MOS_BITFIELD_RANGE(16, 23); 233 uint32_t DW25_BwdPocNumber_L1_mTb_3 : MOS_BITFIELD_RANGE(24, 31); 234 235 //DWORD 26 236 uint32_t DW26_FwdPocNumber_L0_mTb_4 : MOS_BITFIELD_RANGE(0, 7); 237 uint32_t DW26_BwdPocNumber_L1_mTb_4 : MOS_BITFIELD_RANGE(8, 15); 238 uint32_t DW26_FwdPocNumber_L0_mTb_5 : MOS_BITFIELD_RANGE(16, 23); 239 uint32_t DW26_BwdPocNumber_L1_mTb_5 : MOS_BITFIELD_RANGE(24, 31); 240 241 //DWORD 27 242 uint32_t DW27_FwdPocNumber_L0_mTb_6 : MOS_BITFIELD_RANGE(0, 7); 243 uint32_t DW27_BwdPocNumber_L1_mTb_6 : MOS_BITFIELD_RANGE(8, 15); 244 uint32_t DW27_FwdPocNumber_L0_mTb_7 : MOS_BITFIELD_RANGE(16, 23); 245 uint32_t DW27_BwdPocNumber_L1_mTb_7 : MOS_BITFIELD_RANGE(24, 31); 246 247 //DWORD 28 248 uint32_t DW28_LongTermReferenceFlags_L0 : MOS_BITFIELD_RANGE(0, 15); 249 uint32_t DW28_LongTermReferenceFlags_L1 : MOS_BITFIELD_RANGE(16, 31); 250 251 //DWORD 29 252 uint32_t DW29_RefFrameVerticalSize : MOS_BITFIELD_RANGE(0, 15); 253 uint32_t DW29_RefFrameHorizontalSize : MOS_BITFIELD_RANGE(16, 31); 254 255 //DWORD 30 256 uint32_t DW30_RoundingInter : MOS_BITFIELD_RANGE(0, 7); 257 uint32_t DW30_RoundingIntra : MOS_BITFIELD_RANGE(8, 15); 258 uint32_t DW30_Reserved_0 : MOS_BITFIELD_RANGE(16, 31); 259 260 // DWORD 31 261 uint32_t DW31_Reserved_0 : MOS_BITFIELD_RANGE(0, 31); 262 263 // DWORD 32 264 uint32_t DW32_Reserved_0 : MOS_BITFIELD_RANGE(0, 31); 265 266 // DWORD 33 267 uint32_t DW33_Reserved_0 : MOS_BITFIELD_RANGE(0, 31); 268 269 // DWORD 34 270 uint32_t DW34_Reserved_0 : MOS_BITFIELD_RANGE(0, 31); 271 272 // DWORD 35 273 uint32_t DW35_Reserved_0 : MOS_BITFIELD_RANGE(0, 31); 274 275 // DWORD 36 276 uint32_t DW36_Reserved_0 : MOS_BITFIELD_RANGE(0, 31); 277 278 // DWORD 37 279 uint32_t DW37_Reserved_0 : MOS_BITFIELD_RANGE(0, 31); 280 281 // DWORD 38 282 uint32_t DW38_Reserved_0 : MOS_BITFIELD_RANGE(0, 31); 283 284 // DWORD 39 285 uint32_t DW39_Reserved_0 : MOS_BITFIELD_RANGE(0, 31); 286 287 } MbencBcurbeDataG12, *PMbencBcurbeDataG12; 288 289 C_ASSERT(MOS_BYTES_TO_DWORDS(sizeof(MbencBcurbeDataG12)) == 40); 290 291 const MbencBcurbeDataG12 initMbenBcurbeDataGen12 = { 292 0, //DW0_FrameWidthInSamples 293 0, //DW0_FrameHeightInSamples 294 5, //DW1_Log2MaxCUSize 295 3, //DW1_Log2MinCUSize 296 5, //DW1_Log2MaxTUSize 297 2, //DW1_Log2MinTUSize 298 3, //DW1_MaxNumIMESearchCenter 299 1, //DW1_MaxIntraRdeIter 300 0, //DW1_IntraRDOQEnable 301 0, //DW1_QPType 302 0, //DW1_MaxTransformDepthInter 303 0, //DW1_MaxTransformDepthIntra 304 2, //DW1_Log2ParallelMergeLevel 305 0, //DW2_CornerNeighborPixel0 306 0, //DW2_IntraNeighborAvailFlags 307 1, //DW2_ChromaFormatType 308 0x3, //DW2_SubPelMode 309 0, //DW2_Reserved_0 310 2, //DW2_InterSADMeasure 311 2, //DW2_IntraSADMeasureAdj 312 0, //DW2_IntraPredictionMask 313 1, //DW2_RefIDCostMode 314 0, //DW2_TUBasedCostSetting 315 0, //DW2_Reserved_1 316 0, //DW3_ExplicitModeEn 317 1, //DW3_AdaptiveEn 318 0, //DW3_Reserved_0 319 0, //DW3_EarlyImeSuccessEn 320 0, //DW3_IntraSpeedMode 321 0, //DW3_IMECostCentersSel 322 176, //DW3_RDEQuantRoundValue 323 1, //DW3_IMERefWindowSize 324 0, //DW3_IntraComputeType 325 0, //DW3_Depth0IntraPrediction 326 0, //DW3_TUDepthControl 327 0, //DW3_IntraTuRecFeedbackDisable 328 0, //DW3_MergeListBiDisable 329 0, //DW3_EarlyImeStop 330 27, //DW4_SliceQP 331 0, //DW4_SliceQPSign 332 1, //DW4_ConcurrentGroupNum 333 40, //DW4_ModeIntra32x32Cost 334 0, //DW4_ModeIntraNonDC32x32Cost 335 40, //DW5_ModeIntra16x16Cost 336 0, //DW5_ModeIntraNonDC16x16Cost 337 41, //DW5_ModeIntra8x8Cost 338 0, //DW5_ModeIntraNonDC8x8Cost 339 15, //DW6_ModeIntraNonPred 340 0, //DW6_ModeIntraCUCost 341 0, //DW6_ModeIntraNonDCCost 342 0, //DW6_Reserved_0 343 0, //DW7_Reserved_0 344 40, //DW7_ChromaIntraModeCost 345 0, //DW8_IntraLumaModeMasks0_31 - kernel will update this value 346 0, //DW9_IntraLumaModeMasks32_34 - kernel will update this value 347 0, //DW9_IntraChromaModeMask - kernel will update this value 348 0, //DW9_PenaltyForIntraNonDCPredMode - kernel will update this value 349 0, //DW9_NeighborPixelChromaValueCbCrPair - kernel will update this value 350 0, //DW10_IntraPredModeLeftNbrBlk0 - kernel will update this value 351 0, //DW10_IntraPredModeLeftNbrBlk1 - kernel will update this value 352 0, //DW10_IntraPredModeLeftNbrBlk2 - kernel will update this value 353 0, //DW10_IntraPredModeLeftNbrBlk3 - kernel will update this value 354 0, //DW11_IntraPredModeTopNbrBlk0 - kernel will update this value 355 0, //DW11_IntraPredModeTopNbrBlk1 - kernel will update this value 356 0, //DW11_IntraPredModeTopNbrBlk2 - kernel will update this value 357 0, //DW11_IntraPredModeTopNbrBlk3 - kernel will update this value 358 0, //DW12_IntraModeCostMPM 359 0, //DW12_IntraPUModeCost - kernel will update this value 360 0, //DW12_IntraPUNxNCost - kernel will update this value 361 0, //DW12_Reserved_0 362 4, //DW13_IntraTUDept0Cost 363 20, //DW13_IntraTUDept1Cost 364 0, //DW13_IntraTUDept2Cost 365 0, //DW13_Reserved_0 366 12, //DW14_IntraTU4x4CBFCost 367 12, //DW14_IntraTU8x8CBFCost 368 12, //DW14_IntraTU16x16CBFCost 369 12, //DW14_IntraTU32x32CBFCost 370 77, //DW15_LambdaRD 371 0, //DW15_Reserved_0 372 0, //DW16_PictureQp_B 373 0, //DW16_PictureQp_P 374 0, //DW16_PictureQp_I 375 0, //DW16_Reserved_0 376 0, //DW17_IntraNonDC8x8Penalty 377 0, //DW17_IntraNonDC32x32Penalty 378 1, //DW17_NumRowOfTile 379 1, //DW17_NumColOfTile 380 0, //DW18_TransquantBypassEnableFlag 381 0, //DW18_PCMEnabledFlag 382 0, //DW18_Reserved_0 383 0, //DW18_CuQpDeltaEnabledFlag 384 1, //DW18_SteppingSelection 385 0, //DW18_RegionsInSliceEnable 386 0, //DW18_HMEFlag 387 0, //DW18_Reserved_1 388 0, //DW18_Cu64SkipCheckOnly 389 0, //DW18_EnableCu64Check 390 1, //DW18_Cu642Nx2NCheckOnly 391 0, //DW18_EnableCu64AmpCheck 392 0, //DW18_Reserved_2 393 0, //DW18_DisablePIntra 394 0, //DW18_DisableIntraTURec 395 0, //DW18_InheritIntraModeFromTU0 396 0, //DW18_Reserved_3 397 0, //DW18_CostScalingForRA 398 0, //DW18_DisableIntraNxN 399 0, //DW18_Reserved_4 400 0, //DW19_MaxRefIdxL0 401 0, //DW19_MaxRefIdxL1 402 0, //DW19_MaxBRefIdxL0 403 0, //DW19_Reserved_0 404 0, //DW20_EarlyTermination 405 0, //DW20_Size 406 0, //DW20_SkipEarlyTermSize 407 0, //DW20_Dynamic64Enable 408 0, //DW20_Dynamic64Order 409 0, //DW20_Dynamic64Th 410 0, //DW20_DynamicOrderTh 411 0, //DW20_BFrameQpOffset 412 0, //DW20_IncreaseExitThresh 413 3, //DW20_Dynamic64Min32 414 0, //DW20_Reserved_0 415 0, //DW20_LastFrameIntra 416 63, //DW21_LenSP 417 63, //DW21_MaxNumSU 418 0, //DW21_Reserved_0 419 0, //DW22_CostTableIndex 420 1, //DW22_NumRegions 421 0, //DW22_Reserved_0 422 0, //DW23_SliceType 423 0, //DW23_TemporalMvpEnableFlag 424 0, //DW23_CollocatedFromL0Flag 425 0, //DW23_TheSameRefList 426 0, //DW23_IsLowDelay 427 0, //DW23_Reserved_0 428 4, //DW23_MaxNumMergeCand 429 0, //DW23_NumRefIdxL0 430 0, //DW23_NumRefIdxL1 431 0, //DW24_FwdPocNumber_L0_mTb_0 432 0, //DW24_BwdPocNumber_L1_mTb_0 433 0, //DW24_FwdPocNumber_L0_mTb_1 434 0, //DW24_BwdPocNumber_L1_mTb_1 435 0, //DW25_FwdPocNumber_L0_mTb_2 436 0, //DW25_BwdPocNumber_L1_mTb_2 437 0, //DW25_FwdPocNumber_L0_mTb_3 438 0, //DW25_BwdPocNumber_L1_mTb_3 439 0, //DW26_FwdPocNumber_L0_mTb_4 440 0, //DW26_BwdPocNumber_L1_mTb_4 441 0, //DW26_FwdPocNumber_L0_mTb_5 442 0, //DW26_BwdPocNumber_L1_mTb_5 443 0, //DW27_FwdPocNumber_L0_mTb_6 444 0, //DW27_BwdPocNumber_L1_mTb_6 445 0, //DW27_FwdPocNumber_L0_mTb_7 446 0, //DW27_BwdPocNumber_L1_mTb_7 447 0, //DW28_LongTermReferenceFlags_L0 448 0, //DW28_LongTermReferenceFlags_L1 449 0, //DW29_RefFrameVerticalSize 450 0, //DW29_RefFrameHorizontalSize 451 0, //DW30_RoundingInter 452 0, //DW30_RoundingIntra 453 0, //DW30_Reserved_0 454 0, //DW31_Reserved_0 455 0, //DW32_Reserved_0 456 0, //DW33_Reserved_0 457 0, //DW34_Reserved_0 458 0, //DW35_Reserved_0 459 0, //DW36_Reserved_0 460 0, //DW37_Reserved_0 461 0, //DW38_Reserved_0 462 0, //DW39_Reserved_0 463 }; 464 465 namespace CMRT_UMD 466 { 467 class CmDevice; 468 class CmTask; 469 class CmQueue; 470 class CmThreadSpace; 471 class CmKernel; 472 class CmProgram; 473 class SurfaceIndex; 474 class CmSurface2D; 475 class CmBuffer; 476 } 477 478 #define MAX_VME_BWD_REF 4 479 #define MAX_VME_FWD_REF 4 480 481 //! HEVC dual-pipe encoder class for GEN12 HEVC MBenc kernel with MDF support 482 class CodecHalHevcMbencG12 : public CodechalEncHevcStateG12 483 { 484 485 protected: 486 CmThreadSpace * m_threadSpace = nullptr; 487 CmKernel * m_cmKrnB = nullptr; 488 CmProgram * m_cmProgramB = nullptr; 489 CmKernel * m_cmKrnB64 = nullptr; 490 CmProgram * m_cmProgramB64 = nullptr; 491 492 typedef SurfaceIndex MBencSurfaceIndex[m_maxMfeSurfaces][m_maxMultiFrames]; 493 MBencSurfaceIndex * m_surfIndexArray = nullptr; 494 495 uint8_t m_FrameBalance[m_loadBalanceSize]; 496 int32_t m_totalFrameAdj[m_maxMultiFrames] = {}; 497 498 static const uint8_t m_frameColorMapEntrySize = 16; 499 static const uint8_t m_frameColorMapLocCurFrame = 0; 500 static const uint8_t m_frameColorMapLocCurColor = 1; 501 static const uint8_t m_frameColorMapLocTotalFrame = 2; 502 static const uint8_t m_frameColorMapLocTotalColor = 3; 503 static const uint8_t m_frameColorMapFrameInvalid = 0xFF; 504 505 //Internal surfaces 506 CmBuffer *m_combinedBuffer1 = nullptr; //!< Combined buffer 1 507 CmBuffer *m_combinedBuffer2 = nullptr; //!< Combined buffer 2 508 CmSurface2D * m_reconWithBoundaryPix = nullptr; //!< Recon surface with populated boundary pixels. 509 CmSurface2D * m_intermediateCuRecordLcu32 = nullptr; //!< Intermediate CU Record Surface for I and B kernel 510 CmSurface2D * m_scratchSurf = nullptr; //!< Scartch Surface for I-kernel 511 CmSurface2D * m_cu16X16QpIn = nullptr; //!< CU 16x16 QP data input surface 512 CmSurface2D * m_lcuLevelData = nullptr; //!< Mv and Distortion summation surface 513 CmBuffer * m_constTableB = nullptr; //!< Enc constant table for B LCU32 514 CmBuffer * m_cuSplitSurf = nullptr; //!< CU split data surface 515 CmBuffer * m_loadBalance = nullptr; //!< Enc constant table for B LCU32 516 CmBuffer * m_dbgSurface = nullptr; //!< Debug surface 517 518 CodechalKernelIntraDistMdfG12 *m_intraDistKernel = nullptr; 519 520 //External surfaces 521 SurfaceIndex *m_curVme = nullptr; //!< Resource owned by DDI 522 CmSurface2D * m_curSurf = nullptr; //!< Resource owned by DDI 523 CmBuffer * m_mbCodeBuffer = nullptr; //!< Resource owned by PAK 524 SurfaceIndex *m_mbCodeSurfIdx = nullptr; //!< Resource owned by PAK 525 SurfaceIndex *m_mvDataSurfIdx = nullptr; //!< Resource owned by PAK 526 CmSurface2D * m_swScoreboardSurf = nullptr; //!< Resource owned by SW Scoreboard Krn 527 CmBuffer * m_colocCumvData = nullptr; //!< Resource owned by HME 528 CmSurface2D * m_hmeMotionPredData = nullptr; //!< Resource owned by HME 529 CmSurface2D * m_curSurf2X = nullptr; //!< Resource owned by HME 530 SurfaceIndex *m_cur2XVme = nullptr; //!< Resource owned by HME 531 CmSurface2D * m_histInBuffer = nullptr; //!< Resource owned by BRC 532 CmSurface2D * m_histOutBuffer = nullptr; //!< Resource owned by BRC 533 CmSurface2D * m_surfRefArray[MAX_VME_FWD_REF + MAX_VME_BWD_REF]; //!< Resource owned by DDI 534 CmSurface2D * m_surf2XArray[MAX_VME_FWD_REF + MAX_VME_BWD_REF]; //!< Resource owned by DDI 535 536 public: 537 BRC_INITRESET_CURBE curbe = {}; 538 BRCUPDATE_CURBE curbeBrcUpdate = {}; 539 540 //! 541 //! \brief Constructor 542 //! 543 CodecHalHevcMbencG12(CodechalHwInterface* hwInterface, 544 CodechalDebugInterface* debugInterface, 545 PCODECHAL_STANDARD_INFO standardInfo); 546 547 //! 548 //! \brief Destructor 549 //! 550 virtual ~CodecHalHevcMbencG12(); 551 552 //! 553 //! \brief Allocate CM Device , CM Task and Cm Queue 554 //! \brief Will be used by all the kernels 555 //! 556 MOS_STATUS AllocateMDFResources() override; 557 558 //! 559 //! \brief Function to destroy MDF required resources 560 //! 561 //! \return MOS_STATUS 562 //! MOS_STATUS_SUCCESS if success, else fail reason 563 //! 564 MOS_STATUS DestroyMDFResources() override; 565 566 //! 567 //! \brief Allocate ME resources 568 //! 569 //! \return MOS_STATUS 570 //! MOS_STATUS_SUCCESS if success, else fail reason 571 //! 572 MOS_STATUS AllocateMeResources(); 573 574 protected: 575 //! 576 //! \brief Allocate resources used by MBEnc 577 //! 578 //! \return MOS_STATUS 579 //! MOS_STATUS_SUCCESS if success, else fail reason 580 //! 581 virtual MOS_STATUS AllocateEncResources()override; 582 583 MOS_STATUS AllocateBrcResources()override; 584 585 //! 586 //! \brief Free resources 587 //! 588 //! \return MOS_STATUS 589 //! MOS_STATUS_SUCCESS if success, else fail reason 590 //! 591 virtual MOS_STATUS FreeEncResources()override; 592 593 virtual MOS_STATUS FreeBrcResources()override; 594 595 //! 596 //! \brief Free resources 597 //! 598 //! \return MOS_STATUS 599 //! MOS_STATUS_SUCCESS if success, else fail reason 600 //! 601 MOS_STATUS FreeMeResources(); 602 603 //! 604 //! \brief Top level function for invoking MBenc kernel 605 //! \details I, B or LCU64_B MBEnc kernel, based on EncFunctionType 606 //! \param [in] encFunctionType 607 //! Specifies the media state type 608 //! \return MOS_STATUS 609 //! MOS_STATUS_SUCCESS if success, else fail reason 610 //! 611 virtual MOS_STATUS EncodeMbEncKernel(CODECHAL_MEDIA_STATE_TYPE encFunctionType) override; 612 613 //! 614 //! \brief Loads the ISA kernel 615 //! 616 //! \return MOS_STATUS 617 //! MOS_STATUS_SUCCESS if success, else fail reason 618 //! 619 virtual MOS_STATUS InitKernelState()override; 620 621 uint32_t GetMaxBtCount()override; 622 623 //! 624 //! \brief Setup Kernel Arguments for B frame 625 //! 626 //! \return MOS_STATUS 627 //! MOS_STATUS_SUCCESS if success, else fail reason 628 //! 629 MOS_STATUS SetupKernelArgsB(); 630 631 //! 632 //! \brief Init Curbe Data for B frame 633 //! 634 //! \return MOS_STATUS 635 //! MOS_STATUS_SUCCESS if success, else fail reason 636 //! 637 MOS_STATUS InitCurbeDataB(); 638 639 //! 640 //! \brief Function to setup external resources for B frames. 641 //! 642 //! \return MOS_STATUS 643 //! MOS_STATUS_SUCCESS if success, else fail reason 644 //! 645 MOS_STATUS SetupSurfacesB(); 646 647 ////! 648 ////! \brief Top level function for IntraDist kernel 649 ////! 650 ////! \return MOS_STATUS 651 ////! MOS_STATUS_SUCCESS if success, else fail reason 652 ////! 653 MOS_STATUS EncodeIntraDistKernel()override; 654 655 //! 656 //! \brief Top level function to set remap table 657 //! \details Used to setup load balance surface. 658 //! \return void 659 //! 660 void SetColorBitRemap(uint8_t * remapTable, int32_t multiFrameNumber, int32_t curColor, int32_t * totalColor, int32_t * totalFrameAdj); 661 662 //! 663 //! \brief Get rounding inter/intra for current frame to use 664 //! \return MOS_STATUS 665 //! MOS_STATUS_SUCCESS if success, else fail reason 666 //! 667 MOS_STATUS GetRoundingIntraInterToUse() override; 668 669 }; 670 //! \brief typedef of class CodecHalHevcMbencG12* 671 using pCodecHalHevcMbencG12 = class CodecHalHevcMbencG12*; 672 673 #endif // __CODECHAL_ENCODE_HEVC_MBENC_G12_H__ 674