1 /* 2 * Copyright (c) 2017-2019, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file codechal_encode_hevc_brc_g12.h 24 //! \brief HEVC dual-pipe brc class kernel interface for GEN12 platform. 25 //! 26 27 28 #ifndef __CODECHAL_ENCODE_HEVC_BRC_G12_H__ 29 #define __CODECHAL_ENCODE_HEVC_BRC_G12_H__ 30 31 #include "codechal_encode_hevc_g12.h" 32 33 class CodecHalHevcMbencG12; 34 namespace CMRT_UMD 35 { 36 class CmDevice; 37 class CmTask; 38 class CmQueue; 39 class CmThreadSpace; 40 class CmKernel; 41 class CmProgram; 42 class SurfaceIndex; 43 class CmSurface2D; 44 class CmBuffer; 45 } 46 47 #define MAX_VME_BWD_REF 4 48 #define MAX_VME_FWD_REF 4 49 50 //! HEVC dual-pipe BRC class for GEN12 HEVC BRC kernel with MDF support 51 class CodecHalHevcBrcG12 52 { 53 54 protected: 55 CmThreadSpace * m_threadSpaceBrcInitReset = nullptr; //!< shared by brcInit and brcReset kernel. 56 CmThreadSpace * m_threadSpaceBrcUpdate = nullptr; 57 CmThreadSpace * m_threadSpaceBrcLCUQP = nullptr; 58 CmKernel *m_cmKrnBrc = nullptr; 59 CmKernel *m_cmKrnBrcInit = nullptr; 60 CmProgram *m_cmProgramBrcInit = nullptr; 61 CmKernel *m_cmKrnBrcReset = nullptr; 62 CmProgram *m_cmProgramBrcReset = nullptr; 63 CmKernel *m_cmKrnBrcUpdate = nullptr; 64 CmProgram *m_cmProgramBrcUpdate = nullptr; 65 CmKernel *m_cmKrnBrcLCUQP = nullptr; 66 CmProgram *m_cmProgramBrcLCUQP = nullptr; 67 68 //Internal surfaces 69 CmBuffer *m_histBufferBrc = nullptr; //!< Resource owned by BRC 70 CmBuffer *m_PAKStatsBufferBrc = nullptr; //!< Resource owned by BRC 71 CmBuffer *m_PICStateInBufferBrc = nullptr; //!< Resource owned by BRC 72 CmBuffer *m_PICStateOutBufferBrc = nullptr; //!< Resource owned by BRC 73 CmBuffer *m_CombinedEncBufferBrc = nullptr; //!< Resource owned by BRC 74 CmBuffer *m_PixelMBStatsBufferBrc = nullptr; //!< Resource owned by BRC 75 CmSurface2D *m_ConstDataBufferBRC = nullptr; //!< distortion buffer input to BRC. 76 CmSurface2D *m_BrcMbQp = nullptr; //!< distortion buffer input to BRC. 77 CmSurface2D *m_BrcROISurf = nullptr; //!< ROI table buffer input to BRC. 78 79 public: 80 //! 81 //! \brief Constructor 82 //! 83 84 uint32_t m_brcNumPakPasses = 0; 85 CodecHalHevcMbencG12* encoderBrc; CodecHalHevcBrcG12(CodecHalHevcMbencG12 * encoder)86 CodecHalHevcBrcG12(CodecHalHevcMbencG12* encoder) { encoderBrc = encoder; }; 87 //! 88 //! \brief Destructor 89 //! ~CodecHalHevcBrcG12()90 virtual ~CodecHalHevcBrcG12() { FreeBrcResources(); }; 91 92 public: 93 //! 94 //! \brief Allocate resources used by MBEnc 95 //! 96 //! \return MOS_STATUS 97 //! MOS_STATUS_SUCCESS if success, else fail reason 98 //! 99 virtual MOS_STATUS AllocateBrcResources(); 100 101 //! 102 //! \brief Free resources 103 //! 104 //! \return MOS_STATUS 105 //! MOS_STATUS_SUCCESS if success, else fail reason 106 //! 107 virtual MOS_STATUS FreeBrcResources(); 108 109 110 MOS_STATUS SetupThreadSpace(CmKernel *cmKernel, CmThreadSpace *& threadSpace); 111 MOS_STATUS SetupBrcLcuqpThreadSpace(CmKernel *cmKernel, CmThreadSpace *& threadSpace); 112 113 virtual MOS_STATUS InitBrcKernelState(); 114 virtual MOS_STATUS EncodeBrcInitResetKernel(); 115 virtual MOS_STATUS EncodeBrcFrameUpdateKernel(); 116 virtual MOS_STATUS EncodeBrcLcuUpdateKernel(); 117 118 119 MOS_STATUS InitCurbeDataBrcInit(); 120 MOS_STATUS SetupSurfacesBrcInit(); 121 MOS_STATUS BrcInitResetCurbe(); 122 MOS_STATUS BrcUpdateCurbe(); 123 MOS_STATUS SetupSurfacesBrcUpdate(); 124 MOS_STATUS SetupSurfacesBrcLcuQp(); 125 //! 126 //! \brief Setup Kernel Arguments for BRC init frame 127 //! 128 //! \return MOS_STATUS 129 //! MOS_STATUS_SUCCESS if success, else fail reason 130 //! 131 MOS_STATUS SetupKernelArgsBrcInit(); 132 MOS_STATUS SetupKernelArgsBrcUpdate(); 133 MOS_STATUS SetupKernelArgsBrcLcuQp(); 134 135 #if USE_CODECHAL_DEBUG_TOOL 136 MOS_STATUS DumpBrcInputBuffers(); 137 #endif 138 }; 139 140 #endif // __CODECHAL_ENCODE_HEVC_BRC_G12_H__ 141