1 /* 2 * Copyright (c) 2017-2019, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file codechal_encode_avc_g12.h 24 //! \brief This file defines the C++ class/interface for Gen12 platform's AVC 25 //! DualPipe encoding to be used across CODECHAL components. 26 //! 27 #ifndef __CODECHAL_ENCODE_AVC_G12_H__ 28 #define __CODECHAL_ENCODE_AVC_G12_H__ 29 30 #include "codechal_encode_avc.h" 31 #include "codechal_kernel_intra_dist.h" 32 #include "codechal_encode_sw_scoreboard_g12.h" 33 #include "codechal_encode_singlepipe_virtualengine.h" 34 35 enum MbBrcUpdateBindingTableOffset 36 { 37 mbBrcUpdateHistory = 0, 38 mbBrcUpdateMbQp = 1, 39 mbBrcUpdateRoi = 2, 40 mbBrcUpdateMbStat = 3, 41 mbBrcUpdateNumSurfaces = 4 42 }; 43 44 enum BrcUpdateBindingTableOffset 45 { 46 frameBrcUpdateHistory = 0, 47 frameBrcUpdatePakStatisticsOutput = 1, 48 frameBrcUpdateImageStateRead = 2, 49 frameBrcUpdateImageStateWrite = 3, 50 frameBrcUpdateMbencCurbeWrite = 4, 51 frameBrcUpdateDistortion = 5, 52 frameBrcUpdateConstantData = 6, 53 frameBrcUpdateMbStat = 7, 54 frameBrcUpdateMvStat = 8, 55 frameBrcUpdateNumSurfaces = 9 56 }; 57 58 class CodechalEncodeAvcEncG12 : public CodechalEncodeAvcEnc 59 { 60 public: 61 //! 62 //! \brief Constructor 63 //! 64 CodechalEncodeAvcEncG12( 65 CodechalHwInterface * hwInterface, 66 CodechalDebugInterface *debugInterface, 67 PCODECHAL_STANDARD_INFO standardInfo); 68 69 //! 70 //! \brief Copy constructor 71 //! 72 CodechalEncodeAvcEncG12(const CodechalEncodeAvcEncG12&) = delete; 73 74 //! 75 //! \brief Copy assignment operator 76 //! 77 CodechalEncodeAvcEncG12& operator=(const CodechalEncodeAvcEncG12&) = delete; 78 79 //! 80 //! \brief Destructor 81 //! 82 ~CodechalEncodeAvcEncG12(); 83 84 //! \brief Get encoder kernel header and kernel size 85 //! 86 //! \param [in] binary 87 //! Pointer to kernel binary 88 //! \param [in] operation 89 //! Enc kernel operation 90 //! \param [in] krnStateIdx 91 //! Kernel state index 92 //! \param [out] krnHeader 93 //! Pointer to kernel header 94 //! \param [out] krnSize 95 //! Pointer to kernel size 96 //! 97 //! \return MOS_STATUS 98 //! MOS_STATUS_SUCCESS if success, else fail reason 99 //! 100 static MOS_STATUS GetKernelHeaderAndSize( 101 void *binary, 102 EncOperation operation, 103 uint32_t krnStateIdx, 104 void *krnHeader, 105 uint32_t *krnSize); 106 107 MOS_STATUS SubmitCommandBuffer( 108 PMOS_COMMAND_BUFFER cmdBuffer, 109 bool bNullRendering) override; 110 111 MOS_STATUS ExecuteKernelFunctions() override; 112 113 virtual MOS_STATUS SceneChangeReport( 114 PMOS_COMMAND_BUFFER cmdBuffer, 115 PCODECHAL_ENCODE_AVC_GENERIC_PICTURE_LEVEL_PARAMS params) override; 116 117 118 MOS_STATUS GenericEncodePictureLevel( 119 PCODECHAL_ENCODE_AVC_GENERIC_PICTURE_LEVEL_PARAMS params) override; 120 121 MOS_STATUS GetTrellisQuantization( 122 PCODECHAL_ENCODE_AVC_TQ_INPUT_PARAMS params, 123 PCODECHAL_ENCODE_AVC_TQ_PARAMS trellisQuantParams) override; 124 125 MOS_STATUS InitializeState() override; 126 127 MOS_STATUS InitKernelStateMbEnc() override; 128 129 MOS_STATUS InitKernelStateBrc() override; 130 131 MOS_STATUS InitBrcConstantBuffer( 132 PCODECHAL_ENCODE_AVC_INIT_BRC_CONSTANT_BUFFER_PARAMS params) override; 133 134 MOS_STATUS InitKernelStateWP() override; 135 136 MOS_STATUS InitMbBrcConstantDataBuffer( 137 PCODECHAL_ENCODE_AVC_INIT_MBBRC_CONSTANT_DATA_BUFFER_PARAMS params) override; 138 139 MOS_STATUS GetMbEncKernelStateIdx( 140 CodechalEncodeIdOffsetParams* params, 141 uint32_t* kernelOffset) override; 142 143 MOS_STATUS SetCurbeAvcMbEnc( 144 PCODECHAL_ENCODE_AVC_MBENC_CURBE_PARAMS params) override; 145 146 MOS_STATUS SetCurbeAvcWP( 147 PCODECHAL_ENCODE_AVC_WP_CURBE_PARAMS params) override; 148 149 MOS_STATUS SetCurbeAvcBrcInitReset( 150 PCODECHAL_ENCODE_AVC_BRC_INIT_RESET_CURBE_PARAMS params) override; 151 152 MOS_STATUS SetCurbeAvcFrameBrcUpdate( 153 PCODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_PARAMS params) override; 154 155 MOS_STATUS SetCurbeAvcMbBrcUpdate( 156 PCODECHAL_ENCODE_AVC_BRC_UPDATE_CURBE_PARAMS params) override; 157 158 MOS_STATUS SendAvcMbEncSurfaces( 159 PMOS_COMMAND_BUFFER cmdBuffer, 160 PCODECHAL_ENCODE_AVC_MBENC_SURFACE_PARAMS params) override; 161 162 MOS_STATUS SendAvcWPSurfaces( 163 PMOS_COMMAND_BUFFER cmdBuffer, 164 PCODECHAL_ENCODE_AVC_WP_SURFACE_PARAMS params) override; 165 166 MOS_STATUS SendAvcBrcFrameUpdateSurfaces( 167 PMOS_COMMAND_BUFFER cmdBuffer, 168 PCODECHAL_ENCODE_AVC_BRC_UPDATE_SURFACE_PARAMS params) override; 169 170 MOS_STATUS SendAvcBrcMbUpdateSurfaces( 171 PMOS_COMMAND_BUFFER cmdBuffer, 172 PCODECHAL_ENCODE_AVC_BRC_UPDATE_SURFACE_PARAMS params) override; 173 174 MOS_STATUS SetupROISurface() override; 175 176 MOS_STATUS SendPrologWithFrameTracking( 177 PMOS_COMMAND_BUFFER cmdBuffer, 178 bool frameTracking, 179 MHW_MI_MMIOREGISTERS *mmioRegister = nullptr) override; 180 181 MOS_STATUS InitMmcState() override; 182 183 //! 184 //! \brief Run MbEnc Kernel. 185 //! 186 //! \param [in] mbEncIFrameDistInUse 187 //! MbEncIFrameDist in use or not 188 //! 189 //! \return MOS_STATUS 190 //! MOS_STATUS_SUCCESS if success, else fail reason 191 //! 192 virtual MOS_STATUS MbEncKernel( 193 bool mbEncIFrameDistInUse) override; 194 195 //! 196 //! \brief Resize buffers due to resoluton change. 197 //! \details Resize buffers due to resoluton change. 198 //! 199 //! \return void 200 //! 201 virtual void ResizeOnResChange() override; 202 203 MOS_STATUS InitKernelStateMe() override; 204 205 MOS_STATUS UpdateCmdBufAttribute( 206 PMOS_COMMAND_BUFFER cmdBuffer, 207 bool renderEngineInUse) override; 208 209 MOS_STATUS AddMediaVfeCmd( 210 PMOS_COMMAND_BUFFER cmdBuffer, 211 SendKernelCmdsParams *params) override; 212 213 //! 214 //! \brief Set And Populate VE Hint parameters 215 //! \details Set Virtual Engine hint parameter and populate it to primary cmd buffer attributes 216 //! \param [in] cmdBuffer 217 //! Pointer to primary cmd buffer 218 //! \return MOS_STATUS 219 //! MOS_STATUS_SUCCESS if success, else fail reason 220 //! 221 MOS_STATUS SetAndPopulateVEHintParams( 222 PMOS_COMMAND_BUFFER cmdBuffer); 223 224 bool m_useMdf = false; //!< Use MDF for MBEnc kernels. 225 CodechalEncodeSwScoreboardG12 *m_swScoreboardState = nullptr; //!< pointer to SW scoreboard ini state. 226 227 //! 228 //! \brief Set up params for gpu context creation 229 //! \return MOS_STATUS 230 //! MOS_STATUS_SUCCESS if success, else fail reason 231 //! 232 MOS_STATUS SetGpuCtxCreatOption() override; 233 234 //! 235 //! \brief Encode User Feature Key Report. 236 //! \details Report user feature values set by encode. 237 //! 238 //! \return MOS_STATUS 239 //! MOS_STATUS_SUCCESS if success 240 //! 241 virtual MOS_STATUS UserFeatureKeyReport() override; 242 243 PCODECHAL_ENCODE_SINGLEPIPE_VIRTUALENGINE_STATE m_sinlgePipeVeState; //!< single pipe virtual engine state 244 245 protected: 246 class SfdCurbe; 247 class MbencCurbe; 248 class BrcInitResetCurbe; 249 class MbBrcUpdateCurbe; 250 class FrameBrcUpdateCurbe; 251 class WpCurbe; 252 class EncKernelHeader; 253 protected: 254 255 #if USE_CODECHAL_DEBUG_TOOL 256 MOS_STATUS KernelDebugDumps(); 257 258 virtual MOS_STATUS PopulateBrcInitParam( 259 void *cmd) override; 260 261 virtual MOS_STATUS PopulateBrcUpdateParam( 262 void *cmd) override; 263 264 virtual MOS_STATUS PopulateEncParam( 265 uint8_t meMethod, 266 void *cmd) override; 267 268 virtual MOS_STATUS PopulatePakParam( 269 PMOS_COMMAND_BUFFER cmdBuffer, 270 PMHW_BATCH_BUFFER secondLevelBatchBuffer) override; 271 #endif 272 273 //private: 274 static constexpr uint32_t m_sfdCostTableBufferSize = 52; 275 static constexpr uint32_t m_refThreshold = 400; 276 static constexpr uint32_t m_brcConstantsurfaceEarlySkipTableSize = 128; 277 static constexpr uint32_t m_brcConstantsurfaceModeMvCostSize = 1664; 278 static constexpr uint32_t m_brcConstantsurfaceRefcostSize = 128; 279 static constexpr uint32_t m_brcConstantsurfaceQpList0 = 32; 280 static constexpr uint32_t m_brcConstantsurfaceQpList0Reserved = 32; 281 static constexpr uint32_t m_brcConstantsurfaceQpList1 = 32; 282 static constexpr uint32_t m_brcConstantsurfaceQpList1Reserved = 160; 283 static constexpr uint32_t m_brcConstantsurfaceIntracostScalingFactor = 64; 284 static constexpr uint32_t m_initBrcHistoryBufferSize = 880; 285 static constexpr uint32_t m_brcConstantsurfaceWidth = 64; 286 static constexpr uint32_t m_brcConstantsurfaceHeight = 53; 287 static constexpr uint32_t m_brcConstantsurfaceLambdaSize = 512; 288 static constexpr uint32_t m_brcConstantsurfaceFtq25Size = 64; 289 static constexpr uint32_t m_defaultTrellisQuantIntraRounding = 5; 290 static constexpr uint32_t m_maxLambda = 0xEFFF; 291 static constexpr uint32_t m_mbencNumTargetUsages = 3; 292 static constexpr uint32_t m_initMbencBrcBufferSize = 128; 293 static constexpr uint32_t m_mbTextureThreshold = 1024; 294 static constexpr uint32_t m_adaptiveTxDecisionThreshold = 128; 295 static constexpr uint32_t brcHistoryBufferOffsetSceneChanged = 0x2FC; 296 297 static const uint32_t m_intraModeCostForHighTextureMB[CODEC_AVC_NUM_QP]; 298 static const uint8_t m_QPAdjustmentDistThresholdMaxFrameThresholdIPB[576]; 299 static const CODECHAL_ENCODE_AVC_IPCM_THRESHOLD m_IPCMThresholdTable[5]; 300 static const int32_t m_brcBTCounts[CODECHAL_ENCODE_BRC_IDX_NUM]; 301 static const int32_t m_brcCurbeSize[CODECHAL_ENCODE_BRC_IDX_NUM]; 302 static const uint16_t m_lambdaData[256]; 303 static const uint8_t m_ftQ25[64]; 304 static const uint16_t m_refCostMultiRefQp[NUM_PIC_TYPES][64]; 305 static const uint32_t m_multiPred[NUM_TARGET_USAGE_MODES]; 306 static const uint32_t m_multiRefDisableQPCheck[NUM_TARGET_USAGE_MODES]; 307 308 CodechalKernelIntraDist *m_intraDistKernel = nullptr; 309 }; 310 311 class CodechalEncodeAvcEncG12::MbencCurbe 312 { 313 public: 314 enum MBEncCurbeInitType 315 { 316 typeIDist, 317 typeIFrame, 318 typeIField, 319 typePFrame, 320 typePField, 321 typeBFrame, 322 typeBField 323 }; 324 325 static const uint32_t m_mbEncCurbeNormalIFrame[89]; 326 static const uint32_t m_mbEncCurbeNormalIField[89]; 327 static const uint32_t m_mbEncCurbeNormalPFrame[89]; 328 static const uint32_t m_mbEncCurbeNormalPField[89]; 329 static const uint32_t m_mbEncCurbeNormalBFrame[89]; 330 static const uint32_t m_mbEncCurbeNormalBField[89]; 331 static const uint32_t m_mbEncCurbeIFrameDist[89]; 332 GetMBEncCurbeDataSizeExcludeSurfaceIdx()333 uint32_t GetMBEncCurbeDataSizeExcludeSurfaceIdx() { return 66*4; }; 334 SetDefaultMbencCurbe(MBEncCurbeInitType initType)335 void SetDefaultMbencCurbe(MBEncCurbeInitType initType) 336 { 337 switch (initType) 338 { 339 case typeIDist: 340 MOS_SecureMemcpy( 341 (void *)&m_curbe, 342 sizeof(m_mbEncCurbeIFrameDist), 343 m_mbEncCurbeIFrameDist, 344 sizeof(m_mbEncCurbeIFrameDist)); 345 break; 346 347 case typeIFrame: 348 MOS_SecureMemcpy( 349 (void *)&m_curbe, 350 sizeof(m_mbEncCurbeNormalIFrame), 351 m_mbEncCurbeNormalIFrame, 352 sizeof(m_mbEncCurbeNormalIFrame)); 353 break; 354 355 case typeIField: 356 MOS_SecureMemcpy( 357 (void *)&m_curbe, 358 sizeof(m_mbEncCurbeNormalIField), 359 m_mbEncCurbeNormalIField, 360 sizeof(m_mbEncCurbeNormalIField)); 361 break; 362 363 case typePFrame: 364 MOS_SecureMemcpy( 365 (void *)&m_curbe, 366 sizeof(m_mbEncCurbeNormalPFrame), 367 m_mbEncCurbeNormalPFrame, 368 sizeof(m_mbEncCurbeNormalPFrame)); 369 break; 370 371 case typePField: 372 MOS_SecureMemcpy( 373 (void *)&m_curbe, 374 sizeof(m_mbEncCurbeNormalPField), 375 m_mbEncCurbeNormalPField, 376 sizeof(m_mbEncCurbeNormalPField)); 377 break; 378 379 case typeBFrame: 380 MOS_SecureMemcpy( 381 (void *)&m_curbe, 382 sizeof(m_mbEncCurbeNormalBFrame), 383 m_mbEncCurbeNormalBFrame, 384 sizeof(m_mbEncCurbeNormalBFrame)); 385 break; 386 387 case typeBField: 388 MOS_SecureMemcpy( 389 (void *)&m_curbe, 390 sizeof(m_mbEncCurbeNormalBField), 391 m_mbEncCurbeNormalBField, 392 sizeof(m_mbEncCurbeNormalBField)); 393 break; 394 395 default: 396 CODECHAL_ENCODE_ASSERTMESSAGE("Invalid curbe type."); 397 break; 398 } 399 }; 400 401 struct 402 { 403 // DW0 404 union 405 { 406 struct 407 { 408 uint32_t m_skipModeEn : MOS_BITFIELD_BIT(0); 409 uint32_t m_adaptiveEn : MOS_BITFIELD_BIT(1); 410 uint32_t m_biMixDis : MOS_BITFIELD_BIT(2); 411 uint32_t : MOS_BITFIELD_RANGE(3, 4); 412 uint32_t m_earlyImeSuccessEn : MOS_BITFIELD_BIT(5); 413 uint32_t : MOS_BITFIELD_BIT(6); 414 uint32_t m_t8x8FlagForInterEn : MOS_BITFIELD_BIT(7); 415 uint32_t : MOS_BITFIELD_RANGE(8, 23); 416 uint32_t m_earlyImeStop : MOS_BITFIELD_RANGE(24, 31); 417 }; 418 struct 419 { 420 uint32_t m_value; 421 }; 422 } DW0; 423 424 // DW1 425 union 426 { 427 struct 428 { 429 uint32_t m_maxNumMVs : MOS_BITFIELD_RANGE(0, 5); 430 uint32_t m_extendedMvCostRange : MOS_BITFIELD_BIT(6); 431 uint32_t : MOS_BITFIELD_RANGE(7, 15); 432 uint32_t m_biWeight : MOS_BITFIELD_RANGE(16, 21); 433 uint32_t : MOS_BITFIELD_RANGE(22, 27); 434 uint32_t m_uniMixDisable : MOS_BITFIELD_BIT(28); 435 uint32_t : MOS_BITFIELD_RANGE(29, 31); 436 }; 437 struct 438 { 439 uint32_t m_value; 440 }; 441 } DW1; 442 443 // DW2 444 union 445 { 446 struct 447 { 448 uint32_t m_lenSP : MOS_BITFIELD_RANGE(0, 7); 449 uint32_t m_maxNumSU : MOS_BITFIELD_RANGE(8, 15); 450 uint32_t m_picWidth : MOS_BITFIELD_RANGE(16, 31); 451 }; 452 struct 453 { 454 uint32_t m_value; 455 }; 456 } DW2; 457 458 // DW3 459 union 460 { 461 struct 462 { 463 uint32_t m_srcSize : MOS_BITFIELD_RANGE(0, 1); 464 uint32_t : MOS_BITFIELD_RANGE(2, 3); 465 uint32_t m_mbTypeRemap : MOS_BITFIELD_RANGE(4, 5); 466 uint32_t m_srcAccess : MOS_BITFIELD_BIT(6); 467 uint32_t m_refAccess : MOS_BITFIELD_BIT(7); 468 uint32_t m_searchCtrl : MOS_BITFIELD_RANGE(8, 10); 469 uint32_t m_dualSearchPathOption : MOS_BITFIELD_BIT(11); 470 uint32_t m_subPelMode : MOS_BITFIELD_RANGE(12, 13); 471 uint32_t m_skipType : MOS_BITFIELD_BIT(14); 472 uint32_t m_disableFieldCacheAlloc : MOS_BITFIELD_BIT(15); 473 uint32_t m_interChromaMode : MOS_BITFIELD_BIT(16); 474 uint32_t m_fTEnable : MOS_BITFIELD_BIT(17); 475 uint32_t m_bmeDisableFBR : MOS_BITFIELD_BIT(18); 476 uint32_t m_blockBasedSkipEnable : MOS_BITFIELD_BIT(19); 477 uint32_t m_interSAD : MOS_BITFIELD_RANGE(20, 21); 478 uint32_t m_intraSAD : MOS_BITFIELD_RANGE(22, 23); 479 uint32_t m_subMbPartMask : MOS_BITFIELD_RANGE(24, 30); 480 uint32_t : MOS_BITFIELD_BIT(31); 481 }; 482 struct 483 { 484 uint32_t m_value; 485 }; 486 } DW3; 487 488 // DW4 489 union 490 { 491 struct 492 { 493 uint32_t m_picHeightMinus1 : MOS_BITFIELD_RANGE(0, 15); 494 uint32_t m_mvRestrictionInSliceEnable : MOS_BITFIELD_BIT(16); 495 uint32_t m_deltaMvEnable : MOS_BITFIELD_BIT(17); 496 uint32_t m_trueDistortionEnable : MOS_BITFIELD_BIT(18); 497 uint32_t m_enableWavefrontOptimization : MOS_BITFIELD_BIT(19); 498 uint32_t m_enableFBRBypass : MOS_BITFIELD_BIT(20); 499 uint32_t m_enableIntraCostScalingForStaticFrame : MOS_BITFIELD_BIT(21); 500 uint32_t m_enableIntraRefresh : MOS_BITFIELD_BIT(22); 501 uint32_t m_reserved : MOS_BITFIELD_BIT(23); 502 uint32_t m_enableDirtyRect : MOS_BITFIELD_BIT(24); 503 uint32_t m_bCurFldIDR : MOS_BITFIELD_BIT(25); 504 uint32_t m_constrainedIntraPredFlag : MOS_BITFIELD_BIT(26); 505 uint32_t m_fieldParityFlag : MOS_BITFIELD_BIT(27); 506 uint32_t m_hmeEnable : MOS_BITFIELD_BIT(28); 507 uint32_t m_pictureType : MOS_BITFIELD_RANGE(29, 30); 508 uint32_t m_useActualRefQPValue : MOS_BITFIELD_BIT(31); 509 }; 510 struct 511 { 512 uint32_t m_value; 513 }; 514 } DW4; 515 516 // DW5 517 union 518 { 519 struct 520 { 521 uint32_t m_sliceMbHeight : MOS_BITFIELD_RANGE(0, 15); 522 uint32_t m_refWidth : MOS_BITFIELD_RANGE(16, 23); 523 uint32_t m_refHeight : MOS_BITFIELD_RANGE(24, 31); 524 }; 525 struct 526 { 527 uint32_t m_value; 528 }; 529 } DW5; 530 531 // DW6 532 union 533 { 534 struct 535 { 536 uint32_t m_batchBufferEnd; 537 }; 538 struct 539 { 540 uint32_t m_value; 541 }; 542 } DW6; 543 544 // DW7 545 union 546 { 547 struct 548 { 549 uint32_t m_intraPartMask : MOS_BITFIELD_RANGE(0, 4); 550 uint32_t m_nonSkipZMvAdded : MOS_BITFIELD_BIT(5); 551 uint32_t m_nonSkipModeAdded : MOS_BITFIELD_BIT(6); 552 uint32_t m_lumaIntraSrcCornerSwap : MOS_BITFIELD_BIT(7); 553 uint32_t : MOS_BITFIELD_RANGE(8, 15); 554 uint32_t m_mvCostScaleFactor : MOS_BITFIELD_RANGE(16, 17); 555 uint32_t m_bilinearEnable : MOS_BITFIELD_BIT(18); 556 uint32_t m_srcFieldPolarity : MOS_BITFIELD_BIT(19); 557 uint32_t m_weightedSADHAAR : MOS_BITFIELD_BIT(20); 558 uint32_t m_AConlyHAAR : MOS_BITFIELD_BIT(21); 559 uint32_t m_refIDCostMode : MOS_BITFIELD_BIT(22); 560 uint32_t : MOS_BITFIELD_BIT(23); 561 uint32_t m_skipCenterMask : MOS_BITFIELD_RANGE(24, 31); 562 }; 563 struct 564 { 565 uint32_t m_value; 566 }; 567 } DW7; 568 569 struct 570 { 571 // DW8 572 union 573 { 574 struct 575 { 576 uint32_t m_mode0Cost : MOS_BITFIELD_RANGE(0, 7); 577 uint32_t m_mode1Cost : MOS_BITFIELD_RANGE(8, 15); 578 uint32_t m_mode2Cost : MOS_BITFIELD_RANGE(16, 23); 579 uint32_t m_mode3Cost : MOS_BITFIELD_RANGE(24, 31); 580 }; 581 struct 582 { 583 uint32_t m_value; 584 }; 585 } DW8; 586 587 // DW9 588 union 589 { 590 struct 591 { 592 uint32_t m_mode4Cost : MOS_BITFIELD_RANGE(0, 7); 593 uint32_t m_mode5Cost : MOS_BITFIELD_RANGE(8, 15); 594 uint32_t m_mode6Cost : MOS_BITFIELD_RANGE(16, 23); 595 uint32_t m_mode7Cost : MOS_BITFIELD_RANGE(24, 31); 596 }; 597 struct 598 { 599 uint32_t m_value; 600 }; 601 } DW9; 602 603 // DW10 604 union 605 { 606 struct 607 { 608 uint32_t m_mode8Cost : MOS_BITFIELD_RANGE(0, 7); 609 uint32_t m_mode9Cost : MOS_BITFIELD_RANGE(8, 15); 610 uint32_t m_refIDCost : MOS_BITFIELD_RANGE(16, 23); 611 uint32_t m_chromaIntraModeCost : MOS_BITFIELD_RANGE(24, 31); 612 }; 613 struct 614 { 615 uint32_t m_value; 616 }; 617 } DW10; 618 619 // DW11 620 union 621 { 622 struct 623 { 624 uint32_t m_mv0Cost : MOS_BITFIELD_RANGE(0, 7); 625 uint32_t m_mv1Cost : MOS_BITFIELD_RANGE(8, 15); 626 uint32_t m_mv2Cost : MOS_BITFIELD_RANGE(16, 23); 627 uint32_t m_mv3Cost : MOS_BITFIELD_RANGE(24, 31); 628 }; 629 struct 630 { 631 uint32_t m_value; 632 }; 633 } DW11; 634 635 // DW12 636 union 637 { 638 struct 639 { 640 uint32_t m_mv4Cost : MOS_BITFIELD_RANGE(0, 7); 641 uint32_t m_mv5Cost : MOS_BITFIELD_RANGE(8, 15); 642 uint32_t m_mv6Cost : MOS_BITFIELD_RANGE(16, 23); 643 uint32_t m_mv7Cost : MOS_BITFIELD_RANGE(24, 31); 644 }; 645 struct 646 { 647 uint32_t m_value; 648 }; 649 } DW12; 650 651 // DW13 652 union 653 { 654 struct 655 { 656 uint32_t m_qpPrimeY : MOS_BITFIELD_RANGE(0, 7); 657 uint32_t m_qpPrimeCb : MOS_BITFIELD_RANGE(8, 15); 658 uint32_t m_qpPrimeCr : MOS_BITFIELD_RANGE(16, 23); 659 uint32_t m_targetSizeInWord : MOS_BITFIELD_RANGE(24, 31); 660 }; 661 struct 662 { 663 uint32_t m_value; 664 }; 665 } DW13; 666 667 // DW14 668 union 669 { 670 struct 671 { 672 uint32_t m_SICFwdTransCoeffThreshold_0 : MOS_BITFIELD_RANGE(0, 15); 673 uint32_t m_SICFwdTransCoeffThreshold_1 : MOS_BITFIELD_RANGE(16, 23); 674 uint32_t m_SICFwdTransCoeffThreshold_2 : MOS_BITFIELD_RANGE(24, 31); 675 }; 676 struct 677 { 678 uint32_t m_value; 679 }; 680 } DW14; 681 682 // DW15 683 union 684 { 685 struct 686 { 687 uint32_t m_SICFwdTransCoeffThreshold_3 : MOS_BITFIELD_RANGE(0, 7); 688 uint32_t m_SICFwdTransCoeffThreshold_4 : MOS_BITFIELD_RANGE(8, 15); 689 uint32_t m_SICFwdTransCoeffThreshold_5 : MOS_BITFIELD_RANGE(16, 23); 690 uint32_t m_SICFwdTransCoeffThreshold_6 : MOS_BITFIELD_RANGE(24, 31); // Highest Freq 691 }; 692 struct 693 { 694 uint32_t m_value; 695 }; 696 } DW15; 697 } ModeMvCost; 698 699 struct 700 { 701 // DW16 702 union 703 { 704 struct 705 { 706 SearchPathDelta m_spDelta_0; 707 SearchPathDelta m_spDelta_1; 708 SearchPathDelta m_spDelta_2; 709 SearchPathDelta m_spDelta_3; 710 }; 711 struct 712 { 713 uint32_t m_value; 714 }; 715 } DW16; 716 717 // DW17 718 union 719 { 720 struct 721 { 722 SearchPathDelta m_spDelta_4; 723 SearchPathDelta m_spDelta_5; 724 SearchPathDelta m_spDelta_6; 725 SearchPathDelta m_spDelta_7; 726 }; 727 struct 728 { 729 uint32_t m_value; 730 }; 731 } DW17; 732 733 // DW18 734 union 735 { 736 struct 737 { 738 SearchPathDelta m_spDelta_8; 739 SearchPathDelta m_spDelta_9; 740 SearchPathDelta m_spDelta_10; 741 SearchPathDelta m_spDelta_11; 742 }; 743 struct 744 { 745 uint32_t m_value; 746 }; 747 } DW18; 748 749 // DW19 750 union 751 { 752 struct 753 { 754 SearchPathDelta m_spDelta_12; 755 SearchPathDelta m_spDelta_13; 756 SearchPathDelta m_spDelta_14; 757 SearchPathDelta m_spDelta_15; 758 }; 759 struct 760 { 761 uint32_t m_value; 762 }; 763 } DW19; 764 765 // DW20 766 union 767 { 768 struct 769 { 770 SearchPathDelta m_spDelta_16; 771 SearchPathDelta m_spDelta_17; 772 SearchPathDelta m_spDelta_18; 773 SearchPathDelta m_spDelta_19; 774 }; 775 struct 776 { 777 uint32_t m_value; 778 }; 779 } DW20; 780 781 // DW21 782 union 783 { 784 struct 785 { 786 SearchPathDelta m_spDelta_20; 787 SearchPathDelta m_spDelta_21; 788 SearchPathDelta m_spDelta_22; 789 SearchPathDelta m_spDelta_23; 790 }; 791 struct 792 { 793 uint32_t m_value; 794 }; 795 } DW21; 796 797 // DW22 798 union 799 { 800 struct 801 { 802 SearchPathDelta m_spDelta_24; 803 SearchPathDelta m_spDelta_25; 804 SearchPathDelta m_spDelta_26; 805 SearchPathDelta m_spDelta_27; 806 }; 807 struct 808 { 809 uint32_t m_value; 810 }; 811 } DW22; 812 813 // DW23 814 union 815 { 816 struct 817 { 818 SearchPathDelta m_spDelta_28; 819 SearchPathDelta m_spDelta_29; 820 SearchPathDelta m_spDelta_30; 821 SearchPathDelta m_spDelta_31; 822 }; 823 struct 824 { 825 uint32_t m_value; 826 }; 827 } DW23; 828 829 // DW24 830 union 831 { 832 struct 833 { 834 SearchPathDelta m_spDelta_32; 835 SearchPathDelta m_spDelta_33; 836 SearchPathDelta m_spDelta_34; 837 SearchPathDelta m_spDelta_35; 838 }; 839 struct 840 { 841 uint32_t m_value; 842 }; 843 } DW24; 844 845 // DW25 846 union 847 { 848 struct 849 { 850 SearchPathDelta m_spDelta_36; 851 SearchPathDelta m_spDelta_37; 852 SearchPathDelta m_spDelta_38; 853 SearchPathDelta m_spDelta_39; 854 }; 855 struct 856 { 857 uint32_t m_value; 858 }; 859 } DW25; 860 861 // DW26 862 union 863 { 864 struct 865 { 866 SearchPathDelta m_spDelta_40; 867 SearchPathDelta m_spDelta_41; 868 SearchPathDelta m_spDelta_42; 869 SearchPathDelta m_spDelta_43; 870 }; 871 struct 872 { 873 uint32_t m_value; 874 }; 875 } DW26; 876 877 // DW27 878 union 879 { 880 struct 881 { 882 SearchPathDelta m_spDelta_44; 883 SearchPathDelta m_spDelta_45; 884 SearchPathDelta m_spDelta_46; 885 SearchPathDelta m_spDelta_47; 886 }; 887 struct 888 { 889 uint32_t m_value; 890 }; 891 } DW27; 892 893 // DW28 894 union 895 { 896 struct 897 { 898 SearchPathDelta m_spDelta_48; 899 SearchPathDelta m_spDelta_49; 900 SearchPathDelta m_spDelta_50; 901 SearchPathDelta m_spDelta_51; 902 }; 903 struct 904 { 905 uint32_t m_value; 906 }; 907 } DW28; 908 909 // DW29 910 union 911 { 912 struct 913 { 914 SearchPathDelta m_spDelta_52; 915 SearchPathDelta m_spDelta_53; 916 SearchPathDelta m_spDelta_54; 917 SearchPathDelta m_spDelta_55; 918 }; 919 struct 920 { 921 uint32_t m_value; 922 }; 923 } DW29; 924 925 // DW30 926 union 927 { 928 struct 929 { 930 uint32_t m_intra4x4ModeMask : MOS_BITFIELD_RANGE(0, 8); 931 uint32_t: MOS_BITFIELD_RANGE(9, 15); 932 uint32_t m_intra8x8ModeMask : MOS_BITFIELD_RANGE(16, 24); 933 uint32_t: MOS_BITFIELD_RANGE(25, 31); 934 }; 935 struct 936 { 937 uint32_t m_value; 938 }; 939 } DW30; 940 941 // DW31 942 union 943 { 944 struct 945 { 946 uint32_t m_intra16x16ModeMask : MOS_BITFIELD_RANGE(0, 3); 947 uint32_t m_intraChromaModeMask : MOS_BITFIELD_RANGE(4, 7); 948 uint32_t m_intraComputeType : MOS_BITFIELD_RANGE(8, 9); 949 uint32_t: MOS_BITFIELD_RANGE(10, 31); 950 }; 951 struct 952 { 953 uint32_t m_value; 954 }; 955 } DW31; 956 } SPDelta; 957 958 // DW32 959 union 960 { 961 struct 962 { 963 uint32_t m_skipVal : MOS_BITFIELD_RANGE(0, 15); 964 uint32_t m_multiPredL0Disable : MOS_BITFIELD_RANGE(16, 23); 965 uint32_t m_multiPredL1Disable : MOS_BITFIELD_RANGE(24, 31); 966 }; 967 struct 968 { 969 uint32_t m_value; 970 }; 971 } DW32; 972 973 // DW33 974 union 975 { 976 struct 977 { 978 uint32_t m_intra16x16NonDCPredPenalty : MOS_BITFIELD_RANGE(0, 7); 979 uint32_t m_intra8x8NonDCPredPenalty : MOS_BITFIELD_RANGE(8, 15); 980 uint32_t m_intra4x4NonDCPredPenalty : MOS_BITFIELD_RANGE(16, 23); 981 uint32_t : MOS_BITFIELD_RANGE(24, 31); 982 }; 983 struct 984 { 985 uint32_t m_value; 986 }; 987 } DW33; 988 989 // DW34 990 union 991 { 992 struct 993 { 994 uint32_t m_list0RefID0FieldParity : MOS_BITFIELD_BIT(0); 995 uint32_t m_list0RefID1FieldParity : MOS_BITFIELD_BIT(1); 996 uint32_t m_list0RefID2FieldParity : MOS_BITFIELD_BIT(2); 997 uint32_t m_list0RefID3FieldParity : MOS_BITFIELD_BIT(3); 998 uint32_t m_list0RefID4FieldParity : MOS_BITFIELD_BIT(4); 999 uint32_t m_list0RefID5FieldParity : MOS_BITFIELD_BIT(5); 1000 uint32_t m_list0RefID6FieldParity : MOS_BITFIELD_BIT(6); 1001 uint32_t m_list0RefID7FieldParity : MOS_BITFIELD_BIT(7); 1002 uint32_t m_list1RefID0FrameFieldFlag : MOS_BITFIELD_BIT(8); 1003 uint32_t m_list1RefID1FrameFieldFlag : MOS_BITFIELD_BIT(9); 1004 uint32_t m_IntraRefreshEn : MOS_BITFIELD_RANGE(10, 11); 1005 uint32_t m_arbitraryNumMbsPerSlice : MOS_BITFIELD_BIT(12); 1006 uint32_t m_tqEnable : MOS_BITFIELD_BIT(13); 1007 uint32_t m_forceNonSkipMbEnable : MOS_BITFIELD_BIT(14); 1008 uint32_t m_disableEncSkipCheck : MOS_BITFIELD_BIT(15); 1009 uint32_t m_enableDirectBiasAdjustment : MOS_BITFIELD_BIT(16); 1010 uint32_t m_bForceToSkip : MOS_BITFIELD_BIT(17); 1011 uint32_t m_enableGlobalMotionBiasAdjustment : MOS_BITFIELD_BIT(18); 1012 uint32_t m_enableAdaptiveTxDecision : MOS_BITFIELD_BIT(19); 1013 uint32_t m_enablePerMBStaticCheck : MOS_BITFIELD_BIT(20); 1014 uint32_t m_enableAdaptiveSearchWindowSize : MOS_BITFIELD_BIT(21); 1015 uint32_t m_removeIntraRefreshOverlap : MOS_BITFIELD_BIT(22); 1016 uint32_t m_cqpFlag : MOS_BITFIELD_BIT(23); 1017 uint32_t m_list1RefID0FieldParity : MOS_BITFIELD_BIT(24); 1018 uint32_t m_list1RefID1FieldParity : MOS_BITFIELD_BIT(25); 1019 uint32_t m_madEnableFlag : MOS_BITFIELD_BIT(26); 1020 uint32_t m_roiEnableFlag : MOS_BITFIELD_BIT(27); 1021 uint32_t m_enableMBFlatnessChkOptimization : MOS_BITFIELD_BIT(28); 1022 uint32_t m_bDirectMode : MOS_BITFIELD_BIT(29); 1023 uint32_t m_mbBrcEnable : MOS_BITFIELD_BIT(30); 1024 uint32_t m_bOriginalBff : MOS_BITFIELD_BIT(31); 1025 }; 1026 struct 1027 { 1028 uint32_t m_value; 1029 }; 1030 } DW34; 1031 1032 // DW35 1033 union 1034 { 1035 struct 1036 { 1037 uint32_t m_panicModeMBThreshold : MOS_BITFIELD_RANGE(0, 15); 1038 uint32_t m_smallMbSizeInWord : MOS_BITFIELD_RANGE(16, 23); 1039 uint32_t m_largeMbSizeInWord : MOS_BITFIELD_RANGE(24, 31); 1040 }; 1041 struct 1042 { 1043 uint32_t m_value; 1044 }; 1045 } DW35; 1046 1047 // DW36 1048 union 1049 { 1050 struct 1051 { 1052 uint32_t m_numRefIdxL0MinusOne : MOS_BITFIELD_RANGE(0, 7); 1053 uint32_t m_hmeCombinedExtraSUs : MOS_BITFIELD_RANGE(8, 15); 1054 uint32_t m_numRefIdxL1MinusOne : MOS_BITFIELD_RANGE(16, 23); 1055 uint32_t : MOS_BITFIELD_RANGE(24, 26); 1056 uint32_t m_mbInputEnable : MOS_BITFIELD_BIT(27); 1057 uint32_t m_isFwdFrameShortTermRef : MOS_BITFIELD_BIT(28); 1058 uint32_t m_checkAllFractionalEnable : MOS_BITFIELD_BIT(29); 1059 uint32_t m_hmeCombineOverlap : MOS_BITFIELD_RANGE(30, 31); 1060 }; 1061 struct 1062 { 1063 uint32_t m_value; 1064 }; 1065 } DW36; 1066 1067 // DW37 1068 union 1069 { 1070 struct 1071 { 1072 uint32_t m_skipModeEn : MOS_BITFIELD_BIT(0); 1073 uint32_t m_adaptiveEn : MOS_BITFIELD_BIT(1); 1074 uint32_t m_biMixDis : MOS_BITFIELD_BIT(2); 1075 uint32_t : MOS_BITFIELD_RANGE(3, 4); 1076 uint32_t m_earlyImeSuccessEn : MOS_BITFIELD_BIT(5); 1077 uint32_t : MOS_BITFIELD_BIT(6); 1078 uint32_t m_t8x8FlagForInterEn : MOS_BITFIELD_BIT(7); 1079 uint32_t : MOS_BITFIELD_RANGE(8, 23); 1080 uint32_t m_earlyImeStop : MOS_BITFIELD_RANGE(24, 31); 1081 }; 1082 struct 1083 { 1084 uint32_t m_value; 1085 }; 1086 } DW37; 1087 1088 // DW38 1089 union 1090 { 1091 struct 1092 { 1093 uint32_t m_lenSP : MOS_BITFIELD_RANGE(0, 7); 1094 uint32_t m_maxNumSU : MOS_BITFIELD_RANGE(8, 15); 1095 uint32_t m_refThreshold : MOS_BITFIELD_RANGE(16, 31); 1096 }; 1097 struct 1098 { 1099 uint32_t m_value; 1100 }; 1101 } DW38; 1102 1103 // DW39 1104 union 1105 { 1106 struct 1107 { 1108 uint32_t : MOS_BITFIELD_RANGE(0, 7); 1109 uint32_t m_hmeRefWindowsCombThreshold : MOS_BITFIELD_RANGE(8, 15); 1110 uint32_t m_refWidth : MOS_BITFIELD_RANGE(16, 23); 1111 uint32_t m_refHeight : MOS_BITFIELD_RANGE(24, 31); 1112 }; 1113 struct 1114 { 1115 uint32_t m_value; 1116 }; 1117 } DW39; 1118 1119 // DW40 1120 union 1121 { 1122 struct 1123 { 1124 uint32_t m_distScaleFactorRefID0List0 : MOS_BITFIELD_RANGE(0, 15); 1125 uint32_t m_distScaleFactorRefID1List0 : MOS_BITFIELD_RANGE(16, 31); 1126 }; 1127 struct 1128 { 1129 uint32_t m_value; 1130 }; 1131 } DW40; 1132 1133 // DW41 1134 union 1135 { 1136 struct 1137 { 1138 uint32_t m_distScaleFactorRefID2List0 : MOS_BITFIELD_RANGE(0, 15); 1139 uint32_t m_distScaleFactorRefID3List0 : MOS_BITFIELD_RANGE(16, 31); 1140 }; 1141 struct 1142 { 1143 uint32_t m_value; 1144 }; 1145 } DW41; 1146 1147 // DW42 1148 union 1149 { 1150 struct 1151 { 1152 uint32_t m_distScaleFactorRefID4List0 : MOS_BITFIELD_RANGE(0, 15); 1153 uint32_t m_distScaleFactorRefID5List0 : MOS_BITFIELD_RANGE(16, 31); 1154 }; 1155 struct 1156 { 1157 uint32_t m_value; 1158 }; 1159 } DW42; 1160 1161 // DW43 1162 union 1163 { 1164 struct 1165 { 1166 uint32_t m_distScaleFactorRefID6List0 : MOS_BITFIELD_RANGE(0, 15); 1167 uint32_t m_distScaleFactorRefID7List0 : MOS_BITFIELD_RANGE(16, 31); 1168 }; 1169 struct 1170 { 1171 uint32_t m_value; 1172 }; 1173 } DW43; 1174 1175 // DW44 1176 union 1177 { 1178 struct 1179 { 1180 uint32_t m_actualQPValueForRefID0List0 : MOS_BITFIELD_RANGE(0, 7); 1181 uint32_t m_actualQPValueForRefID1List0 : MOS_BITFIELD_RANGE(8, 15); 1182 uint32_t m_actualQPValueForRefID2List0 : MOS_BITFIELD_RANGE(16, 23); 1183 uint32_t m_actualQPValueForRefID3List0 : MOS_BITFIELD_RANGE(24, 31); 1184 }; 1185 struct 1186 { 1187 uint32_t m_value; 1188 }; 1189 } DW44; 1190 1191 // DW45 1192 union 1193 { 1194 struct 1195 { 1196 uint32_t m_actualQPValueForRefID4List0 : MOS_BITFIELD_RANGE(0, 7); 1197 uint32_t m_actualQPValueForRefID5List0 : MOS_BITFIELD_RANGE(8, 15); 1198 uint32_t m_actualQPValueForRefID6List0 : MOS_BITFIELD_RANGE(16, 23); 1199 uint32_t m_actualQPValueForRefID7List0 : MOS_BITFIELD_RANGE(24, 31); 1200 }; 1201 struct 1202 { 1203 uint32_t m_value; 1204 }; 1205 } DW45; 1206 1207 // DW46 1208 union 1209 { 1210 struct 1211 { 1212 uint32_t m_actualQPValueForRefID0List1 : MOS_BITFIELD_RANGE(0, 7); 1213 uint32_t m_actualQPValueForRefID1List1 : MOS_BITFIELD_RANGE(8, 15); 1214 uint32_t m_refCost : MOS_BITFIELD_RANGE(16, 31); 1215 }; 1216 struct 1217 { 1218 uint32_t m_value; 1219 }; 1220 } DW46; 1221 1222 // DW47 1223 union 1224 { 1225 struct 1226 { 1227 uint32_t m_mbQpReadFactor : MOS_BITFIELD_RANGE(0, 7); 1228 uint32_t m_intraCostSF : MOS_BITFIELD_RANGE(8, 15); 1229 uint32_t m_maxVmvR : MOS_BITFIELD_RANGE(16, 31); 1230 }; 1231 struct 1232 { 1233 uint32_t m_value; 1234 }; 1235 } DW47; 1236 1237 //DW48 1238 union 1239 { 1240 struct 1241 { 1242 uint32_t m_IntraRefreshMBx : MOS_BITFIELD_RANGE(0, 15); 1243 uint32_t m_IntraRefreshUnitInMBMinus1 : MOS_BITFIELD_RANGE(16, 23); 1244 uint32_t m_IntraRefreshQPDelta : MOS_BITFIELD_RANGE(24, 31); 1245 }; 1246 struct 1247 { 1248 uint32_t m_value; 1249 }; 1250 } DW48; 1251 1252 // DW49 1253 union 1254 { 1255 struct 1256 { 1257 uint32_t m_roi1XLeft : MOS_BITFIELD_RANGE(0, 15); 1258 uint32_t m_roi1YTop : MOS_BITFIELD_RANGE(16, 31); 1259 }; 1260 struct 1261 { 1262 uint32_t m_value; 1263 }; 1264 } DW49; 1265 1266 // DW50 1267 union 1268 { 1269 struct 1270 { 1271 uint32_t m_roi1XRight : MOS_BITFIELD_RANGE(0, 15); 1272 uint32_t m_roi1YBottom : MOS_BITFIELD_RANGE(16, 31); 1273 }; 1274 struct 1275 { 1276 uint32_t m_value; 1277 }; 1278 } DW50; 1279 1280 // DW51 1281 union 1282 { 1283 struct 1284 { 1285 uint32_t m_roi2XLeft : MOS_BITFIELD_RANGE(0, 15); 1286 uint32_t m_roi2YTop : MOS_BITFIELD_RANGE(16, 31); 1287 }; 1288 struct 1289 { 1290 uint32_t m_value; 1291 }; 1292 } DW51; 1293 1294 // DW52 1295 union 1296 { 1297 struct 1298 { 1299 uint32_t m_roi2XRight : MOS_BITFIELD_RANGE(0, 15); 1300 uint32_t m_roi2YBottom : MOS_BITFIELD_RANGE(16, 31); 1301 }; 1302 struct 1303 { 1304 uint32_t m_value; 1305 }; 1306 } DW52; 1307 1308 // DW53 1309 union 1310 { 1311 struct 1312 { 1313 uint32_t m_roi3XLeft : MOS_BITFIELD_RANGE(0, 15); 1314 uint32_t m_roi3YTop : MOS_BITFIELD_RANGE(16, 31); 1315 }; 1316 struct 1317 { 1318 uint32_t m_value; 1319 }; 1320 } DW53; 1321 1322 // DW54 1323 union 1324 { 1325 struct 1326 { 1327 uint32_t m_roi3XRight : MOS_BITFIELD_RANGE(0, 15); 1328 uint32_t m_roi3YBottom : MOS_BITFIELD_RANGE(16, 31); 1329 }; 1330 struct 1331 { 1332 uint32_t m_value; 1333 }; 1334 } DW54; 1335 1336 // DW55 1337 union 1338 { 1339 struct 1340 { 1341 uint32_t m_roi4XLeft : MOS_BITFIELD_RANGE(0, 15); 1342 uint32_t m_roi4YTop : MOS_BITFIELD_RANGE(16, 31); 1343 }; 1344 struct 1345 { 1346 uint32_t m_value; 1347 }; 1348 } DW55; 1349 1350 // DW56 1351 union 1352 { 1353 struct 1354 { 1355 uint32_t m_roi4XRight : MOS_BITFIELD_RANGE(0, 15); 1356 uint32_t m_roi4YBottom : MOS_BITFIELD_RANGE(16, 31); 1357 }; 1358 struct 1359 { 1360 uint32_t m_value; 1361 }; 1362 } DW56; 1363 1364 // DW57 1365 union 1366 { 1367 struct 1368 { 1369 uint32_t m_roi1dQpPrimeY : MOS_BITFIELD_RANGE(0, 7); 1370 uint32_t m_roi2dQpPrimeY : MOS_BITFIELD_RANGE(8, 15); 1371 uint32_t m_roi3dQpPrimeY : MOS_BITFIELD_RANGE(16, 23); 1372 uint32_t m_roi4dQpPrimeY : MOS_BITFIELD_RANGE(24, 31); 1373 }; 1374 struct 1375 { 1376 uint32_t m_value; 1377 }; 1378 } DW57; 1379 1380 // DW58 1381 union 1382 { 1383 struct 1384 { 1385 uint32_t m_lambda8x8Inter : MOS_BITFIELD_RANGE(0, 15); 1386 uint32_t m_lambda8x8Intra : MOS_BITFIELD_RANGE(16, 31); 1387 }; 1388 struct 1389 { 1390 uint32_t m_value; 1391 }; 1392 } DW58; 1393 1394 // DW59 1395 union 1396 { 1397 struct 1398 { 1399 uint32_t m_lambdaInter : MOS_BITFIELD_RANGE(0, 15); 1400 uint32_t m_lambdaIntra : MOS_BITFIELD_RANGE(16, 31); 1401 }; 1402 struct 1403 { 1404 uint32_t m_value; 1405 }; 1406 } DW59; 1407 1408 // DW60 1409 union 1410 { 1411 struct 1412 { 1413 uint32_t m_mbTextureThreshold : MOS_BITFIELD_RANGE(0, 15); 1414 uint32_t m_txDecisonThreshold : MOS_BITFIELD_RANGE(16, 31); 1415 }; 1416 struct 1417 { 1418 uint32_t m_value; 1419 }; 1420 } DW60; 1421 1422 // DW61 1423 union 1424 { 1425 struct 1426 { 1427 uint32_t m_hmeMVCostScalingFactor : MOS_BITFIELD_RANGE(0, 7); 1428 uint32_t m_reserved : MOS_BITFIELD_RANGE(8, 15); 1429 uint32_t m_IntraRefreshMBy : MOS_BITFIELD_RANGE(16, 31); 1430 }; 1431 struct 1432 { 1433 uint32_t m_value; 1434 }; 1435 } DW61; 1436 1437 // DW62 1438 union 1439 { 1440 struct 1441 { 1442 uint32_t m_IPCMQP0 : MOS_BITFIELD_RANGE(0, 7); 1443 uint32_t m_IPCMQP1 : MOS_BITFIELD_RANGE(8, 15); 1444 uint32_t m_IPCMQP2 : MOS_BITFIELD_RANGE(16, 23); 1445 uint32_t m_IPCMQP3 : MOS_BITFIELD_RANGE(24, 31); 1446 }; 1447 struct 1448 { 1449 uint32_t m_value; 1450 }; 1451 } DW62; 1452 1453 // DW63 1454 union 1455 { 1456 struct 1457 { 1458 uint32_t m_IPCMQP4 : MOS_BITFIELD_RANGE(0, 7); 1459 uint32_t m_reserved : MOS_BITFIELD_RANGE(8, 15); 1460 uint32_t m_IPCMThresh0 : MOS_BITFIELD_RANGE(16, 31); 1461 }; 1462 struct 1463 { 1464 uint32_t m_value; 1465 }; 1466 } DW63; 1467 1468 // DW64 1469 union 1470 { 1471 struct 1472 { 1473 uint32_t m_IPCMThresh1 : MOS_BITFIELD_RANGE(0, 15); 1474 uint32_t m_IPCMThresh2 : MOS_BITFIELD_RANGE(16, 31); 1475 }; 1476 struct 1477 { 1478 uint32_t m_value; 1479 }; 1480 } DW64; 1481 1482 // DW65 1483 union 1484 { 1485 struct 1486 { 1487 uint32_t m_IPCMThresh3 : MOS_BITFIELD_RANGE(0, 15); 1488 uint32_t m_IPCMThresh4 : MOS_BITFIELD_RANGE(16, 31); 1489 }; 1490 struct 1491 { 1492 uint32_t m_value; 1493 }; 1494 } DW65; 1495 1496 // DW66 1497 union 1498 { 1499 struct 1500 { 1501 uint32_t m_mbDataSurfIndex; 1502 }; 1503 struct 1504 { 1505 uint32_t m_value; 1506 }; 1507 } DW66; 1508 1509 // DW67 1510 union 1511 { 1512 struct 1513 { 1514 uint32_t m_mvDataSurfIndex; 1515 }; 1516 struct 1517 { 1518 uint32_t m_value; 1519 }; 1520 } DW67; 1521 1522 // DW68 1523 union 1524 { 1525 struct 1526 { 1527 uint32_t m_IDistSurfIndex; 1528 }; 1529 struct 1530 { 1531 uint32_t m_value; 1532 }; 1533 } DW68; 1534 1535 // DW69 1536 union 1537 { 1538 struct 1539 { 1540 uint32_t m_srcYSurfIndex; 1541 }; 1542 struct 1543 { 1544 uint32_t m_value; 1545 }; 1546 } DW69; 1547 1548 // DW70 1549 union 1550 { 1551 struct 1552 { 1553 uint32_t m_mbSpecificDataSurfIndex; 1554 }; 1555 struct 1556 { 1557 uint32_t m_value; 1558 }; 1559 } DW70; 1560 1561 // DW71 1562 union 1563 { 1564 struct 1565 { 1566 uint32_t m_auxVmeOutSurfIndex; 1567 }; 1568 struct 1569 { 1570 uint32_t m_value; 1571 }; 1572 } DW71; 1573 1574 // DW72 1575 union 1576 { 1577 struct 1578 { 1579 uint32_t m_currRefPicSelSurfIndex; 1580 }; 1581 struct 1582 { 1583 uint32_t m_value; 1584 }; 1585 } DW72; 1586 1587 // DW73 1588 union 1589 { 1590 struct 1591 { 1592 uint32_t m_hmeMVPredFwdBwdSurfIndex; 1593 }; 1594 struct 1595 { 1596 uint32_t m_value; 1597 }; 1598 } DW73; 1599 1600 // DW74 1601 union 1602 { 1603 struct 1604 { 1605 uint32_t m_hmeDistSurfIndex; 1606 }; 1607 struct 1608 { 1609 uint32_t m_value; 1610 }; 1611 } DW74; 1612 1613 // DW75 1614 union 1615 { 1616 struct 1617 { 1618 uint32_t m_sliceMapSurfIndex; 1619 }; 1620 struct 1621 { 1622 uint32_t m_value; 1623 }; 1624 } DW75; 1625 1626 // DW76 1627 union 1628 { 1629 struct 1630 { 1631 uint32_t m_fwdFrmMBDataSurfIndex; 1632 }; 1633 struct 1634 { 1635 uint32_t m_value; 1636 }; 1637 } DW76; 1638 1639 // DW77 1640 union 1641 { 1642 struct 1643 { 1644 uint32_t m_fwdFrmMVSurfIndex; 1645 }; 1646 struct 1647 { 1648 uint32_t m_value; 1649 }; 1650 } DW77; 1651 1652 // DW78 1653 union 1654 { 1655 struct 1656 { 1657 uint32_t m_mbQPBuffer; 1658 }; 1659 struct 1660 { 1661 uint32_t m_value; 1662 }; 1663 } DW78; 1664 1665 // DW79 1666 union 1667 { 1668 struct 1669 { 1670 uint32_t m_mbBRCLut; 1671 }; 1672 struct 1673 { 1674 uint32_t m_value; 1675 }; 1676 } DW79; 1677 1678 // DW80 1679 union 1680 { 1681 struct 1682 { 1683 uint32_t m_vmeInterPredictionSurfIndex; 1684 }; 1685 struct 1686 { 1687 uint32_t m_value; 1688 }; 1689 } DW80; 1690 1691 // DW81 1692 union 1693 { 1694 struct 1695 { 1696 uint32_t m_vmeInterPredictionMRSurfIndex; 1697 }; 1698 struct 1699 { 1700 uint32_t m_value; 1701 }; 1702 } DW81; 1703 1704 // DW82 1705 union 1706 { 1707 struct 1708 { 1709 uint32_t m_mbStatsSurfIndex; 1710 }; 1711 struct 1712 { 1713 uint32_t m_value; 1714 }; 1715 } DW82; 1716 1717 // DW83 1718 union 1719 { 1720 struct 1721 { 1722 uint32_t m_madSurfIndex; 1723 }; 1724 struct 1725 { 1726 uint32_t m_value; 1727 }; 1728 } DW83; 1729 1730 // DW84 1731 union 1732 { 1733 struct 1734 { 1735 uint32_t m_brcCurbeSurfIndex; 1736 }; 1737 struct 1738 { 1739 uint32_t m_value; 1740 }; 1741 } DW84; 1742 1743 // DW85 1744 union 1745 { 1746 struct 1747 { 1748 uint32_t m_forceNonSkipMBmapSurface; 1749 }; 1750 struct 1751 { 1752 uint32_t m_value; 1753 }; 1754 } DW85; 1755 1756 // DW86 1757 union 1758 { 1759 struct 1760 { 1761 uint32_t m_reservedIndex; 1762 }; 1763 struct 1764 { 1765 uint32_t m_value; 1766 }; 1767 } DW86; 1768 1769 // DW87 1770 union 1771 { 1772 struct 1773 { 1774 uint32_t m_staticDetectionCostTableIndex; 1775 }; 1776 struct 1777 { 1778 uint32_t m_value; 1779 }; 1780 } DW87; 1781 1782 // DW88 1783 union 1784 { 1785 struct 1786 { 1787 uint32_t m_swScoreboardIndex; 1788 }; 1789 struct 1790 { 1791 uint32_t m_value; 1792 }; 1793 } DW88; 1794 } m_curbe; 1795 }; 1796 1797 class CodechalEncodeAvcEncG12::BrcInitResetCurbe 1798 { 1799 public: BrcInitResetCurbe()1800 BrcInitResetCurbe() 1801 { 1802 m_brcInitResetCurbeCmd.m_dw0.m_value = 0; 1803 m_brcInitResetCurbeCmd.m_dw1.m_value = 0; 1804 m_brcInitResetCurbeCmd.m_dw2.m_value = 0; 1805 m_brcInitResetCurbeCmd.m_dw3.m_value = 0; 1806 m_brcInitResetCurbeCmd.m_dw4.m_value = 0; 1807 m_brcInitResetCurbeCmd.m_dw5.m_value = 0; 1808 m_brcInitResetCurbeCmd.m_dw6.m_value = 0; 1809 m_brcInitResetCurbeCmd.m_dw7.m_value = 0; 1810 m_brcInitResetCurbeCmd.m_dw8.m_value = 0; 1811 m_brcInitResetCurbeCmd.m_dw9.m_value = 0; 1812 m_brcInitResetCurbeCmd.m_dw10.m_value = 0; 1813 m_brcInitResetCurbeCmd.m_dw11.m_avbrConvergence = 0; 1814 m_brcInitResetCurbeCmd.m_dw11.m_minQP = 1; 1815 m_brcInitResetCurbeCmd.m_dw12.m_maxQP = 51; 1816 m_brcInitResetCurbeCmd.m_dw12.m_noSlices = 0; 1817 m_brcInitResetCurbeCmd.m_dw13.m_instantRateThreshold0ForP = 40; 1818 m_brcInitResetCurbeCmd.m_dw13.m_instantRateThreshold1ForP = 60; 1819 m_brcInitResetCurbeCmd.m_dw13.m_instantRateThreshold2ForP = 80; 1820 m_brcInitResetCurbeCmd.m_dw13.m_instantRateThreshold3ForP = 120; 1821 m_brcInitResetCurbeCmd.m_dw14.m_instantRateThreshold0ForB = 35; 1822 m_brcInitResetCurbeCmd.m_dw14.m_instantRateThreshold1ForB = 60; 1823 m_brcInitResetCurbeCmd.m_dw14.m_instantRateThreshold2ForB = 80; 1824 m_brcInitResetCurbeCmd.m_dw14.m_instantRateThreshold3ForB = 120; 1825 m_brcInitResetCurbeCmd.m_dw15.m_instantRateThreshold0ForI = 40; 1826 m_brcInitResetCurbeCmd.m_dw15.m_instantRateThreshold1ForI = 60; 1827 m_brcInitResetCurbeCmd.m_dw15.m_instantRateThreshold2ForI = 90; 1828 m_brcInitResetCurbeCmd.m_dw15.m_instantRateThreshold3ForI = 115; 1829 m_brcInitResetCurbeCmd.m_dw16.m_value = 0; 1830 m_brcInitResetCurbeCmd.m_dw17.m_value = 0; 1831 m_brcInitResetCurbeCmd.m_dw18.m_value = 0; 1832 m_brcInitResetCurbeCmd.m_dw19.m_value = 0; 1833 m_brcInitResetCurbeCmd.m_dw20.m_value = 0; 1834 m_brcInitResetCurbeCmd.m_dw21.m_value = 0; 1835 m_brcInitResetCurbeCmd.m_dw22.m_value = 0; 1836 m_brcInitResetCurbeCmd.m_dw23.m_value = 0; 1837 m_brcInitResetCurbeCmd.m_dw24.m_value = 0; 1838 m_brcInitResetCurbeCmd.m_dw25.m_value = 0; 1839 m_brcInitResetCurbeCmd.m_dw26.m_value = 0; 1840 m_brcInitResetCurbeCmd.m_dw27.m_value = 0; 1841 m_brcInitResetCurbeCmd.m_dw28.m_value = 0; 1842 m_brcInitResetCurbeCmd.m_dw29.m_value = 0; 1843 m_brcInitResetCurbeCmd.m_dw30.m_value = 0; 1844 m_brcInitResetCurbeCmd.m_dw31.m_value = 0; 1845 m_brcInitResetCurbeCmd.m_dw32.m_value = 0; 1846 m_brcInitResetCurbeCmd.m_dw33.m_value = 0; 1847 } 1848 1849 struct 1850 { 1851 union 1852 { 1853 struct 1854 { 1855 uint32_t m_profileLevelMaxFrame; 1856 }; 1857 struct 1858 { 1859 uint32_t m_value; 1860 }; 1861 } m_dw0; 1862 1863 union 1864 { 1865 struct 1866 { 1867 uint32_t m_initBufFullInBits; 1868 }; 1869 struct 1870 { 1871 uint32_t m_value; 1872 }; 1873 } m_dw1; 1874 1875 union 1876 { 1877 struct 1878 { 1879 uint32_t m_bufSizeInBits; 1880 }; 1881 struct 1882 { 1883 uint32_t m_value; 1884 }; 1885 } m_dw2; 1886 1887 union 1888 { 1889 struct 1890 { 1891 uint32_t m_averageBitRate; 1892 }; 1893 struct 1894 { 1895 uint32_t m_value; 1896 }; 1897 } m_dw3; 1898 1899 union 1900 { 1901 struct 1902 { 1903 uint32_t m_maxBitRate; 1904 }; 1905 struct 1906 { 1907 uint32_t m_value; 1908 }; 1909 } m_dw4; 1910 1911 union 1912 { 1913 struct 1914 { 1915 uint32_t m_minBitRate; 1916 }; 1917 struct 1918 { 1919 uint32_t m_value; 1920 }; 1921 } m_dw5; 1922 1923 union 1924 { 1925 struct 1926 { 1927 uint32_t m_frameRateM; 1928 }; 1929 struct 1930 { 1931 uint32_t m_value; 1932 }; 1933 } m_dw6; 1934 1935 union 1936 { 1937 struct 1938 { 1939 uint32_t m_frameRateD; 1940 }; 1941 struct 1942 { 1943 uint32_t m_value; 1944 }; 1945 } m_dw7; 1946 1947 union 1948 { 1949 struct 1950 { 1951 uint32_t m_brcFlag : MOS_BITFIELD_RANGE(0, 15); 1952 uint32_t m_gopP : MOS_BITFIELD_RANGE(16, 31); 1953 }; 1954 struct 1955 { 1956 uint32_t m_value; 1957 }; 1958 } m_dw8; 1959 1960 union 1961 { 1962 struct 1963 { 1964 uint32_t m_gopB : MOS_BITFIELD_RANGE(0, 15); 1965 uint32_t m_frameWidthInBytes : MOS_BITFIELD_RANGE(16, 31); 1966 }; 1967 struct 1968 { 1969 uint32_t m_value; 1970 }; 1971 } m_dw9; 1972 1973 union 1974 { 1975 struct 1976 { 1977 uint32_t m_frameHeightInBytes : MOS_BITFIELD_RANGE(0, 15); 1978 uint32_t m_avbrAccuracy : MOS_BITFIELD_RANGE(16, 31); 1979 }; 1980 struct 1981 { 1982 uint32_t m_value; 1983 }; 1984 } m_dw10; 1985 1986 union 1987 { 1988 struct 1989 { 1990 uint32_t m_avbrConvergence : MOS_BITFIELD_RANGE(0, 15); 1991 uint32_t m_minQP : MOS_BITFIELD_RANGE(16, 31); 1992 }; 1993 struct 1994 { 1995 uint32_t m_value; 1996 }; 1997 } m_dw11; 1998 1999 union 2000 { 2001 struct 2002 { 2003 uint32_t m_maxQP : MOS_BITFIELD_RANGE(0, 15); 2004 uint32_t m_noSlices : MOS_BITFIELD_RANGE(16, 31); 2005 }; 2006 struct 2007 { 2008 uint32_t m_value; 2009 }; 2010 } m_dw12; 2011 2012 union 2013 { 2014 struct 2015 { 2016 uint32_t m_instantRateThreshold0ForP : MOS_BITFIELD_RANGE(0, 7); 2017 uint32_t m_instantRateThreshold1ForP : MOS_BITFIELD_RANGE(8, 15); 2018 uint32_t m_instantRateThreshold2ForP : MOS_BITFIELD_RANGE(16, 23); 2019 uint32_t m_instantRateThreshold3ForP : MOS_BITFIELD_RANGE(24, 31); 2020 }; 2021 struct 2022 { 2023 uint32_t m_value; 2024 }; 2025 } m_dw13; 2026 2027 union 2028 { 2029 struct 2030 { 2031 uint32_t m_instantRateThreshold0ForB : MOS_BITFIELD_RANGE(0, 7); 2032 uint32_t m_instantRateThreshold1ForB : MOS_BITFIELD_RANGE(8, 15); 2033 uint32_t m_instantRateThreshold2ForB : MOS_BITFIELD_RANGE(16, 23); 2034 uint32_t m_instantRateThreshold3ForB : MOS_BITFIELD_RANGE(24, 31); 2035 }; 2036 struct 2037 { 2038 uint32_t m_value; 2039 }; 2040 } m_dw14; 2041 2042 union 2043 { 2044 struct 2045 { 2046 uint32_t m_instantRateThreshold0ForI : MOS_BITFIELD_RANGE(0, 7); 2047 uint32_t m_instantRateThreshold1ForI : MOS_BITFIELD_RANGE(8, 15); 2048 uint32_t m_instantRateThreshold2ForI : MOS_BITFIELD_RANGE(16, 23); 2049 uint32_t m_instantRateThreshold3ForI : MOS_BITFIELD_RANGE(24, 31); 2050 }; 2051 struct 2052 { 2053 uint32_t m_value; 2054 }; 2055 } m_dw15; 2056 2057 union 2058 { 2059 struct 2060 { 2061 uint32_t m_deviationThreshold0ForPandB : MOS_BITFIELD_RANGE(0, 7); //<! Signed byte 2062 uint32_t m_deviationThreshold1ForPandB : MOS_BITFIELD_RANGE(8, 15); //<! Signed byte 2063 uint32_t m_deviationThreshold2ForPandB : MOS_BITFIELD_RANGE(16, 23); //<! Signed byte 2064 uint32_t m_deviationThreshold3ForPandB : MOS_BITFIELD_RANGE(24, 31); //<! Signed byte 2065 }; 2066 struct 2067 { 2068 uint32_t m_value; 2069 }; 2070 } m_dw16; 2071 2072 union 2073 { 2074 struct 2075 { 2076 uint32_t m_deviationThreshold4ForPandB : MOS_BITFIELD_RANGE(0, 7); //<! Signed byte 2077 uint32_t m_deviationThreshold5ForPandB : MOS_BITFIELD_RANGE(8, 15); //<! Signed byte 2078 uint32_t m_deviationThreshold6ForPandB : MOS_BITFIELD_RANGE(16, 23); //<! Signed byte 2079 uint32_t m_deviationThreshold7ForPandB : MOS_BITFIELD_RANGE(24, 31); //<! Signed byte 2080 }; 2081 struct 2082 { 2083 uint32_t m_value; 2084 }; 2085 } m_dw17; 2086 2087 union 2088 { 2089 struct 2090 { 2091 uint32_t m_deviationThreshold0ForVBR : MOS_BITFIELD_RANGE(0, 7); //<! Signed byte 2092 uint32_t m_deviationThreshold1ForVBR : MOS_BITFIELD_RANGE(8, 15); //<! Signed byte 2093 uint32_t m_deviationThreshold2ForVBR : MOS_BITFIELD_RANGE(16, 23); //<! Signed byte 2094 uint32_t m_deviationThreshold3ForVBR : MOS_BITFIELD_RANGE(24, 31); //<! Signed byte 2095 }; 2096 struct 2097 { 2098 uint32_t m_value; 2099 }; 2100 } m_dw18; 2101 2102 union 2103 { 2104 struct 2105 { 2106 uint32_t m_deviationThreshold4ForVBR : MOS_BITFIELD_RANGE(0, 7); //<! Signed byte 2107 uint32_t m_deviationThreshold5ForVBR : MOS_BITFIELD_RANGE(8, 15); //<! Signed byte 2108 uint32_t m_deviationThreshold6ForVBR : MOS_BITFIELD_RANGE(16, 23); //<! Signed byte 2109 uint32_t m_deviationThreshold7ForVBR : MOS_BITFIELD_RANGE(24, 31); //<! Signed byte 2110 }; 2111 struct 2112 { 2113 uint32_t m_value; 2114 }; 2115 } m_dw19; 2116 2117 union 2118 { 2119 struct 2120 { 2121 uint32_t m_deviationThreshold0ForI : MOS_BITFIELD_RANGE(0, 7); //<! Signed byte 2122 uint32_t m_deviationThreshold1ForI : MOS_BITFIELD_RANGE(8, 15); //<! Signed byte 2123 uint32_t m_deviationThreshold2ForI : MOS_BITFIELD_RANGE(16, 23); //<! Signed byte 2124 uint32_t m_deviationThreshold3ForI : MOS_BITFIELD_RANGE(24, 31); //<! Signed byte 2125 }; 2126 struct 2127 { 2128 uint32_t m_value; 2129 }; 2130 } m_dw20; 2131 2132 union 2133 { 2134 struct 2135 { 2136 uint32_t m_deviationThreshold4ForI : MOS_BITFIELD_RANGE(0, 7); //<! Signed byte 2137 uint32_t m_deviationThreshold5ForI : MOS_BITFIELD_RANGE(8, 15); //<! Signed byte 2138 uint32_t m_deviationThreshold6ForI : MOS_BITFIELD_RANGE(16, 23); //<! Signed byte 2139 uint32_t m_deviationThreshold7ForI : MOS_BITFIELD_RANGE(24, 31); //<! Signed byte 2140 }; 2141 struct 2142 { 2143 uint32_t m_value; 2144 }; 2145 } m_dw21; 2146 2147 union 2148 { 2149 struct 2150 { 2151 uint32_t m_initialQPForI : MOS_BITFIELD_RANGE(0, 7); //<! Signed byte 2152 uint32_t m_initialQPForP : MOS_BITFIELD_RANGE(8, 15); //<! Signed byte 2153 uint32_t m_initialQPForB : MOS_BITFIELD_RANGE(16, 23); //<! Signed byte 2154 uint32_t m_slidingWindowSize : MOS_BITFIELD_RANGE(24, 31); //<! unsigned byte 2155 }; 2156 struct 2157 { 2158 uint32_t m_value; 2159 }; 2160 } m_dw22; 2161 2162 union 2163 { 2164 struct 2165 { 2166 uint32_t m_aCQP; 2167 }; 2168 struct 2169 { 2170 uint32_t m_value; 2171 }; 2172 } m_dw23; 2173 2174 union 2175 { 2176 struct 2177 { 2178 uint32_t m_longTermInterval : MOS_BITFIELD_RANGE(0, 15); 2179 uint32_t m_reserved : MOS_BITFIELD_RANGE(16, 31); 2180 }; 2181 struct 2182 { 2183 uint32_t m_value; 2184 }; 2185 } m_dw24; 2186 2187 union 2188 { 2189 struct 2190 { 2191 uint32_t m_reserved; 2192 }; 2193 struct 2194 { 2195 uint32_t m_value; 2196 }; 2197 } m_dw25; 2198 2199 union 2200 { 2201 struct 2202 { 2203 uint32_t m_reserved; 2204 }; 2205 struct 2206 { 2207 uint32_t m_value; 2208 }; 2209 } m_dw26; 2210 2211 union 2212 { 2213 struct 2214 { 2215 uint32_t m_reserved; 2216 }; 2217 struct 2218 { 2219 uint32_t m_value; 2220 }; 2221 } m_dw27; 2222 2223 union 2224 { 2225 struct 2226 { 2227 uint32_t m_reserved; 2228 }; 2229 struct 2230 { 2231 uint32_t m_value; 2232 }; 2233 } m_dw28; 2234 2235 union 2236 { 2237 struct 2238 { 2239 uint32_t m_reserved; 2240 }; 2241 struct 2242 { 2243 uint32_t m_value; 2244 }; 2245 } m_dw29; 2246 2247 union 2248 { 2249 struct 2250 { 2251 uint32_t m_reserved; 2252 }; 2253 struct 2254 { 2255 uint32_t m_value; 2256 }; 2257 } m_dw30; 2258 2259 union 2260 { 2261 struct 2262 { 2263 uint32_t m_reserved; 2264 }; 2265 struct 2266 { 2267 uint32_t m_value; 2268 }; 2269 } m_dw31; 2270 2271 union 2272 { 2273 struct 2274 { 2275 uint32_t m_surfaceIndexHistorybuffer; 2276 }; 2277 struct 2278 { 2279 uint32_t m_value; 2280 }; 2281 } m_dw32; 2282 2283 union 2284 { 2285 struct 2286 { 2287 uint32_t m_surfaceIndexDistortionbuffer; 2288 }; 2289 struct 2290 { 2291 uint32_t m_value; 2292 }; 2293 } m_dw33; 2294 } m_brcInitResetCurbeCmd; 2295 }; 2296 2297 class CodechalEncodeAvcEncG12::MbBrcUpdateCurbe 2298 { 2299 public: MbBrcUpdateCurbe()2300 MbBrcUpdateCurbe() 2301 { 2302 memset((void *)&m_mbBrcUpdateCurbeCmd, 0, sizeof(MbBrcUpdateCurbe)); 2303 } 2304 2305 struct 2306 { 2307 union 2308 { 2309 struct 2310 { 2311 uint32_t m_currFrameType : MOS_BITFIELD_RANGE(0, 7); 2312 uint32_t m_enableROI : MOS_BITFIELD_RANGE(8, 15); 2313 uint32_t m_roiRatio : MOS_BITFIELD_RANGE(16, 23); 2314 uint32_t m_reserved : MOS_BITFIELD_RANGE(24, 31); 2315 }; 2316 struct 2317 { 2318 uint32_t m_value; 2319 }; 2320 } DW0; 2321 2322 union 2323 { 2324 struct 2325 { 2326 uint32_t m_reserved; 2327 }; 2328 struct 2329 { 2330 uint32_t m_value; 2331 }; 2332 } DW1; 2333 2334 union 2335 { 2336 struct 2337 { 2338 uint32_t m_reserved; 2339 }; 2340 struct 2341 { 2342 uint32_t m_value; 2343 }; 2344 } DW2; 2345 2346 union 2347 { 2348 struct 2349 { 2350 uint32_t m_reserved; 2351 }; 2352 struct 2353 { 2354 uint32_t m_value; 2355 }; 2356 } DW3; 2357 2358 union 2359 { 2360 struct 2361 { 2362 uint32_t m_reserved; 2363 }; 2364 struct 2365 { 2366 uint32_t m_value; 2367 }; 2368 } DW4; 2369 2370 union 2371 { 2372 struct 2373 { 2374 uint32_t m_reserved; 2375 }; 2376 struct 2377 { 2378 uint32_t m_value; 2379 }; 2380 } DW5; 2381 2382 union 2383 { 2384 struct 2385 { 2386 uint32_t m_reserved; 2387 }; 2388 struct 2389 { 2390 uint32_t m_value; 2391 }; 2392 } DW6; 2393 2394 union 2395 { 2396 struct 2397 { 2398 uint32_t m_reserved;; 2399 }; 2400 struct 2401 { 2402 uint32_t m_value; 2403 }; 2404 } DW7; 2405 2406 union 2407 { 2408 struct 2409 { 2410 uint32_t m_historyBufferIndex; 2411 }; 2412 struct 2413 { 2414 uint32_t m_value; 2415 }; 2416 } DW8; 2417 2418 union 2419 { 2420 struct 2421 { 2422 uint32_t m_mbqpBufferIndex; 2423 }; 2424 struct 2425 { 2426 uint32_t m_value; 2427 }; 2428 } DW9; 2429 2430 union 2431 { 2432 struct 2433 { 2434 uint32_t m_roiBufferIndex; 2435 }; 2436 struct 2437 { 2438 uint32_t m_value; 2439 }; 2440 } DW10; 2441 2442 union 2443 { 2444 struct 2445 { 2446 uint32_t m_mbStatisticalBufferIndex; 2447 }; 2448 struct 2449 { 2450 uint32_t m_value; 2451 }; 2452 } DW11; 2453 2454 } m_mbBrcUpdateCurbeCmd; 2455 }; 2456 2457 class CodechalEncodeAvcEncG12::FrameBrcUpdateCurbe 2458 { 2459 public: 2460 2461 struct 2462 { 2463 union 2464 { 2465 struct 2466 { 2467 uint32_t m_targetSize; 2468 }; 2469 struct 2470 { 2471 uint32_t m_value; 2472 }; 2473 } m_dw0; 2474 2475 union 2476 { 2477 struct 2478 { 2479 uint32_t m_frameNumber; 2480 }; 2481 struct 2482 { 2483 uint32_t m_value; 2484 }; 2485 } m_dw1; 2486 2487 union 2488 { 2489 struct 2490 { 2491 uint32_t m_sizeofPicHeaders; 2492 }; 2493 struct 2494 { 2495 uint32_t m_value; 2496 }; 2497 } m_dw2; 2498 2499 union 2500 { 2501 struct 2502 { 2503 uint32_t m_startGAdjFrame0 : MOS_BITFIELD_RANGE(0, 15); 2504 uint32_t m_startGAdjFrame1 : MOS_BITFIELD_RANGE(16, 31); 2505 }; 2506 struct 2507 { 2508 uint32_t m_value; 2509 }; 2510 } m_dw3; 2511 2512 union 2513 { 2514 struct 2515 { 2516 uint32_t m_startGAdjFrame2 : MOS_BITFIELD_RANGE(0, 15); 2517 uint32_t m_startGAdjFrame3 : MOS_BITFIELD_RANGE(16, 31); 2518 }; 2519 struct 2520 { 2521 uint32_t m_value; 2522 }; 2523 } m_dw4; 2524 2525 union 2526 { 2527 struct 2528 { 2529 uint32_t m_targetSizeFlag : MOS_BITFIELD_RANGE(0, 7); 2530 uint32_t m_brcFlag : MOS_BITFIELD_RANGE(8, 15); 2531 uint32_t m_maxNumPAKs : MOS_BITFIELD_RANGE(16, 23); 2532 uint32_t m_currFrameType : MOS_BITFIELD_RANGE(24, 31); 2533 }; 2534 struct 2535 { 2536 uint32_t m_value; 2537 }; 2538 } m_dw5; 2539 2540 union 2541 { 2542 struct 2543 { 2544 uint32_t m_numSkipFrames : MOS_BITFIELD_RANGE(0, 7); 2545 uint32_t m_minimumQP : MOS_BITFIELD_RANGE(8, 15); 2546 uint32_t m_maximumQP : MOS_BITFIELD_RANGE(16, 23); 2547 uint32_t m_enableForceToSkip : MOS_BITFIELD_BIT(24); 2548 uint32_t m_enableSlidingWindow : MOS_BITFIELD_BIT(25); 2549 uint32_t m_enableExtremLowDelay : MOS_BITFIELD_BIT(26); 2550 uint32_t m_disableVarCompute : MOS_BITFIELD_BIT(27 ); 2551 uint32_t m_reserved : MOS_BITFIELD_RANGE(28, 31); 2552 }; 2553 struct 2554 { 2555 uint32_t m_value; 2556 }; 2557 } m_dw6; 2558 2559 union 2560 { 2561 struct 2562 { 2563 uint32_t m_sizeSkipFrames; 2564 }; 2565 struct 2566 { 2567 uint32_t m_value; 2568 }; 2569 } m_dw7; 2570 2571 union 2572 { 2573 struct 2574 { 2575 uint32_t m_startGlobalAdjustMult0 : MOS_BITFIELD_RANGE(0, 7); 2576 uint32_t m_startGlobalAdjustMult1 : MOS_BITFIELD_RANGE(8, 15); 2577 uint32_t m_startGlobalAdjustMult2 : MOS_BITFIELD_RANGE(16, 23); 2578 uint32_t m_startGlobalAdjustMult3 : MOS_BITFIELD_RANGE(24, 31); 2579 }; 2580 struct 2581 { 2582 uint32_t m_value; 2583 }; 2584 } m_dw8; 2585 2586 union 2587 { 2588 struct 2589 { 2590 uint32_t m_startGlobalAdjustMult4 : MOS_BITFIELD_RANGE(0, 7); 2591 uint32_t m_startGlobalAdjustDiv0 : MOS_BITFIELD_RANGE(8, 15); 2592 uint32_t m_startGlobalAdjustDiv1 : MOS_BITFIELD_RANGE(16, 23); 2593 uint32_t m_startGlobalAdjustDiv2 : MOS_BITFIELD_RANGE(24, 31); 2594 }; 2595 struct 2596 { 2597 uint32_t m_value; 2598 }; 2599 } m_dw9; 2600 2601 union 2602 { 2603 struct 2604 { 2605 uint32_t m_startGlobalAdjustDiv3 : MOS_BITFIELD_RANGE(0, 7); 2606 uint32_t m_startGlobalAdjustDiv4 : MOS_BITFIELD_RANGE(8, 15); 2607 uint32_t m_qpThreshold0 : MOS_BITFIELD_RANGE(16, 23); 2608 uint32_t m_qpThreshold1 : MOS_BITFIELD_RANGE(24, 31); 2609 }; 2610 struct 2611 { 2612 uint32_t m_value; 2613 }; 2614 } m_dw10; 2615 2616 union 2617 { 2618 struct 2619 { 2620 uint32_t m_qpThreshold2 : MOS_BITFIELD_RANGE(0, 7); 2621 uint32_t m_qpThreshold3 : MOS_BITFIELD_RANGE(8, 15); 2622 uint32_t m_gRateRatioThreshold0 : MOS_BITFIELD_RANGE(16, 23); 2623 uint32_t m_gRateRatioThreshold1 : MOS_BITFIELD_RANGE(24, 31); 2624 }; 2625 struct 2626 { 2627 uint32_t m_value; 2628 }; 2629 } m_dw11; 2630 2631 union 2632 { 2633 struct 2634 { 2635 uint32_t m_gRateRatioThreshold2 : MOS_BITFIELD_RANGE(0, 7); 2636 uint32_t m_gRateRatioThreshold3 : MOS_BITFIELD_RANGE(8, 15); 2637 uint32_t m_gRateRatioThreshold4 : MOS_BITFIELD_RANGE(16, 23); 2638 uint32_t m_gRateRatioThreshold5 : MOS_BITFIELD_RANGE(24, 31); 2639 }; 2640 struct 2641 { 2642 uint32_t m_value; 2643 }; 2644 } m_dw12; 2645 2646 union 2647 { 2648 struct 2649 { 2650 uint32_t m_gRateRatioThresholdQP0 : MOS_BITFIELD_RANGE(0, 7); 2651 uint32_t m_gRateRatioThresholdQP1 : MOS_BITFIELD_RANGE(8, 15); 2652 uint32_t m_gRateRatioThresholdQP2 : MOS_BITFIELD_RANGE(16, 23); 2653 uint32_t m_gRateRatioThresholdQP3 : MOS_BITFIELD_RANGE(24, 31); 2654 }; 2655 struct 2656 { 2657 uint32_t m_value; 2658 }; 2659 } m_dw13; 2660 2661 union 2662 { 2663 struct 2664 { 2665 uint32_t m_gRateRatioThresholdQP4 : MOS_BITFIELD_RANGE(0, 7); 2666 uint32_t m_gRateRatioThresholdQP5 : MOS_BITFIELD_RANGE(8, 15); 2667 uint32_t m_gRateRatioThresholdQP6 : MOS_BITFIELD_RANGE(16, 23); 2668 uint32_t m_qpIndexOfCurPic : MOS_BITFIELD_RANGE(24, 31); 2669 }; 2670 struct 2671 { 2672 uint32_t m_value; 2673 }; 2674 } m_dw14; 2675 2676 union 2677 { 2678 struct 2679 { 2680 uint32_t m_reserved : MOS_BITFIELD_RANGE(0, 7); 2681 uint32_t m_enableROI : MOS_BITFIELD_RANGE(8, 15); 2682 uint32_t m_roundingIntra : MOS_BITFIELD_RANGE(16, 23); 2683 uint32_t m_roundingInter : MOS_BITFIELD_RANGE(24, 31); 2684 }; 2685 struct 2686 { 2687 uint32_t m_value; 2688 }; 2689 } m_dw15; 2690 2691 union 2692 { 2693 struct 2694 { 2695 uint32_t m_reserved; 2696 }; 2697 struct 2698 { 2699 uint32_t m_value; 2700 }; 2701 } m_dw16; 2702 2703 union 2704 { 2705 struct 2706 { 2707 uint32_t m_reserved; 2708 }; 2709 struct 2710 { 2711 uint32_t m_value; 2712 }; 2713 } m_dw17; 2714 2715 union 2716 { 2717 struct 2718 { 2719 uint32_t m_reserved; 2720 }; 2721 struct 2722 { 2723 uint32_t m_value; 2724 }; 2725 } m_dw18; 2726 2727 union 2728 { 2729 struct 2730 { 2731 uint32_t m_userMaxFrame; 2732 }; 2733 struct 2734 { 2735 uint32_t m_value; 2736 }; 2737 } m_dw19; 2738 2739 union 2740 { 2741 struct 2742 { 2743 uint32_t m_reserved; 2744 }; 2745 struct 2746 { 2747 uint32_t m_value; 2748 }; 2749 } m_dw20; 2750 2751 union 2752 { 2753 struct 2754 { 2755 uint32_t m_reserved; 2756 }; 2757 struct 2758 { 2759 uint32_t m_value; 2760 }; 2761 } m_dw21; 2762 2763 union 2764 { 2765 struct 2766 { 2767 uint32_t m_reserved; 2768 }; 2769 struct 2770 { 2771 uint32_t m_value; 2772 }; 2773 } m_dw22; 2774 2775 union 2776 { 2777 struct 2778 { 2779 uint32_t m_reserved; 2780 }; 2781 struct 2782 { 2783 uint32_t m_value; 2784 }; 2785 } m_dw23; 2786 2787 union 2788 { 2789 struct 2790 { 2791 uint32_t m_surfaceIndexBRCHistorybuffer; 2792 }; 2793 struct 2794 { 2795 uint32_t m_value; 2796 }; 2797 } m_dw24; 2798 2799 union 2800 { 2801 struct 2802 { 2803 uint32_t m_surfaceIndexPreciousPAKStatisticsOutputbuffer; 2804 }; 2805 struct 2806 { 2807 uint32_t m_value; 2808 }; 2809 } m_dw25; 2810 2811 union 2812 { 2813 struct 2814 { 2815 uint32_t m_surfaceIndexAVCIMGStateInputbuffer; 2816 }; 2817 struct 2818 { 2819 uint32_t m_value; 2820 }; 2821 } m_dw26; 2822 2823 union 2824 { 2825 struct 2826 { 2827 uint32_t m_surfaceIndexAVCIMGStateOutputbuffer; 2828 }; 2829 struct 2830 { 2831 uint32_t m_value; 2832 }; 2833 } m_dw27; 2834 2835 union 2836 { 2837 struct 2838 { 2839 uint32_t m_surfaceIndexAVC_Encbuffer; 2840 }; 2841 struct 2842 { 2843 uint32_t m_value; 2844 }; 2845 } m_dw28; 2846 2847 union 2848 { 2849 struct 2850 { 2851 uint32_t m_surfaceIndexAVCDistortionbuffer; 2852 }; 2853 struct 2854 { 2855 uint32_t m_value; 2856 }; 2857 } m_dw29; 2858 2859 union 2860 { 2861 struct 2862 { 2863 uint32_t m_surfaceIndexBRCConstdatabuffer; 2864 }; 2865 struct 2866 { 2867 uint32_t m_value; 2868 }; 2869 } m_dw30; 2870 2871 union 2872 { 2873 struct 2874 { 2875 uint32_t m_surfaceIndexMBStatsbuffer; 2876 }; 2877 struct 2878 { 2879 uint32_t m_value; 2880 }; 2881 } m_dw31; 2882 2883 union 2884 { 2885 struct 2886 { 2887 uint32_t m_surfaceIndexMotionVectorbuffer; 2888 }; 2889 struct 2890 { 2891 uint32_t m_value; 2892 }; 2893 } m_dw32; 2894 } m_frameBrcUpdateCurbeCmd; 2895 FrameBrcUpdateCurbe()2896 FrameBrcUpdateCurbe() 2897 { 2898 m_frameBrcUpdateCurbeCmd.m_dw0.m_value = 0; 2899 m_frameBrcUpdateCurbeCmd.m_dw1.m_value = 0; 2900 m_frameBrcUpdateCurbeCmd.m_dw2.m_value = 0; 2901 m_frameBrcUpdateCurbeCmd.m_dw3.m_startGAdjFrame0 = 10; 2902 m_frameBrcUpdateCurbeCmd.m_dw3.m_startGAdjFrame1 = 50; 2903 m_frameBrcUpdateCurbeCmd.m_dw4.m_startGAdjFrame2 = 100; 2904 m_frameBrcUpdateCurbeCmd.m_dw4.m_startGAdjFrame3 = 150; 2905 m_frameBrcUpdateCurbeCmd.m_dw5.m_value = 0; 2906 m_frameBrcUpdateCurbeCmd.m_dw6.m_value = 0; 2907 m_frameBrcUpdateCurbeCmd.m_dw7.m_value = 0; 2908 2909 m_frameBrcUpdateCurbeCmd.m_dw8.m_startGlobalAdjustMult0 = 1; 2910 m_frameBrcUpdateCurbeCmd.m_dw8.m_startGlobalAdjustMult1 = 1; 2911 m_frameBrcUpdateCurbeCmd.m_dw8.m_startGlobalAdjustMult2 = 3; 2912 m_frameBrcUpdateCurbeCmd.m_dw8.m_startGlobalAdjustMult3 = 2; 2913 2914 m_frameBrcUpdateCurbeCmd.m_dw9.m_startGlobalAdjustMult4 = 1; 2915 m_frameBrcUpdateCurbeCmd.m_dw9.m_startGlobalAdjustDiv0 = 40; 2916 m_frameBrcUpdateCurbeCmd.m_dw9.m_startGlobalAdjustDiv1 = 5; 2917 m_frameBrcUpdateCurbeCmd.m_dw9.m_startGlobalAdjustDiv2 = 5; 2918 2919 m_frameBrcUpdateCurbeCmd.m_dw10.m_startGlobalAdjustDiv3 = 3; 2920 m_frameBrcUpdateCurbeCmd.m_dw10.m_startGlobalAdjustDiv4 = 1; 2921 m_frameBrcUpdateCurbeCmd.m_dw10.m_qpThreshold0 = 7; 2922 m_frameBrcUpdateCurbeCmd.m_dw10.m_qpThreshold1 = 18; 2923 2924 m_frameBrcUpdateCurbeCmd.m_dw11.m_qpThreshold2 = 25; 2925 m_frameBrcUpdateCurbeCmd.m_dw11.m_qpThreshold3 = 37; 2926 m_frameBrcUpdateCurbeCmd.m_dw11.m_gRateRatioThreshold0 = 40; 2927 m_frameBrcUpdateCurbeCmd.m_dw11.m_gRateRatioThreshold1 = 75; 2928 2929 m_frameBrcUpdateCurbeCmd.m_dw12.m_gRateRatioThreshold2 = 97; 2930 m_frameBrcUpdateCurbeCmd.m_dw12.m_gRateRatioThreshold3 = 103; 2931 m_frameBrcUpdateCurbeCmd.m_dw12.m_gRateRatioThreshold4 = 125; 2932 m_frameBrcUpdateCurbeCmd.m_dw12.m_gRateRatioThreshold5 = 160; 2933 2934 m_frameBrcUpdateCurbeCmd.m_dw13.m_gRateRatioThresholdQP0 = MOS_BITFIELD_VALUE((uint32_t)-3, 8); 2935 m_frameBrcUpdateCurbeCmd.m_dw13.m_gRateRatioThresholdQP1 = MOS_BITFIELD_VALUE((uint32_t)-2, 8); 2936 m_frameBrcUpdateCurbeCmd.m_dw13.m_gRateRatioThresholdQP2 = MOS_BITFIELD_VALUE((uint32_t)-1, 8); 2937 m_frameBrcUpdateCurbeCmd.m_dw13.m_gRateRatioThresholdQP3 = 0; 2938 2939 m_frameBrcUpdateCurbeCmd.m_dw14.m_gRateRatioThresholdQP4 = 1; 2940 m_frameBrcUpdateCurbeCmd.m_dw14.m_gRateRatioThresholdQP5 = 2; 2941 m_frameBrcUpdateCurbeCmd.m_dw14.m_gRateRatioThresholdQP6 = 3; 2942 m_frameBrcUpdateCurbeCmd.m_dw14.m_qpIndexOfCurPic = 0xff; 2943 2944 m_frameBrcUpdateCurbeCmd.m_dw15.m_value = 0; 2945 m_frameBrcUpdateCurbeCmd.m_dw16.m_value = 0; 2946 m_frameBrcUpdateCurbeCmd.m_dw17.m_value = 0; 2947 m_frameBrcUpdateCurbeCmd.m_dw18.m_value = 0; 2948 m_frameBrcUpdateCurbeCmd.m_dw19.m_value = 0; 2949 m_frameBrcUpdateCurbeCmd.m_dw20.m_value = 0; 2950 m_frameBrcUpdateCurbeCmd.m_dw21.m_value = 0; 2951 m_frameBrcUpdateCurbeCmd.m_dw22.m_value = 0; 2952 m_frameBrcUpdateCurbeCmd.m_dw23.m_value = 0; 2953 m_frameBrcUpdateCurbeCmd.m_dw24.m_value = 0; 2954 m_frameBrcUpdateCurbeCmd.m_dw25.m_value = 0; 2955 m_frameBrcUpdateCurbeCmd.m_dw26.m_value = 0; 2956 m_frameBrcUpdateCurbeCmd.m_dw27.m_value = 0; 2957 m_frameBrcUpdateCurbeCmd.m_dw28.m_value = 0; 2958 m_frameBrcUpdateCurbeCmd.m_dw29.m_value = 0; 2959 m_frameBrcUpdateCurbeCmd.m_dw30.m_value = 0; 2960 m_frameBrcUpdateCurbeCmd.m_dw31.m_value = 0; 2961 m_frameBrcUpdateCurbeCmd.m_dw32.m_value = 0; 2962 }; 2963 }; 2964 2965 #endif //__CODECHAL_ENCODE_AVC_G12_H__ 2966