1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * camss-csiphy.c
4 *
5 * Qualcomm MSM Camera Subsystem - CSIPHY Module
6 *
7 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
8 * Copyright (C) 2016-2018 Linaro Ltd.
9 */
10 #include <linux/clk.h>
11 #include <linux/delay.h>
12 #include <linux/interrupt.h>
13 #include <linux/io.h>
14 #include <linux/kernel.h>
15 #include <linux/of.h>
16 #include <linux/platform_device.h>
17 #include <linux/pm_runtime.h>
18 #include <media/media-entity.h>
19 #include <media/v4l2-device.h>
20 #include <media/v4l2-subdev.h>
21
22 #include "camss-csiphy.h"
23 #include "camss.h"
24
25 #define MSM_CSIPHY_NAME "msm_csiphy"
26
27 static const struct csiphy_format_info formats_8x16[] = {
28 { MEDIA_BUS_FMT_UYVY8_1X16, 8 },
29 { MEDIA_BUS_FMT_VYUY8_1X16, 8 },
30 { MEDIA_BUS_FMT_YUYV8_1X16, 8 },
31 { MEDIA_BUS_FMT_YVYU8_1X16, 8 },
32 { MEDIA_BUS_FMT_SBGGR8_1X8, 8 },
33 { MEDIA_BUS_FMT_SGBRG8_1X8, 8 },
34 { MEDIA_BUS_FMT_SGRBG8_1X8, 8 },
35 { MEDIA_BUS_FMT_SRGGB8_1X8, 8 },
36 { MEDIA_BUS_FMT_SBGGR10_1X10, 10 },
37 { MEDIA_BUS_FMT_SGBRG10_1X10, 10 },
38 { MEDIA_BUS_FMT_SGRBG10_1X10, 10 },
39 { MEDIA_BUS_FMT_SRGGB10_1X10, 10 },
40 { MEDIA_BUS_FMT_SBGGR12_1X12, 12 },
41 { MEDIA_BUS_FMT_SGBRG12_1X12, 12 },
42 { MEDIA_BUS_FMT_SGRBG12_1X12, 12 },
43 { MEDIA_BUS_FMT_SRGGB12_1X12, 12 },
44 { MEDIA_BUS_FMT_Y10_1X10, 10 },
45 };
46
47 static const struct csiphy_format_info formats_8x96[] = {
48 { MEDIA_BUS_FMT_UYVY8_1X16, 8 },
49 { MEDIA_BUS_FMT_VYUY8_1X16, 8 },
50 { MEDIA_BUS_FMT_YUYV8_1X16, 8 },
51 { MEDIA_BUS_FMT_YVYU8_1X16, 8 },
52 { MEDIA_BUS_FMT_SBGGR8_1X8, 8 },
53 { MEDIA_BUS_FMT_SGBRG8_1X8, 8 },
54 { MEDIA_BUS_FMT_SGRBG8_1X8, 8 },
55 { MEDIA_BUS_FMT_SRGGB8_1X8, 8 },
56 { MEDIA_BUS_FMT_SBGGR10_1X10, 10 },
57 { MEDIA_BUS_FMT_SGBRG10_1X10, 10 },
58 { MEDIA_BUS_FMT_SGRBG10_1X10, 10 },
59 { MEDIA_BUS_FMT_SRGGB10_1X10, 10 },
60 { MEDIA_BUS_FMT_SBGGR12_1X12, 12 },
61 { MEDIA_BUS_FMT_SGBRG12_1X12, 12 },
62 { MEDIA_BUS_FMT_SGRBG12_1X12, 12 },
63 { MEDIA_BUS_FMT_SRGGB12_1X12, 12 },
64 { MEDIA_BUS_FMT_SBGGR14_1X14, 14 },
65 { MEDIA_BUS_FMT_SGBRG14_1X14, 14 },
66 { MEDIA_BUS_FMT_SGRBG14_1X14, 14 },
67 { MEDIA_BUS_FMT_SRGGB14_1X14, 14 },
68 { MEDIA_BUS_FMT_Y10_1X10, 10 },
69 };
70
71 static const struct csiphy_format_info formats_sdm845[] = {
72 { MEDIA_BUS_FMT_UYVY8_1X16, 8 },
73 { MEDIA_BUS_FMT_VYUY8_1X16, 8 },
74 { MEDIA_BUS_FMT_YUYV8_1X16, 8 },
75 { MEDIA_BUS_FMT_YVYU8_1X16, 8 },
76 { MEDIA_BUS_FMT_SBGGR8_1X8, 8 },
77 { MEDIA_BUS_FMT_SGBRG8_1X8, 8 },
78 { MEDIA_BUS_FMT_SGRBG8_1X8, 8 },
79 { MEDIA_BUS_FMT_SRGGB8_1X8, 8 },
80 { MEDIA_BUS_FMT_SBGGR10_1X10, 10 },
81 { MEDIA_BUS_FMT_SGBRG10_1X10, 10 },
82 { MEDIA_BUS_FMT_SGRBG10_1X10, 10 },
83 { MEDIA_BUS_FMT_SRGGB10_1X10, 10 },
84 { MEDIA_BUS_FMT_SBGGR12_1X12, 12 },
85 { MEDIA_BUS_FMT_SGBRG12_1X12, 12 },
86 { MEDIA_BUS_FMT_SGRBG12_1X12, 12 },
87 { MEDIA_BUS_FMT_SRGGB12_1X12, 12 },
88 { MEDIA_BUS_FMT_SBGGR14_1X14, 14 },
89 { MEDIA_BUS_FMT_SGBRG14_1X14, 14 },
90 { MEDIA_BUS_FMT_SGRBG14_1X14, 14 },
91 { MEDIA_BUS_FMT_SRGGB14_1X14, 14 },
92 { MEDIA_BUS_FMT_Y8_1X8, 8 },
93 { MEDIA_BUS_FMT_Y10_1X10, 10 },
94 };
95
96 const struct csiphy_formats csiphy_formats_8x16 = {
97 .nformats = ARRAY_SIZE(formats_8x16),
98 .formats = formats_8x16
99 };
100
101 const struct csiphy_formats csiphy_formats_8x96 = {
102 .nformats = ARRAY_SIZE(formats_8x96),
103 .formats = formats_8x96
104 };
105
106 const struct csiphy_formats csiphy_formats_sc7280 = {
107 .nformats = ARRAY_SIZE(formats_sdm845),
108 .formats = formats_sdm845
109 };
110
111 const struct csiphy_formats csiphy_formats_sdm845 = {
112 .nformats = ARRAY_SIZE(formats_sdm845),
113 .formats = formats_sdm845
114 };
115
116 /*
117 * csiphy_get_bpp - map media bus format to bits per pixel
118 * @formats: supported media bus formats array
119 * @nformats: size of @formats array
120 * @code: media bus format code
121 *
122 * Return number of bits per pixel
123 */
csiphy_get_bpp(const struct csiphy_format_info * formats,unsigned int nformats,u32 code)124 static u8 csiphy_get_bpp(const struct csiphy_format_info *formats,
125 unsigned int nformats, u32 code)
126 {
127 unsigned int i;
128
129 for (i = 0; i < nformats; i++)
130 if (code == formats[i].code)
131 return formats[i].bpp;
132
133 WARN(1, "Unknown format\n");
134
135 return formats[0].bpp;
136 }
137
138 /*
139 * csiphy_set_clock_rates - Calculate and set clock rates on CSIPHY module
140 * @csiphy: CSIPHY device
141 */
csiphy_set_clock_rates(struct csiphy_device * csiphy)142 static int csiphy_set_clock_rates(struct csiphy_device *csiphy)
143 {
144 struct device *dev = csiphy->camss->dev;
145 s64 link_freq;
146 int i, j;
147 int ret;
148
149 u8 bpp = csiphy_get_bpp(csiphy->res->formats->formats, csiphy->res->formats->nformats,
150 csiphy->fmt[MSM_CSIPHY_PAD_SINK].code);
151 u8 num_lanes = csiphy->cfg.csi2->lane_cfg.num_data;
152
153 link_freq = camss_get_link_freq(&csiphy->subdev.entity, bpp, num_lanes);
154 if (link_freq < 0)
155 link_freq = 0;
156
157 for (i = 0; i < csiphy->nclocks; i++) {
158 struct camss_clock *clock = &csiphy->clock[i];
159
160 if (csiphy->rate_set[i]) {
161 u64 min_rate = link_freq / 4;
162 long round_rate;
163
164 camss_add_clock_margin(&min_rate);
165
166 for (j = 0; j < clock->nfreqs; j++)
167 if (min_rate < clock->freq[j])
168 break;
169
170 if (j == clock->nfreqs) {
171 dev_err(dev,
172 "Pixel clock is too high for CSIPHY\n");
173 return -EINVAL;
174 }
175
176 /* if sensor pixel clock is not available */
177 /* set highest possible CSIPHY clock rate */
178 if (min_rate == 0)
179 j = clock->nfreqs - 1;
180
181 round_rate = clk_round_rate(clock->clk, clock->freq[j]);
182 if (round_rate < 0) {
183 dev_err(dev, "clk round rate failed: %ld\n",
184 round_rate);
185 return -EINVAL;
186 }
187
188 csiphy->timer_clk_rate = round_rate;
189
190 ret = clk_set_rate(clock->clk, csiphy->timer_clk_rate);
191 if (ret < 0) {
192 dev_err(dev, "clk set rate failed: %d\n", ret);
193 return ret;
194 }
195 }
196 }
197
198 return 0;
199 }
200
201 /*
202 * csiphy_set_power - Power on/off CSIPHY module
203 * @sd: CSIPHY V4L2 subdevice
204 * @on: Requested power state
205 *
206 * Return 0 on success or a negative error code otherwise
207 */
csiphy_set_power(struct v4l2_subdev * sd,int on)208 static int csiphy_set_power(struct v4l2_subdev *sd, int on)
209 {
210 struct csiphy_device *csiphy = v4l2_get_subdevdata(sd);
211 struct device *dev = csiphy->camss->dev;
212
213 if (on) {
214 int ret;
215
216 ret = pm_runtime_resume_and_get(dev);
217 if (ret < 0)
218 return ret;
219
220 ret = regulator_bulk_enable(csiphy->num_supplies,
221 csiphy->supplies);
222 if (ret < 0) {
223 pm_runtime_put_sync(dev);
224 return ret;
225 }
226
227 ret = csiphy_set_clock_rates(csiphy);
228 if (ret < 0) {
229 regulator_bulk_disable(csiphy->num_supplies,
230 csiphy->supplies);
231 pm_runtime_put_sync(dev);
232 return ret;
233 }
234
235 ret = camss_enable_clocks(csiphy->nclocks, csiphy->clock, dev);
236 if (ret < 0) {
237 regulator_bulk_disable(csiphy->num_supplies,
238 csiphy->supplies);
239 pm_runtime_put_sync(dev);
240 return ret;
241 }
242
243 enable_irq(csiphy->irq);
244
245 csiphy->res->hw_ops->reset(csiphy);
246
247 csiphy->res->hw_ops->hw_version_read(csiphy, dev);
248 } else {
249 disable_irq(csiphy->irq);
250
251 camss_disable_clocks(csiphy->nclocks, csiphy->clock);
252
253 regulator_bulk_disable(csiphy->num_supplies, csiphy->supplies);
254
255 pm_runtime_put_sync(dev);
256 }
257
258 return 0;
259 }
260
261 /*
262 * csiphy_stream_on - Enable streaming on CSIPHY module
263 * @csiphy: CSIPHY device
264 *
265 * Helper function to enable streaming on CSIPHY module.
266 * Main configuration of CSIPHY module is also done here.
267 *
268 * Return 0 on success or a negative error code otherwise
269 */
csiphy_stream_on(struct csiphy_device * csiphy)270 static int csiphy_stream_on(struct csiphy_device *csiphy)
271 {
272 struct csiphy_config *cfg = &csiphy->cfg;
273 s64 link_freq;
274 u8 lane_mask = csiphy->res->hw_ops->get_lane_mask(&cfg->csi2->lane_cfg);
275 u8 bpp = csiphy_get_bpp(csiphy->res->formats->formats, csiphy->res->formats->nformats,
276 csiphy->fmt[MSM_CSIPHY_PAD_SINK].code);
277 u8 num_lanes = csiphy->cfg.csi2->lane_cfg.num_data;
278 u8 val;
279
280 link_freq = camss_get_link_freq(&csiphy->subdev.entity, bpp, num_lanes);
281
282 if (link_freq < 0) {
283 dev_err(csiphy->camss->dev,
284 "Cannot get CSI2 transmitter's link frequency\n");
285 return -EINVAL;
286 }
287
288 if (csiphy->base_clk_mux) {
289 val = readl_relaxed(csiphy->base_clk_mux);
290 if (cfg->combo_mode && (lane_mask & 0x18) == 0x18) {
291 val &= ~0xf0;
292 val |= cfg->csid_id << 4;
293 } else {
294 val &= ~0xf;
295 val |= cfg->csid_id;
296 }
297 writel_relaxed(val, csiphy->base_clk_mux);
298
299 /* Enforce reg write ordering between clk mux & lane enabling */
300 wmb();
301 }
302
303 csiphy->res->hw_ops->lanes_enable(csiphy, cfg, link_freq, lane_mask);
304
305 return 0;
306 }
307
308 /*
309 * csiphy_stream_off - Disable streaming on CSIPHY module
310 * @csiphy: CSIPHY device
311 *
312 * Helper function to disable streaming on CSIPHY module
313 */
csiphy_stream_off(struct csiphy_device * csiphy)314 static void csiphy_stream_off(struct csiphy_device *csiphy)
315 {
316 csiphy->res->hw_ops->lanes_disable(csiphy, &csiphy->cfg);
317 }
318
319
320 /*
321 * csiphy_set_stream - Enable/disable streaming on CSIPHY module
322 * @sd: CSIPHY V4L2 subdevice
323 * @enable: Requested streaming state
324 *
325 * Return 0 on success or a negative error code otherwise
326 */
csiphy_set_stream(struct v4l2_subdev * sd,int enable)327 static int csiphy_set_stream(struct v4l2_subdev *sd, int enable)
328 {
329 struct csiphy_device *csiphy = v4l2_get_subdevdata(sd);
330 int ret = 0;
331
332 if (enable)
333 ret = csiphy_stream_on(csiphy);
334 else
335 csiphy_stream_off(csiphy);
336
337 return ret;
338 }
339
340 /*
341 * __csiphy_get_format - Get pointer to format structure
342 * @csiphy: CSIPHY device
343 * @sd_state: V4L2 subdev state
344 * @pad: pad from which format is requested
345 * @which: TRY or ACTIVE format
346 *
347 * Return pointer to TRY or ACTIVE format structure
348 */
349 static struct v4l2_mbus_framefmt *
__csiphy_get_format(struct csiphy_device * csiphy,struct v4l2_subdev_state * sd_state,unsigned int pad,enum v4l2_subdev_format_whence which)350 __csiphy_get_format(struct csiphy_device *csiphy,
351 struct v4l2_subdev_state *sd_state,
352 unsigned int pad,
353 enum v4l2_subdev_format_whence which)
354 {
355 if (which == V4L2_SUBDEV_FORMAT_TRY)
356 return v4l2_subdev_state_get_format(sd_state, pad);
357
358 return &csiphy->fmt[pad];
359 }
360
361 /*
362 * csiphy_try_format - Handle try format by pad subdev method
363 * @csiphy: CSIPHY device
364 * @sd_state: V4L2 subdev state
365 * @pad: pad on which format is requested
366 * @fmt: pointer to v4l2 format structure
367 * @which: wanted subdev format
368 */
csiphy_try_format(struct csiphy_device * csiphy,struct v4l2_subdev_state * sd_state,unsigned int pad,struct v4l2_mbus_framefmt * fmt,enum v4l2_subdev_format_whence which)369 static void csiphy_try_format(struct csiphy_device *csiphy,
370 struct v4l2_subdev_state *sd_state,
371 unsigned int pad,
372 struct v4l2_mbus_framefmt *fmt,
373 enum v4l2_subdev_format_whence which)
374 {
375 unsigned int i;
376
377 switch (pad) {
378 case MSM_CSIPHY_PAD_SINK:
379 /* Set format on sink pad */
380
381 for (i = 0; i < csiphy->res->formats->nformats; i++)
382 if (fmt->code == csiphy->res->formats->formats[i].code)
383 break;
384
385 /* If not found, use UYVY as default */
386 if (i >= csiphy->res->formats->nformats)
387 fmt->code = MEDIA_BUS_FMT_UYVY8_1X16;
388
389 fmt->width = clamp_t(u32, fmt->width, 1, 8191);
390 fmt->height = clamp_t(u32, fmt->height, 1, 8191);
391
392 fmt->field = V4L2_FIELD_NONE;
393 fmt->colorspace = V4L2_COLORSPACE_SRGB;
394
395 break;
396
397 case MSM_CSIPHY_PAD_SRC:
398 /* Set and return a format same as sink pad */
399
400 *fmt = *__csiphy_get_format(csiphy, sd_state,
401 MSM_CSID_PAD_SINK,
402 which);
403
404 break;
405 }
406 }
407
408 /*
409 * csiphy_enum_mbus_code - Handle pixel format enumeration
410 * @sd: CSIPHY V4L2 subdevice
411 * @sd_state: V4L2 subdev state
412 * @code: pointer to v4l2_subdev_mbus_code_enum structure
413 * return -EINVAL or zero on success
414 */
csiphy_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_mbus_code_enum * code)415 static int csiphy_enum_mbus_code(struct v4l2_subdev *sd,
416 struct v4l2_subdev_state *sd_state,
417 struct v4l2_subdev_mbus_code_enum *code)
418 {
419 struct csiphy_device *csiphy = v4l2_get_subdevdata(sd);
420 struct v4l2_mbus_framefmt *format;
421
422 if (code->pad == MSM_CSIPHY_PAD_SINK) {
423 if (code->index >= csiphy->res->formats->nformats)
424 return -EINVAL;
425
426 code->code = csiphy->res->formats->formats[code->index].code;
427 } else {
428 if (code->index > 0)
429 return -EINVAL;
430
431 format = __csiphy_get_format(csiphy, sd_state,
432 MSM_CSIPHY_PAD_SINK,
433 code->which);
434
435 code->code = format->code;
436 }
437
438 return 0;
439 }
440
441 /*
442 * csiphy_enum_frame_size - Handle frame size enumeration
443 * @sd: CSIPHY V4L2 subdevice
444 * @sd_state: V4L2 subdev state
445 * @fse: pointer to v4l2_subdev_frame_size_enum structure
446 * return -EINVAL or zero on success
447 */
csiphy_enum_frame_size(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_frame_size_enum * fse)448 static int csiphy_enum_frame_size(struct v4l2_subdev *sd,
449 struct v4l2_subdev_state *sd_state,
450 struct v4l2_subdev_frame_size_enum *fse)
451 {
452 struct csiphy_device *csiphy = v4l2_get_subdevdata(sd);
453 struct v4l2_mbus_framefmt format;
454
455 if (fse->index != 0)
456 return -EINVAL;
457
458 format.code = fse->code;
459 format.width = 1;
460 format.height = 1;
461 csiphy_try_format(csiphy, sd_state, fse->pad, &format, fse->which);
462 fse->min_width = format.width;
463 fse->min_height = format.height;
464
465 if (format.code != fse->code)
466 return -EINVAL;
467
468 format.code = fse->code;
469 format.width = -1;
470 format.height = -1;
471 csiphy_try_format(csiphy, sd_state, fse->pad, &format, fse->which);
472 fse->max_width = format.width;
473 fse->max_height = format.height;
474
475 return 0;
476 }
477
478 /*
479 * csiphy_get_format - Handle get format by pads subdev method
480 * @sd: CSIPHY V4L2 subdevice
481 * @sd_state: V4L2 subdev state
482 * @fmt: pointer to v4l2 subdev format structure
483 *
484 * Return -EINVAL or zero on success
485 */
csiphy_get_format(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * fmt)486 static int csiphy_get_format(struct v4l2_subdev *sd,
487 struct v4l2_subdev_state *sd_state,
488 struct v4l2_subdev_format *fmt)
489 {
490 struct csiphy_device *csiphy = v4l2_get_subdevdata(sd);
491 struct v4l2_mbus_framefmt *format;
492
493 format = __csiphy_get_format(csiphy, sd_state, fmt->pad, fmt->which);
494 if (format == NULL)
495 return -EINVAL;
496
497 fmt->format = *format;
498
499 return 0;
500 }
501
502 /*
503 * csiphy_set_format - Handle set format by pads subdev method
504 * @sd: CSIPHY V4L2 subdevice
505 * @sd_state: V4L2 subdev state
506 * @fmt: pointer to v4l2 subdev format structure
507 *
508 * Return -EINVAL or zero on success
509 */
csiphy_set_format(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * fmt)510 static int csiphy_set_format(struct v4l2_subdev *sd,
511 struct v4l2_subdev_state *sd_state,
512 struct v4l2_subdev_format *fmt)
513 {
514 struct csiphy_device *csiphy = v4l2_get_subdevdata(sd);
515 struct v4l2_mbus_framefmt *format;
516
517 format = __csiphy_get_format(csiphy, sd_state, fmt->pad, fmt->which);
518 if (format == NULL)
519 return -EINVAL;
520
521 csiphy_try_format(csiphy, sd_state, fmt->pad, &fmt->format,
522 fmt->which);
523 *format = fmt->format;
524
525 /* Propagate the format from sink to source */
526 if (fmt->pad == MSM_CSIPHY_PAD_SINK) {
527 format = __csiphy_get_format(csiphy, sd_state,
528 MSM_CSIPHY_PAD_SRC,
529 fmt->which);
530
531 *format = fmt->format;
532 csiphy_try_format(csiphy, sd_state, MSM_CSIPHY_PAD_SRC,
533 format,
534 fmt->which);
535 }
536
537 return 0;
538 }
539
540 /*
541 * csiphy_init_formats - Initialize formats on all pads
542 * @sd: CSIPHY V4L2 subdevice
543 * @fh: V4L2 subdev file handle
544 *
545 * Initialize all pad formats with default values.
546 *
547 * Return 0 on success or a negative error code otherwise
548 */
csiphy_init_formats(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)549 static int csiphy_init_formats(struct v4l2_subdev *sd,
550 struct v4l2_subdev_fh *fh)
551 {
552 struct v4l2_subdev_format format = {
553 .pad = MSM_CSIPHY_PAD_SINK,
554 .which = fh ? V4L2_SUBDEV_FORMAT_TRY :
555 V4L2_SUBDEV_FORMAT_ACTIVE,
556 .format = {
557 .code = MEDIA_BUS_FMT_UYVY8_1X16,
558 .width = 1920,
559 .height = 1080
560 }
561 };
562
563 return csiphy_set_format(sd, fh ? fh->state : NULL, &format);
564 }
565
csiphy_match_clock_name(const char * clock_name,const char * format,int index)566 static bool csiphy_match_clock_name(const char *clock_name, const char *format,
567 int index)
568 {
569 char name[16]; /* csiphyXXX_timer\0 */
570
571 snprintf(name, sizeof(name), format, index);
572 return !strcmp(clock_name, name);
573 }
574
575 /*
576 * msm_csiphy_subdev_init - Initialize CSIPHY device structure and resources
577 * @csiphy: CSIPHY device
578 * @res: CSIPHY module resources table
579 * @id: CSIPHY module id
580 *
581 * Return 0 on success or a negative error code otherwise
582 */
msm_csiphy_subdev_init(struct camss * camss,struct csiphy_device * csiphy,const struct camss_subdev_resources * res,u8 id)583 int msm_csiphy_subdev_init(struct camss *camss,
584 struct csiphy_device *csiphy,
585 const struct camss_subdev_resources *res, u8 id)
586 {
587 struct device *dev = camss->dev;
588 struct platform_device *pdev = to_platform_device(dev);
589 int i, j, k;
590 int ret;
591
592 csiphy->camss = camss;
593 csiphy->id = id;
594 csiphy->cfg.combo_mode = 0;
595 csiphy->res = &res->csiphy;
596
597 /* Memory */
598
599 csiphy->base = devm_platform_ioremap_resource_byname(pdev, res->reg[0]);
600 if (IS_ERR(csiphy->base))
601 return PTR_ERR(csiphy->base);
602
603 if (camss->res->version == CAMSS_8x16 ||
604 camss->res->version == CAMSS_8x53 ||
605 camss->res->version == CAMSS_8x96) {
606 csiphy->base_clk_mux =
607 devm_platform_ioremap_resource_byname(pdev, res->reg[1]);
608 if (IS_ERR(csiphy->base_clk_mux))
609 return PTR_ERR(csiphy->base_clk_mux);
610 } else {
611 csiphy->base_clk_mux = NULL;
612 }
613
614 /* Interrupt */
615
616 ret = platform_get_irq_byname(pdev, res->interrupt[0]);
617 if (ret < 0)
618 return ret;
619
620 csiphy->irq = ret;
621 snprintf(csiphy->irq_name, sizeof(csiphy->irq_name), "%s_%s%d",
622 dev_name(dev), MSM_CSIPHY_NAME, csiphy->id);
623
624 ret = devm_request_irq(dev, csiphy->irq, csiphy->res->hw_ops->isr,
625 IRQF_TRIGGER_RISING | IRQF_NO_AUTOEN,
626 csiphy->irq_name, csiphy);
627 if (ret < 0) {
628 dev_err(dev, "request_irq failed: %d\n", ret);
629 return ret;
630 }
631
632 /* Clocks */
633
634 csiphy->nclocks = 0;
635 while (res->clock[csiphy->nclocks])
636 csiphy->nclocks++;
637
638 csiphy->clock = devm_kcalloc(dev,
639 csiphy->nclocks, sizeof(*csiphy->clock),
640 GFP_KERNEL);
641 if (!csiphy->clock)
642 return -ENOMEM;
643
644 csiphy->rate_set = devm_kcalloc(dev,
645 csiphy->nclocks,
646 sizeof(*csiphy->rate_set),
647 GFP_KERNEL);
648 if (!csiphy->rate_set)
649 return -ENOMEM;
650
651 for (i = 0; i < csiphy->nclocks; i++) {
652 struct camss_clock *clock = &csiphy->clock[i];
653
654 clock->clk = devm_clk_get(dev, res->clock[i]);
655 if (IS_ERR(clock->clk))
656 return PTR_ERR(clock->clk);
657
658 clock->name = res->clock[i];
659
660 clock->nfreqs = 0;
661 while (res->clock_rate[i][clock->nfreqs])
662 clock->nfreqs++;
663
664 if (!clock->nfreqs) {
665 clock->freq = NULL;
666 continue;
667 }
668
669 clock->freq = devm_kcalloc(dev,
670 clock->nfreqs,
671 sizeof(*clock->freq),
672 GFP_KERNEL);
673 if (!clock->freq)
674 return -ENOMEM;
675
676 for (j = 0; j < clock->nfreqs; j++)
677 clock->freq[j] = res->clock_rate[i][j];
678
679 for (k = 0; k < camss->res->csiphy_num; k++) {
680 csiphy->rate_set[i] = csiphy_match_clock_name(clock->name,
681 "csiphy%d_timer", k);
682 if (csiphy->rate_set[i])
683 break;
684
685 if (camss->res->version == CAMSS_660) {
686 csiphy->rate_set[i] = csiphy_match_clock_name(clock->name,
687 "csi%d_phy", k);
688 if (csiphy->rate_set[i])
689 break;
690 }
691
692 csiphy->rate_set[i] = csiphy_match_clock_name(clock->name, "csiphy%d", k);
693 if (csiphy->rate_set[i])
694 break;
695 }
696 }
697
698 /* CSIPHY supplies */
699 for (i = 0; i < ARRAY_SIZE(res->regulators); i++) {
700 if (res->regulators[i])
701 csiphy->num_supplies++;
702 }
703
704 if (csiphy->num_supplies) {
705 csiphy->supplies = devm_kmalloc_array(camss->dev,
706 csiphy->num_supplies,
707 sizeof(*csiphy->supplies),
708 GFP_KERNEL);
709 if (!csiphy->supplies)
710 return -ENOMEM;
711 }
712
713 for (i = 0; i < csiphy->num_supplies; i++)
714 csiphy->supplies[i].supply = res->regulators[i];
715
716 ret = devm_regulator_bulk_get(camss->dev, csiphy->num_supplies,
717 csiphy->supplies);
718 return ret;
719 }
720
721 /*
722 * csiphy_link_setup - Setup CSIPHY connections
723 * @entity: Pointer to media entity structure
724 * @local: Pointer to local pad
725 * @remote: Pointer to remote pad
726 * @flags: Link flags
727 *
728 * Rreturn 0 on success
729 */
csiphy_link_setup(struct media_entity * entity,const struct media_pad * local,const struct media_pad * remote,u32 flags)730 static int csiphy_link_setup(struct media_entity *entity,
731 const struct media_pad *local,
732 const struct media_pad *remote, u32 flags)
733 {
734 if ((local->flags & MEDIA_PAD_FL_SOURCE) &&
735 (flags & MEDIA_LNK_FL_ENABLED)) {
736 struct v4l2_subdev *sd;
737 struct csiphy_device *csiphy;
738 struct csid_device *csid;
739
740 if (media_pad_remote_pad_first(local))
741 return -EBUSY;
742
743 sd = media_entity_to_v4l2_subdev(entity);
744 csiphy = v4l2_get_subdevdata(sd);
745
746 sd = media_entity_to_v4l2_subdev(remote->entity);
747 csid = v4l2_get_subdevdata(sd);
748
749 csiphy->cfg.csid_id = csid->id;
750 }
751
752 return 0;
753 }
754
755 static const struct v4l2_subdev_core_ops csiphy_core_ops = {
756 .s_power = csiphy_set_power,
757 };
758
759 static const struct v4l2_subdev_video_ops csiphy_video_ops = {
760 .s_stream = csiphy_set_stream,
761 };
762
763 static const struct v4l2_subdev_pad_ops csiphy_pad_ops = {
764 .enum_mbus_code = csiphy_enum_mbus_code,
765 .enum_frame_size = csiphy_enum_frame_size,
766 .get_fmt = csiphy_get_format,
767 .set_fmt = csiphy_set_format,
768 };
769
770 static const struct v4l2_subdev_ops csiphy_v4l2_ops = {
771 .core = &csiphy_core_ops,
772 .video = &csiphy_video_ops,
773 .pad = &csiphy_pad_ops,
774 };
775
776 static const struct v4l2_subdev_internal_ops csiphy_v4l2_internal_ops = {
777 .open = csiphy_init_formats,
778 };
779
780 static const struct media_entity_operations csiphy_media_ops = {
781 .link_setup = csiphy_link_setup,
782 .link_validate = v4l2_subdev_link_validate,
783 };
784
785 /*
786 * msm_csiphy_register_entity - Register subdev node for CSIPHY module
787 * @csiphy: CSIPHY device
788 * @v4l2_dev: V4L2 device
789 *
790 * Return 0 on success or a negative error code otherwise
791 */
msm_csiphy_register_entity(struct csiphy_device * csiphy,struct v4l2_device * v4l2_dev)792 int msm_csiphy_register_entity(struct csiphy_device *csiphy,
793 struct v4l2_device *v4l2_dev)
794 {
795 struct v4l2_subdev *sd = &csiphy->subdev;
796 struct media_pad *pads = csiphy->pads;
797 struct device *dev = csiphy->camss->dev;
798 int ret;
799
800 v4l2_subdev_init(sd, &csiphy_v4l2_ops);
801 sd->internal_ops = &csiphy_v4l2_internal_ops;
802 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
803 snprintf(sd->name, ARRAY_SIZE(sd->name), "%s%d",
804 MSM_CSIPHY_NAME, csiphy->id);
805 v4l2_set_subdevdata(sd, csiphy);
806
807 ret = csiphy_init_formats(sd, NULL);
808 if (ret < 0) {
809 dev_err(dev, "Failed to init format: %d\n", ret);
810 return ret;
811 }
812
813 pads[MSM_CSIPHY_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
814 pads[MSM_CSIPHY_PAD_SRC].flags = MEDIA_PAD_FL_SOURCE;
815
816 sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER;
817 sd->entity.ops = &csiphy_media_ops;
818 ret = media_entity_pads_init(&sd->entity, MSM_CSIPHY_PADS_NUM, pads);
819 if (ret < 0) {
820 dev_err(dev, "Failed to init media entity: %d\n", ret);
821 return ret;
822 }
823
824 ret = v4l2_device_register_subdev(v4l2_dev, sd);
825 if (ret < 0) {
826 dev_err(dev, "Failed to register subdev: %d\n", ret);
827 media_entity_cleanup(&sd->entity);
828 }
829
830 return ret;
831 }
832
833 /*
834 * msm_csiphy_unregister_entity - Unregister CSIPHY module subdev node
835 * @csiphy: CSIPHY device
836 */
msm_csiphy_unregister_entity(struct csiphy_device * csiphy)837 void msm_csiphy_unregister_entity(struct csiphy_device *csiphy)
838 {
839 v4l2_device_unregister_subdev(&csiphy->subdev);
840 media_entity_cleanup(&csiphy->subdev.entity);
841 }
842